1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
4 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
5 * Changes for multibus/multiadapter I2C support.
6 *
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
10 * The original I2C interface was
11 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
12 * AIRVENT SAM s.p.a - RIMINI(ITALY)
13 * but has been changed substantially.
14 */
15
16 #ifndef _I2C_H_
17 #define _I2C_H_
18
19 /*
20 * For now there are essentially two parts to this file - driver model
21 * here at the top, and the older code below (with CONFIG_SYS_I2C being
22 * most recent). The plan is to migrate everything to driver model.
23 * The driver model structures and API are separate as they are different
24 * enough as to be incompatible for compilation purposes.
25 */
26
27 enum dm_i2c_chip_flags {
28 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
29 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
30 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
31 };
32
33 struct udevice;
34 /**
35 * struct dm_i2c_chip - information about an i2c chip
36 *
37 * An I2C chip is a device on the I2C bus. It sits at a particular address
38 * and normally supports 7-bit or 10-bit addressing.
39 *
40 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
41 * the chip to examine.
42 *
43 * @chip_addr: Chip address on bus
44 * @offset_len: Length of offset in bytes. A single byte offset can
45 * represent up to 256 bytes. A value larger than 1 may be
46 * needed for larger devices.
47 * @flags: Flags for this chip (dm_i2c_chip_flags)
48 * @emul: Emulator for this chip address (only used for emulation)
49 */
50 struct dm_i2c_chip {
51 uint chip_addr;
52 uint offset_len;
53 uint flags;
54 #ifdef CONFIG_SANDBOX
55 struct udevice *emul;
56 bool test_mode;
57 #endif
58 };
59
60 /**
61 * struct dm_i2c_bus- information about an i2c bus
62 *
63 * An I2C bus contains 0 or more chips on it, each at its own address. The
64 * bus can operate at different speeds (measured in Hz, typically 100KHz
65 * or 400KHz).
66 *
67 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
68 * I2C bus udevice.
69 *
70 * @speed_hz: Bus speed in hertz (typically 100000)
71 */
72 struct dm_i2c_bus {
73 int speed_hz;
74 };
75
76 /*
77 * Not all of these flags are implemented in the U-Boot API
78 */
79 enum dm_i2c_msg_flags {
80 I2C_M_TEN = 0x0010, /* ten-bit chip address */
81 I2C_M_RD = 0x0001, /* read data, from slave to master */
82 I2C_M_STOP = 0x8000, /* send stop after this message */
83 I2C_M_NOSTART = 0x4000, /* no start before this message */
84 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
85 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
86 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
87 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
88 };
89
90 /**
91 * struct i2c_msg - an I2C message
92 *
93 * @addr: Slave address
94 * @flags: Flags (see enum dm_i2c_msg_flags)
95 * @len: Length of buffer in bytes, may be 0 for a probe
96 * @buf: Buffer to send/receive, or NULL if no data
97 */
98 struct i2c_msg {
99 uint addr;
100 uint flags;
101 uint len;
102 u8 *buf;
103 };
104
105 /**
106 * struct i2c_msg_list - a list of I2C messages
107 *
108 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
109 * appropriate in U-Boot.
110 *
111 * @msg: Pointer to i2c_msg array
112 * @nmsgs: Number of elements in the array
113 */
114 struct i2c_msg_list {
115 struct i2c_msg *msgs;
116 uint nmsgs;
117 };
118
119 /**
120 * dm_i2c_read() - read bytes from an I2C chip
121 *
122 * To obtain an I2C device (called a 'chip') given the I2C bus address you
123 * can use i2c_get_chip(). To obtain a bus by bus number use
124 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
125 *
126 * To set the address length of a devce use i2c_set_addr_len(). It
127 * defaults to 1.
128 *
129 * @dev: Chip to read from
130 * @offset: Offset within chip to start reading
131 * @buffer: Place to put data
132 * @len: Number of bytes to read
133 *
134 * @return 0 on success, -ve on failure
135 */
136 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
137
138 /**
139 * dm_i2c_write() - write bytes to an I2C chip
140 *
141 * See notes for dm_i2c_read() above.
142 *
143 * @dev: Chip to write to
144 * @offset: Offset within chip to start writing
145 * @buffer: Buffer containing data to write
146 * @len: Number of bytes to write
147 *
148 * @return 0 on success, -ve on failure
149 */
150 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
151 int len);
152
153 /**
154 * dm_i2c_probe() - probe a particular chip address
155 *
156 * This can be useful to check for the existence of a chip on the bus.
157 * It is typically implemented by writing the chip address to the bus
158 * and checking that the chip replies with an ACK.
159 *
160 * @bus: Bus to probe
161 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
162 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
163 * @devp: Returns the device found, or NULL if none
164 * @return 0 if a chip was found at that address, -ve if not
165 */
166 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
167 struct udevice **devp);
168
169 /**
170 * dm_i2c_reg_read() - Read a value from an I2C register
171 *
172 * This reads a single value from the given address in an I2C chip
173 *
174 * @dev: Device to use for transfer
175 * @addr: Address to read from
176 * @return value read, or -ve on error
177 */
178 int dm_i2c_reg_read(struct udevice *dev, uint offset);
179
180 /**
181 * dm_i2c_reg_write() - Write a value to an I2C register
182 *
183 * This writes a single value to the given address in an I2C chip
184 *
185 * @dev: Device to use for transfer
186 * @addr: Address to write to
187 * @val: Value to write (normally a byte)
188 * @return 0 on success, -ve on error
189 */
190 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
191
192 /**
193 * dm_i2c_xfer() - Transfer messages over I2C
194 *
195 * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
196 * instead.
197 *
198 * @dev: Device to use for transfer
199 * @msg: List of messages to transfer
200 * @nmsgs: Number of messages to transfer
201 * @return 0 on success, -ve on error
202 */
203 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
204
205 /**
206 * dm_i2c_set_bus_speed() - set the speed of a bus
207 *
208 * @bus: Bus to adjust
209 * @speed: Requested speed in Hz
210 * @return 0 if OK, -EINVAL for invalid values
211 */
212 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
213
214 /**
215 * dm_i2c_get_bus_speed() - get the speed of a bus
216 *
217 * @bus: Bus to check
218 * @return speed of selected I2C bus in Hz, -ve on error
219 */
220 int dm_i2c_get_bus_speed(struct udevice *bus);
221
222 /**
223 * i2c_set_chip_flags() - set flags for a chip
224 *
225 * Typically addresses are 7 bits, but for 10-bit addresses you should set
226 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
227 *
228 * @dev: Chip to adjust
229 * @flags: New flags
230 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
231 */
232 int i2c_set_chip_flags(struct udevice *dev, uint flags);
233
234 /**
235 * i2c_get_chip_flags() - get flags for a chip
236 *
237 * @dev: Chip to check
238 * @flagsp: Place to put flags
239 * @return 0 if OK, other -ve value on error
240 */
241 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
242
243 /**
244 * i2c_set_offset_len() - set the offset length for a chip
245 *
246 * The offset used to access a chip may be up to 4 bytes long. Typically it
247 * is only 1 byte, which is enough for chips with 256 bytes of memory or
248 * registers. The default value is 1, but you can call this function to
249 * change it.
250 *
251 * @offset_len: New offset length value (typically 1 or 2)
252 */
253 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
254
255 /**
256 * i2c_get_offset_len() - get the offset length for a chip
257 *
258 * @return: Current offset length value (typically 1 or 2)
259 */
260 int i2c_get_chip_offset_len(struct udevice *dev);
261
262 /**
263 * i2c_deblock() - recover a bus that is in an unknown state
264 *
265 * See the deblock() method in 'struct dm_i2c_ops' for full information
266 *
267 * @bus: Bus to recover
268 * @return 0 if OK, -ve on error
269 */
270 int i2c_deblock(struct udevice *bus);
271
272 #ifdef CONFIG_DM_I2C_COMPAT
273 /**
274 * i2c_probe() - Compatibility function for driver model
275 *
276 * Calls dm_i2c_probe() on the current bus
277 */
278 int i2c_probe(uint8_t chip_addr);
279
280 /**
281 * i2c_read() - Compatibility function for driver model
282 *
283 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
284 * set to @addr. @alen must match the current setting for the device.
285 */
286 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
287 int len);
288
289 /**
290 * i2c_write() - Compatibility function for driver model
291 *
292 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
293 * set to @addr. @alen must match the current setting for the device.
294 */
295 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
296 int len);
297
298 /**
299 * i2c_get_bus_num_fdt() - Compatibility function for driver model
300 *
301 * @return the bus number associated with the given device tree node
302 */
303 int i2c_get_bus_num_fdt(int node);
304
305 /**
306 * i2c_get_bus_num() - Compatibility function for driver model
307 *
308 * @return the 'current' bus number
309 */
310 unsigned int i2c_get_bus_num(void);
311
312 /**
313 * i2c_set_bus_num() - Compatibility function for driver model
314 *
315 * Sets the 'current' bus
316 */
317 int i2c_set_bus_num(unsigned int bus);
318
I2C_SET_BUS(unsigned int bus)319 static inline void I2C_SET_BUS(unsigned int bus)
320 {
321 i2c_set_bus_num(bus);
322 }
323
I2C_GET_BUS(void)324 static inline unsigned int I2C_GET_BUS(void)
325 {
326 return i2c_get_bus_num();
327 }
328
329 /**
330 * i2c_init() - Compatibility function for driver model
331 *
332 * This function does nothing.
333 */
334 void i2c_init(int speed, int slaveaddr);
335
336 /**
337 * board_i2c_init() - Compatibility function for driver model
338 *
339 * @param blob Device tree blbo
340 * @return the number of I2C bus
341 */
342 void board_i2c_init(const void *blob);
343
344 /*
345 * Compatibility functions for driver model.
346 */
347 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
348 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
349
350 #endif
351
352 /**
353 * struct dm_i2c_ops - driver operations for I2C uclass
354 *
355 * Drivers should support these operations unless otherwise noted. These
356 * operations are intended to be used by uclass code, not directly from
357 * other code.
358 */
359 struct dm_i2c_ops {
360 /**
361 * xfer() - transfer a list of I2C messages
362 *
363 * @bus: Bus to read from
364 * @msg: List of messages to transfer
365 * @nmsgs: Number of messages in the list
366 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
367 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
368 * flags cannot be supported, other -ve value on some other error
369 */
370 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
371
372 /**
373 * probe_chip() - probe for the presense of a chip address
374 *
375 * This function is optional. If omitted, the uclass will send a zero
376 * length message instead.
377 *
378 * @bus: Bus to probe
379 * @chip_addr: Chip address to probe
380 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
381 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
382 * to default probem other -ve value on error
383 */
384 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
385
386 /**
387 * set_bus_speed() - set the speed of a bus (optional)
388 *
389 * The bus speed value will be updated by the uclass if this function
390 * does not return an error. This method is optional - if it is not
391 * provided then the driver can read the speed from
392 * dev_get_uclass_priv(bus)->speed_hz
393 *
394 * @bus: Bus to adjust
395 * @speed: Requested speed in Hz
396 * @return 0 if OK, -EINVAL for invalid values
397 */
398 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
399
400 /**
401 * get_bus_speed() - get the speed of a bus (optional)
402 *
403 * Normally this can be provided by the uclass, but if you want your
404 * driver to check the bus speed by looking at the hardware, you can
405 * implement that here. This method is optional. This method would
406 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
407 *
408 * @bus: Bus to check
409 * @return speed of selected I2C bus in Hz, -ve on error
410 */
411 int (*get_bus_speed)(struct udevice *bus);
412
413 /**
414 * set_flags() - set the flags for a chip (optional)
415 *
416 * This is generally implemented by the uclass, but drivers can
417 * check the value to ensure that unsupported options are not used.
418 * This method is optional. If provided, this method will always be
419 * called when the flags change.
420 *
421 * @dev: Chip to adjust
422 * @flags: New flags value
423 * @return 0 if OK, -EINVAL if value is unsupported
424 */
425 int (*set_flags)(struct udevice *dev, uint flags);
426
427 /**
428 * deblock() - recover a bus that is in an unknown state
429 *
430 * I2C is a synchronous protocol and resets of the processor in the
431 * middle of an access can block the I2C Bus until a powerdown of
432 * the full unit is done. This is because slaves can be stuck
433 * waiting for addition bus transitions for a transaction that will
434 * never complete. Resetting the I2C master does not help. The only
435 * way is to force the bus through a series of transitions to make
436 * sure that all slaves are done with the transaction. This method
437 * performs this 'deblocking' if support by the driver.
438 *
439 * This method is optional.
440 */
441 int (*deblock)(struct udevice *bus);
442 };
443
444 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
445
446 /**
447 * struct i2c_mux_ops - operations for an I2C mux
448 *
449 * The current mux state is expected to be stored in the mux itself since
450 * it is the only thing that knows how to make things work. The mux can
451 * record the current state and then avoid switching unless it is necessary.
452 * So select() can be skipped if the mux is already in the correct state.
453 * Also deselect() can be made a nop if required.
454 */
455 struct i2c_mux_ops {
456 /**
457 * select() - select one of of I2C buses attached to a mux
458 *
459 * This will be called when there is no bus currently selected by the
460 * mux. This method does not need to deselect the old bus since
461 * deselect() will be already have been called if necessary.
462 *
463 * @mux: Mux device
464 * @bus: I2C bus to select
465 * @channel: Channel number correponding to the bus to select
466 * @return 0 if OK, -ve on error
467 */
468 int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
469
470 /**
471 * deselect() - select one of of I2C buses attached to a mux
472 *
473 * This is used to deselect the currently selected I2C bus.
474 *
475 * @mux: Mux device
476 * @bus: I2C bus to deselect
477 * @channel: Channel number correponding to the bus to deselect
478 * @return 0 if OK, -ve on error
479 */
480 int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
481 };
482
483 #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
484
485 /**
486 * i2c_get_chip() - get a device to use to access a chip on a bus
487 *
488 * This returns the device for the given chip address. The device can then
489 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
490 *
491 * @bus: Bus to examine
492 * @chip_addr: Chip address for the new device
493 * @offset_len: Length of a register offset in bytes (normally 1)
494 * @devp: Returns pointer to new device if found or -ENODEV if not
495 * found
496 */
497 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
498 struct udevice **devp);
499
500 /**
501 * i2c_get_chip_for_busnum() - get a device to use to access a chip on
502 * a bus number
503 *
504 * This returns the device for the given chip address on a particular bus
505 * number.
506 *
507 * @busnum: Bus number to examine
508 * @chip_addr: Chip address for the new device
509 * @offset_len: Length of a register offset in bytes (normally 1)
510 * @devp: Returns pointer to new device if found or -ENODEV if not
511 * found
512 */
513 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
514 struct udevice **devp);
515
516 /**
517 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
518 *
519 * This decodes the chip address from a device tree node and puts it into
520 * its dm_i2c_chip structure. This should be called in your driver's
521 * ofdata_to_platdata() method.
522 *
523 * @blob: Device tree blob
524 * @node: Node offset to read from
525 * @spi: Place to put the decoded information
526 */
527 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
528
529 /**
530 * i2c_dump_msgs() - Dump a list of I2C messages
531 *
532 * This may be useful for debugging.
533 *
534 * @msg: Message list to dump
535 * @nmsgs: Number of messages
536 */
537 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
538
539 /**
540 * i2c_emul_find() - Find an emulator for an i2c sandbox device
541 *
542 * This looks at the device's 'emul' phandle
543 *
544 * @dev: Device to find an emulator for
545 * @emulp: Returns the associated emulator, if found *
546 * @return 0 if OK, -ENOENT or -ENODEV if not found
547 */
548 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
549
550 /**
551 * i2c_emul_get_device() - Find the device being emulated
552 *
553 * Given an emulator this returns the associated device
554 *
555 * @emul: Emulator for the device
556 * @return device that @emul is emulating
557 */
558 struct udevice *i2c_emul_get_device(struct udevice *emul);
559
560 #ifndef CONFIG_DM_I2C
561
562 /*
563 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
564 *
565 * The implementation MUST NOT use static or global variables if the
566 * I2C routines are used to read SDRAM configuration information
567 * because this is done before the memories are initialized. Limited
568 * use of stack-based variables are OK (the initial stack size is
569 * limited).
570 *
571 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
572 */
573
574 /*
575 * Configuration items.
576 */
577 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
578
579 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
580 /* no muxes used bus = i2c adapters */
581 #define CONFIG_SYS_I2C_DIRECT_BUS 1
582 #define CONFIG_SYS_I2C_MAX_HOPS 0
583 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
584 #else
585 /* we use i2c muxes */
586 #undef CONFIG_SYS_I2C_DIRECT_BUS
587 #endif
588
589 /* define the I2C bus number for RTC and DTT if not already done */
590 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
591 #define CONFIG_SYS_RTC_BUS_NUM 0
592 #endif
593 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
594 #define CONFIG_SYS_SPD_BUS_NUM 0
595 #endif
596
597 struct i2c_adapter {
598 void (*init)(struct i2c_adapter *adap, int speed,
599 int slaveaddr);
600 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
601 int (*read)(struct i2c_adapter *adap, uint8_t chip,
602 uint addr, int alen, uint8_t *buffer,
603 int len);
604 int (*write)(struct i2c_adapter *adap, uint8_t chip,
605 uint addr, int alen, uint8_t *buffer,
606 int len);
607 uint (*set_bus_speed)(struct i2c_adapter *adap,
608 uint speed);
609 int speed;
610 int waitdelay;
611 int slaveaddr;
612 int init_done;
613 int hwadapnr;
614 char *name;
615 };
616
617 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
618 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
619 { \
620 .init = _init, \
621 .probe = _probe, \
622 .read = _read, \
623 .write = _write, \
624 .set_bus_speed = _set_speed, \
625 .speed = _speed, \
626 .slaveaddr = _slaveaddr, \
627 .init_done = 0, \
628 .hwadapnr = _hwadapnr, \
629 .name = #_name \
630 };
631
632 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
633 _set_speed, _speed, _slaveaddr, _hwadapnr) \
634 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
635 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
636 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
637
638 struct i2c_adapter *i2c_get_adapter(int index);
639
640 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
641 struct i2c_mux {
642 int id;
643 char name[16];
644 };
645
646 struct i2c_next_hop {
647 struct i2c_mux mux;
648 uint8_t chip;
649 uint8_t channel;
650 };
651
652 struct i2c_bus_hose {
653 int adapter;
654 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
655 };
656 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
657 extern struct i2c_bus_hose i2c_bus[];
658
659 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
660 #else
661 #define I2C_ADAPTER(bus) bus
662 #endif
663 #define I2C_BUS gd->cur_i2c_bus
664
665 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
666 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
667 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
668
669 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
670 #define I2C_MUX_PCA9540_ID 1
671 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
672 #define I2C_MUX_PCA9542_ID 2
673 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
674 #define I2C_MUX_PCA9544_ID 3
675 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
676 #define I2C_MUX_PCA9547_ID 4
677 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
678 #define I2C_MUX_PCA9548_ID 5
679 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
680 #endif
681
682 #ifndef I2C_SOFT_DECLARATIONS
683 # if (defined(CONFIG_AT91RM9200) || \
684 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
685 defined(CONFIG_AT91SAM9263))
686 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
687 # else
688 # define I2C_SOFT_DECLARATIONS
689 # endif
690 #endif
691
692 /*
693 * Many boards/controllers/drivers don't support an I2C slave interface so
694 * provide a default slave address for them for use in common code. A real
695 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
696 * support a slave interface.
697 */
698 #ifndef CONFIG_SYS_I2C_SLAVE
699 #define CONFIG_SYS_I2C_SLAVE 0xfe
700 #endif
701
702 /*
703 * Initialization, must be called once on start up, may be called
704 * repeatedly to change the speed and slave addresses.
705 */
706 #ifdef CONFIG_SYS_I2C_EARLY_INIT
707 void i2c_early_init_f(void);
708 #endif
709 void i2c_init(int speed, int slaveaddr);
710 void i2c_init_board(void);
711
712 #ifdef CONFIG_SYS_I2C
713 /*
714 * i2c_get_bus_num:
715 *
716 * Returns index of currently active I2C bus. Zero-based.
717 */
718 unsigned int i2c_get_bus_num(void);
719
720 /*
721 * i2c_set_bus_num:
722 *
723 * Change the active I2C bus. Subsequent read/write calls will
724 * go to this one.
725 *
726 * bus - bus index, zero based
727 *
728 * Returns: 0 on success, not 0 on failure
729 *
730 */
731 int i2c_set_bus_num(unsigned int bus);
732
733 /*
734 * i2c_init_all():
735 *
736 * Initializes all I2C adapters in the system. All i2c_adap structures must
737 * be initialized beforehead with function pointers and data, including
738 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
739 */
740 void i2c_init_all(void);
741
742 /*
743 * Probe the given I2C chip address. Returns 0 if a chip responded,
744 * not 0 on failure.
745 */
746 int i2c_probe(uint8_t chip);
747
748 /*
749 * Read/Write interface:
750 * chip: I2C chip address, range 0..127
751 * addr: Memory (register) address within the chip
752 * alen: Number of bytes to use for addr (typically 1, 2 for larger
753 * memories, 0 for register type devices with only one
754 * register)
755 * buffer: Where to read/write the data
756 * len: How many bytes to read/write
757 *
758 * Returns: 0 on success, not 0 on failure
759 */
760 int i2c_read(uint8_t chip, unsigned int addr, int alen,
761 uint8_t *buffer, int len);
762
763 int i2c_write(uint8_t chip, unsigned int addr, int alen,
764 uint8_t *buffer, int len);
765
766 /*
767 * Utility routines to read/write registers.
768 */
769 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
770
771 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
772
773 /*
774 * i2c_set_bus_speed:
775 *
776 * Change the speed of the active I2C bus
777 *
778 * speed - bus speed in Hz
779 *
780 * Returns: new bus speed
781 *
782 */
783 unsigned int i2c_set_bus_speed(unsigned int speed);
784
785 /*
786 * i2c_get_bus_speed:
787 *
788 * Returns speed of currently active I2C bus in Hz
789 */
790
791 unsigned int i2c_get_bus_speed(void);
792
793 #else
794
795 /*
796 * Probe the given I2C chip address. Returns 0 if a chip responded,
797 * not 0 on failure.
798 */
799 int i2c_probe(uchar chip);
800
801 /*
802 * Read/Write interface:
803 * chip: I2C chip address, range 0..127
804 * addr: Memory (register) address within the chip
805 * alen: Number of bytes to use for addr (typically 1, 2 for larger
806 * memories, 0 for register type devices with only one
807 * register)
808 * buffer: Where to read/write the data
809 * len: How many bytes to read/write
810 *
811 * Returns: 0 on success, not 0 on failure
812 */
813 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
814 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
815
816 /*
817 * Utility routines to read/write registers.
818 */
i2c_reg_read(u8 addr,u8 reg)819 static inline u8 i2c_reg_read(u8 addr, u8 reg)
820 {
821 u8 buf;
822
823 #ifdef DEBUG
824 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
825 #endif
826
827 i2c_read(addr, reg, 1, &buf, 1);
828
829 return buf;
830 }
831
i2c_reg_write(u8 addr,u8 reg,u8 val)832 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
833 {
834 #ifdef DEBUG
835 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
836 __func__, addr, reg, val);
837 #endif
838
839 i2c_write(addr, reg, 1, &val, 1);
840 }
841
842 /*
843 * Functions for setting the current I2C bus and its speed
844 */
845
846 /*
847 * i2c_set_bus_num:
848 *
849 * Change the active I2C bus. Subsequent read/write calls will
850 * go to this one.
851 *
852 * bus - bus index, zero based
853 *
854 * Returns: 0 on success, not 0 on failure
855 *
856 */
857 int i2c_set_bus_num(unsigned int bus);
858
859 /*
860 * i2c_get_bus_num:
861 *
862 * Returns index of currently active I2C bus. Zero-based.
863 */
864
865 unsigned int i2c_get_bus_num(void);
866
867 /*
868 * i2c_set_bus_speed:
869 *
870 * Change the speed of the active I2C bus
871 *
872 * speed - bus speed in Hz
873 *
874 * Returns: 0 on success, not 0 on failure
875 *
876 */
877 int i2c_set_bus_speed(unsigned int);
878
879 /*
880 * i2c_get_bus_speed:
881 *
882 * Returns speed of currently active I2C bus in Hz
883 */
884
885 unsigned int i2c_get_bus_speed(void);
886 #endif /* CONFIG_SYS_I2C */
887
888 /*
889 * only for backwardcompatibility, should go away if we switched
890 * completely to new multibus support.
891 */
892 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
893 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
894 # define CONFIG_SYS_MAX_I2C_BUS 2
895 # endif
896 # define I2C_MULTI_BUS 1
897 #else
898 # define CONFIG_SYS_MAX_I2C_BUS 1
899 # define I2C_MULTI_BUS 0
900 #endif
901
902 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
903 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
I2C_GET_BUS(void)904 static inline unsigned int I2C_GET_BUS(void)
905 {
906 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
907 }
908
909 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
I2C_SET_BUS(unsigned int bus)910 static inline void I2C_SET_BUS(unsigned int bus)
911 {
912 if (I2C_MULTI_BUS)
913 i2c_set_bus_num(bus);
914 }
915
916 /* Multi I2C definitions */
917 enum {
918 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
919 I2C_8, I2C_9, I2C_10,
920 };
921
922 /**
923 * Get FDT values for i2c bus.
924 *
925 * @param blob Device tree blbo
926 * @return the number of I2C bus
927 */
928 void board_i2c_init(const void *blob);
929
930 /**
931 * Find the I2C bus number by given a FDT I2C node.
932 *
933 * @param blob Device tree blbo
934 * @param node FDT I2C node to find
935 * @return the number of I2C bus (zero based), or -1 on error
936 */
937 int i2c_get_bus_num_fdt(int node);
938
939 /**
940 * Reset the I2C bus represented by the given a FDT I2C node.
941 *
942 * @param blob Device tree blbo
943 * @param node FDT I2C node to find
944 * @return 0 if port was reset, -1 if not found
945 */
946 int i2c_reset_port_fdt(const void *blob, int node);
947
948 #endif /* !CONFIG_DM_I2C */
949
950 #endif /* _I2C_H_ */
951