xref: /openbmc/u-boot/include/gdsys_fpga.h (revision dd580801)
1 /*
2  * (C) Copyright 2010
3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __GDSYS_FPGA_H
9 #define __GDSYS_FPGA_H
10 
11 int init_func_fpga(void);
12 
13 enum {
14 	FPGA_STATE_DONE_FAILED = 1 << 0,
15 	FPGA_STATE_REFLECTION_FAILED = 1 << 1,
16 	FPGA_STATE_PLATFORM = 1 << 2,
17 };
18 
19 int get_fpga_state(unsigned dev);
20 void print_fpga_state(unsigned dev);
21 
22 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data);
23 int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data);
24 
25 extern struct ihs_fpga *fpga_ptr[];
26 
27 #define FPGA_SET_REG(ix, fld, val) \
28 	fpga_set_reg((ix), \
29 		     &fpga_ptr[ix]->fld, \
30 		     offsetof(struct ihs_fpga, fld), \
31 		     val)
32 
33 #define FPGA_GET_REG(ix, fld, val) \
34 	fpga_get_reg((ix), \
35 		     &fpga_ptr[ix]->fld, \
36 		     offsetof(struct ihs_fpga, fld), \
37 		     val)
38 
39 struct ihs_gpio {
40 	u16 read;
41 	u16 clear;
42 	u16 set;
43 };
44 
45 struct ihs_i2c {
46 	u16 interrupt_status;
47 	u16 interrupt_enable;
48 	u16 write_mailbox_ext;
49 	u16 write_mailbox;
50 	u16 read_mailbox_ext;
51 	u16 read_mailbox;
52 };
53 
54 struct ihs_osd {
55 	u16 version;
56 	u16 features;
57 	u16 control;
58 	u16 xy_size;
59 	u16 xy_scale;
60 	u16 x_pos;
61 	u16 y_pos;
62 };
63 
64 #ifdef CONFIG_NEO
65 struct ihs_fpga {
66 	u16 reflection_low;	/* 0x0000 */
67 	u16 versions;		/* 0x0002 */
68 	u16 fpga_features;	/* 0x0004 */
69 	u16 fpga_version;	/* 0x0006 */
70 	u16 reserved_0[8187];	/* 0x0008 */
71 	u16 reflection_high;	/* 0x3ffe */
72 };
73 #endif
74 
75 #ifdef CONFIG_IO
76 struct ihs_fpga {
77 	u16 reflection_low;	/* 0x0000 */
78 	u16 versions;		/* 0x0002 */
79 	u16 fpga_features;	/* 0x0004 */
80 	u16 fpga_version;	/* 0x0006 */
81 	u16 reserved_0[5];	/* 0x0008 */
82 	u16 quad_serdes_reset;	/* 0x0012 */
83 	u16 reserved_1[8181];	/* 0x0014 */
84 	u16 reflection_high;	/* 0x3ffe */
85 };
86 #endif
87 
88 #ifdef CONFIG_IO64
89 struct ihs_fpga_channel {
90 	u16 status_int;
91 	u16 config_int;
92 	u16 switch_connect_config;
93 	u16 tx_destination;
94 };
95 
96 struct ihs_fpga_hicb {
97 	u16 status_int;
98 	u16 config_int;
99 };
100 
101 struct ihs_fpga {
102 	u16 reflection_low;	/* 0x0000 */
103 	u16 versions;		/* 0x0002 */
104 	u16 fpga_features;	/* 0x0004 */
105 	u16 fpga_version;	/* 0x0006 */
106 	u16 reserved_0[5];	/* 0x0008 */
107 	u16 quad_serdes_reset;	/* 0x0012 */
108 	u16 reserved_1[502];	/* 0x0014 */
109 	struct ihs_fpga_channel ch[32];		/* 0x0400 */
110 	struct ihs_fpga_channel hicb_ch[32];	/* 0x0500 */
111 	u16 reserved_2[7487];	/* 0x0580 */
112 	u16 reflection_high;	/* 0x3ffe */
113 };
114 #endif
115 
116 #ifdef CONFIG_IOCON
117 struct ihs_fpga {
118 	u16 reflection_low;	/* 0x0000 */
119 	u16 versions;		/* 0x0002 */
120 	u16 fpga_version;	/* 0x0004 */
121 	u16 fpga_features;	/* 0x0006 */
122 	u16 reserved_0[6];	/* 0x0008 */
123 	struct ihs_gpio gpio;	/* 0x0014 */
124 	u16 mpc3w_control;	/* 0x001a */
125 	u16 reserved_1[18];	/* 0x001c */
126 	struct ihs_i2c i2c;	/* 0x0040 */
127 	u16 reserved_2[10];	/* 0x004c */
128 	u16 mc_int;		/* 0x0060 */
129 	u16 mc_int_en;		/* 0x0062 */
130 	u16 mc_status;		/* 0x0064 */
131 	u16 mc_control;		/* 0x0066 */
132 	u16 mc_tx_data;		/* 0x0068 */
133 	u16 mc_tx_address;	/* 0x006a */
134 	u16 mc_tx_cmd;		/* 0x006c */
135 	u16 mc_res;		/* 0x006e */
136 	u16 mc_rx_cmd_status;	/* 0x0070 */
137 	u16 mc_rx_data;		/* 0x0072 */
138 	u16 reserved_3[69];	/* 0x0074 */
139 	u16 reflection_high;	/* 0x00fe */
140 	struct ihs_osd osd;	/* 0x0100 */
141 	u16 reserved_4[889];	/* 0x010e */
142 	u16 videomem[31736];	/* 0x0800 */
143 };
144 #endif
145 
146 #ifdef CONFIG_DLVISION_10G
147 struct ihs_fpga {
148 	u16 reflection_low;	/* 0x0000 */
149 	u16 versions;		/* 0x0002 */
150 	u16 fpga_version;	/* 0x0004 */
151 	u16 fpga_features;	/* 0x0006 */
152 	u16 reserved_0[10];	/* 0x0008 */
153 	u16 extended_interrupt; /* 0x001c */
154 	u16 reserved_1[29];	/* 0x001e */
155 	u16 mpc3w_control;	/* 0x0058 */
156 	u16 reserved_2[3];	/* 0x005a */
157 	struct ihs_i2c i2c;	/* 0x0060 */
158 	u16 reserved_3[205];	/* 0x0066 */
159 	struct ihs_osd osd;	/* 0x0200 */
160 	u16 reserved_4[761];	/* 0x020e */
161 	u16 videomem[31736];	/* 0x0800 */
162 };
163 #endif
164 
165 #endif
166