1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2016 Freescale Semiconductor, Inc. 4 * 5 */ 6 7 #ifdef CONFIG_ARCH_MX7ULP 8 struct lpuart_fsl_reg32 { 9 u32 verid; 10 u32 param; 11 u32 global; 12 u32 pincfg; 13 u32 baud; 14 u32 stat; 15 u32 ctrl; 16 u32 data; 17 u32 match; 18 u32 modir; 19 u32 fifo; 20 u32 water; 21 }; 22 #else 23 struct lpuart_fsl_reg32 { 24 u32 baud; 25 u32 stat; 26 u32 ctrl; 27 u32 data; 28 u32 match; 29 u32 modir; 30 u32 fifo; 31 u32 water; 32 }; 33 #endif 34 35 struct lpuart_fsl { 36 u8 ubdh; 37 u8 ubdl; 38 u8 uc1; 39 u8 uc2; 40 u8 us1; 41 u8 us2; 42 u8 uc3; 43 u8 ud; 44 u8 uma1; 45 u8 uma2; 46 u8 uc4; 47 u8 uc5; 48 u8 ued; 49 u8 umodem; 50 u8 uir; 51 u8 reserved; 52 u8 upfifo; 53 u8 ucfifo; 54 u8 usfifo; 55 u8 utwfifo; 56 u8 utcfifo; 57 u8 urwfifo; 58 u8 urcfifo; 59 u8 rsvd[28]; 60 }; 61 62 /* Used on i.MX7ULP */ 63 #define LPUART_BAUD_BOTHEDGE_MASK (0x20000) 64 #define LPUART_BAUD_OSR_MASK (0x1F000000) 65 #define LPUART_BAUD_OSR_SHIFT (24) 66 #define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000) 67 #define LPUART_BAUD_SBR_MASK (0x1FFF) 68 #define LPUART_BAUD_SBR_SHIFT (0U) 69 #define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF) 70 #define LPUART_BAUD_M10_MASK (0x20000000U) 71 #define LPUART_BAUD_SBNS_MASK (0x2000U) 72