1 /* 2 * FSL SD/MMC Defines 3 *------------------------------------------------------------------- 4 * 5 * Copyright 2007-2008, Freescale Semiconductor, Inc 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 * 22 *------------------------------------------------------------------- 23 * 24 */ 25 26 #ifndef __FSL_ESDHC_H__ 27 #define __FSL_ESDHC_H__ 28 29 #include <asm/errno.h> 30 31 /* FSL eSDHC-specific constants */ 32 #define SYSCTL 0x0002e02c 33 #define SYSCTL_INITA 0x08000000 34 #define SYSCTL_TIMEOUT_MASK 0x000f0000 35 #define SYSCTL_CLOCK_MASK 0x00000fff 36 #define SYSCTL_PEREN 0x00000004 37 #define SYSCTL_HCKEN 0x00000002 38 #define SYSCTL_IPGEN 0x00000001 39 40 #define IRQSTAT 0x0002e030 41 #define IRQSTAT_DMAE (0x10000000) 42 #define IRQSTAT_AC12E (0x01000000) 43 #define IRQSTAT_DEBE (0x00400000) 44 #define IRQSTAT_DCE (0x00200000) 45 #define IRQSTAT_DTOE (0x00100000) 46 #define IRQSTAT_CIE (0x00080000) 47 #define IRQSTAT_CEBE (0x00040000) 48 #define IRQSTAT_CCE (0x00020000) 49 #define IRQSTAT_CTOE (0x00010000) 50 #define IRQSTAT_CINT (0x00000100) 51 #define IRQSTAT_CRM (0x00000080) 52 #define IRQSTAT_CINS (0x00000040) 53 #define IRQSTAT_BRR (0x00000020) 54 #define IRQSTAT_BWR (0x00000010) 55 #define IRQSTAT_DINT (0x00000008) 56 #define IRQSTAT_BGE (0x00000004) 57 #define IRQSTAT_TC (0x00000002) 58 #define IRQSTAT_CC (0x00000001) 59 60 #define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE) 61 #define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE) 62 63 #define IRQSTATEN 0x0002e034 64 #define IRQSTATEN_DMAE (0x10000000) 65 #define IRQSTATEN_AC12E (0x01000000) 66 #define IRQSTATEN_DEBE (0x00400000) 67 #define IRQSTATEN_DCE (0x00200000) 68 #define IRQSTATEN_DTOE (0x00100000) 69 #define IRQSTATEN_CIE (0x00080000) 70 #define IRQSTATEN_CEBE (0x00040000) 71 #define IRQSTATEN_CCE (0x00020000) 72 #define IRQSTATEN_CTOE (0x00010000) 73 #define IRQSTATEN_CINT (0x00000100) 74 #define IRQSTATEN_CRM (0x00000080) 75 #define IRQSTATEN_CINS (0x00000040) 76 #define IRQSTATEN_BRR (0x00000020) 77 #define IRQSTATEN_BWR (0x00000010) 78 #define IRQSTATEN_DINT (0x00000008) 79 #define IRQSTATEN_BGE (0x00000004) 80 #define IRQSTATEN_TC (0x00000002) 81 #define IRQSTATEN_CC (0x00000001) 82 83 #define PRSSTAT 0x0002e024 84 #define PRSSTAT_CLSL (0x00800000) 85 #define PRSSTAT_WPSPL (0x00080000) 86 #define PRSSTAT_CDPL (0x00040000) 87 #define PRSSTAT_CINS (0x00010000) 88 #define PRSSTAT_BREN (0x00000800) 89 #define PRSSTAT_DLA (0x00000004) 90 #define PRSSTAT_CICHB (0x00000002) 91 #define PRSSTAT_CIDHB (0x00000001) 92 93 #define PROCTL 0x0002e028 94 #define PROCTL_INIT 0x00000020 95 #define PROCTL_DTW_4 0x00000002 96 #define PROCTL_DTW_8 0x00000004 97 98 #define CMDARG 0x0002e008 99 100 #define XFERTYP 0x0002e00c 101 #define XFERTYP_CMD(x) ((x & 0x3f) << 24) 102 #define XFERTYP_CMDTYP_NORMAL 0x0 103 #define XFERTYP_CMDTYP_SUSPEND 0x00400000 104 #define XFERTYP_CMDTYP_RESUME 0x00800000 105 #define XFERTYP_CMDTYP_ABORT 0x00c00000 106 #define XFERTYP_DPSEL 0x00200000 107 #define XFERTYP_CICEN 0x00100000 108 #define XFERTYP_CCCEN 0x00080000 109 #define XFERTYP_RSPTYP_NONE 0 110 #define XFERTYP_RSPTYP_136 0x00010000 111 #define XFERTYP_RSPTYP_48 0x00020000 112 #define XFERTYP_RSPTYP_48_BUSY 0x00030000 113 #define XFERTYP_MSBSEL 0x00000020 114 #define XFERTYP_DTDSEL 0x00000010 115 #define XFERTYP_AC12EN 0x00000004 116 #define XFERTYP_BCEN 0x00000002 117 #define XFERTYP_DMAEN 0x00000001 118 119 #define CINS_TIMEOUT 1000 120 121 #define DSADDR 0x2e004 122 123 #define CMDRSP0 0x2e010 124 #define CMDRSP1 0x2e014 125 #define CMDRSP2 0x2e018 126 #define CMDRSP3 0x2e01c 127 128 #define DATPORT 0x2e020 129 130 #define WML 0x2e044 131 #define WML_WRITE 0x00010000 132 133 #define BLKATTR 0x2e004 134 #define BLKATTR_CNT(x) ((x & 0xffff) << 16) 135 #define BLKATTR_SIZE(x) (x & 0x1fff) 136 #define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */ 137 138 #define ESDHC_HOSTCAPBLT_VS18 0x04000000 139 #define ESDHC_HOSTCAPBLT_VS30 0x02000000 140 #define ESDHC_HOSTCAPBLT_VS33 0x01000000 141 #define ESDHC_HOSTCAPBLT_SRS 0x00800000 142 #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 143 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 144 145 #ifdef CONFIG_FSL_ESDHC 146 int fsl_esdhc_mmc_init(bd_t *bis); 147 void fdt_fixup_esdhc(void *blob, bd_t *bd); 148 #else 149 static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } 150 static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} 151 #endif /* CONFIG_FSL_ESDHC */ 152 153 #endif /* __FSL_ESDHC_H__ */ 154