1 /* 2 * (C) Copyright 2000, 2001 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef _FLASH_H_ 25 #define _FLASH_H_ 26 27 #ifndef CFG_NO_FLASH 28 /*----------------------------------------------------------------------- 29 * FLASH Info: contains chip specific data, per FLASH bank 30 */ 31 32 typedef struct { 33 ulong size; /* total bank size in bytes */ 34 ushort sector_count; /* number of erase units */ 35 ulong flash_id; /* combined device & manufacturer code */ 36 ulong start[CFG_MAX_FLASH_SECT]; /* physical sector start addresses */ 37 uchar protect[CFG_MAX_FLASH_SECT]; /* sector protection status */ 38 #ifdef CFG_FLASH_CFI 39 uchar portwidth; /* the width of the port */ 40 uchar chipwidth; /* the width of the chip */ 41 ushort buffer_size; /* # of bytes in write buffer */ 42 ulong erase_blk_tout; /* maximum block erase timeout */ 43 ulong write_tout; /* maximum write timeout */ 44 ulong buffer_write_tout; /* maximum buffer write timeout */ 45 46 #endif 47 } flash_info_t; 48 49 /* 50 * Values for the width of the port 51 */ 52 #define FLASH_CFI_8BIT 0x01 53 #define FLASH_CFI_16BIT 0x02 54 #define FLASH_CFI_32BIT 0x04 55 #define FLASH_CFI_64BIT 0x08 56 /* 57 * Values for the width of the chip 58 */ 59 #define FLASH_CFI_BY8 0x01 60 #define FLASH_CFI_BY16 0x02 61 #define FLASH_CFI_BY32 0x04 62 #define FLASH_CFI_BY64 0x08 63 64 /* Prototypes */ 65 66 extern unsigned long flash_init (void); 67 extern void flash_print_info (flash_info_t *); 68 extern int flash_erase (flash_info_t *, int, int); 69 extern int flash_sect_erase (ulong addr_first, ulong addr_last); 70 extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); 71 72 /* common/flash.c */ 73 extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info); 74 extern int flash_write (uchar *, ulong, ulong); 75 extern flash_info_t *addr2info (ulong); 76 extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); 77 78 /* board/?/flash.c */ 79 #if defined(CFG_FLASH_PROTECTION) 80 extern int flash_real_protect(flash_info_t *info, long sector, int prot); 81 #endif /* CFG_FLASH_PROTECTION */ 82 83 /*----------------------------------------------------------------------- 84 * return codes from flash_write(): 85 */ 86 #define ERR_OK 0 87 #define ERR_TIMOUT 1 88 #define ERR_NOT_ERASED 2 89 #define ERR_PROTECTED 4 90 #define ERR_INVAL 8 91 #define ERR_ALIGN 16 92 #define ERR_UNKNOWN_FLASH_VENDOR 32 93 #define ERR_UNKNOWN_FLASH_TYPE 64 94 #define ERR_PROG_ERROR 128 95 96 /*----------------------------------------------------------------------- 97 * Protection Flags for flash_protect(): 98 */ 99 #define FLAG_PROTECT_SET 0x01 100 #define FLAG_PROTECT_CLEAR 0x02 101 102 /*----------------------------------------------------------------------- 103 * Device IDs 104 */ 105 106 #define AMD_MANUFACT 0x00010001 /* AMD manuf. ID in D23..D16, D7..D0 */ 107 #define FUJ_MANUFACT 0x00040004 /* FUJITSU manuf. ID in D23..D16, D7..D0 */ 108 #define STM_MANUFACT 0x00200020 /* STM (Thomson) manuf. ID in D23.. -"- */ 109 #define SST_MANUFACT 0x00BF00BF /* SST manuf. ID in D23..D16, D7..D0 */ 110 #define MT_MANUFACT 0x00890089 /* MT manuf. ID in D23..D16, D7..D0 */ 111 #define INTEL_MANUFACT 0x00890089 /* INTEL manuf. ID in D23..D16, D7..D0 */ 112 #define INTEL_ALT_MANU 0x00B000B0 /* alternate INTEL namufacturer ID */ 113 #define MX_MANUFACT 0x00C200C2 /* MXIC manuf. ID in D23..D16, D7..D0 */ 114 115 /* Micron Technologies (INTEL compat.) */ 116 #define MT_ID_28F400_T 0x44704470 /* 28F400B3 ID ( 4 M, top boot sector) */ 117 #define MT_ID_28F400_B 0x44714471 /* 28F400B3 ID ( 4 M, bottom boot sect) */ 118 119 #define AMD_ID_LV040B 0x4F /* 29LV040B ID */ 120 /* 4 Mbit, 512K x 8, */ 121 /* 8 64K x 8 uniform sectors */ 122 123 #define AMD_ID_F040B 0xA4 /* 29F040B ID */ 124 /* 4 Mbit, 512K x 8, */ 125 /* 8 64K x 8 uniform sectors */ 126 #define STM_ID_M29W040B 0xE3 /* M29W040B ID */ 127 /* 4 Mbit, 512K x 8, */ 128 /* 8 64K x 8 uniform sectors */ 129 #define AMD_ID_F080B 0xD5 /* 29F080 ID ( 1 M) */ 130 #define AMD_ID_F016D 0xAD /* 29F016 ID ( 2 M x 8) */ 131 #define AMD_ID_F032B 0x41 /* 29F032 ID ( 4 M x 8) */ 132 #define AMD_ID_LV116DT 0xC7 /* 29LV116DT ( 2 M x 8, top boot sect) */ 133 134 #define AMD_ID_LV400T 0x22B922B9 /* 29LV400T ID ( 4 M, top boot sector) */ 135 #define AMD_ID_LV400B 0x22BA22BA /* 29LV400B ID ( 4 M, bottom boot sect) */ 136 137 #define AMD_ID_LV033C 0xA3 /* 29LV033C ID ( 4M x 8 ) */ 138 139 #define AMD_ID_LV800T 0x22DA22DA /* 29LV800T ID ( 8 M, top boot sector) */ 140 #define AMD_ID_LV800B 0x225B225B /* 29LV800B ID ( 8 M, bottom boot sect) */ 141 142 #define AMD_ID_LV160T 0x22C422C4 /* 29LV160T ID (16 M, top boot sector) */ 143 #define AMD_ID_LV160B 0x22492249 /* 29LV160B ID (16 M, bottom boot sect) */ 144 145 #define AMD_ID_LV320T 0x22F622F6 /* 29LV320T ID (32 M, top boot sector) */ 146 #define AMD_ID_LV320B 0x22F922F9 /* 29LV320B ID (32 M, bottom boot sect) */ 147 148 #define AMD_ID_DL322T 0x22552255 /* 29DL322T ID (32 M, top boot sector) */ 149 #define AMD_ID_DL322B 0x22562256 /* 29DL322B ID (32 M, bottom boot sect) */ 150 #define AMD_ID_DL323T 0x22502250 /* 29DL323T ID (32 M, top boot sector) */ 151 #define AMD_ID_DL323B 0x22532253 /* 29DL323B ID (32 M, bottom boot sect) */ 152 #define AMD_ID_DL324T 0x225C225C /* 29DL324T ID (32 M, top boot sector) */ 153 #define AMD_ID_DL324B 0x225F225F /* 29DL324B ID (32 M, bottom boot sect) */ 154 155 #define AMD_ID_DL640 0x227E227E /* 29DL640D ID (64 M, dual boot sectors)*/ 156 #define AMD_ID_LV640U 0x22D722D7 /* 29LV640U ID (64 M, uniform sectors) */ 157 158 #define SST_ID_xF200A 0x27892789 /* 39xF200A ID ( 2M = 128K x 16 ) */ 159 #define SST_ID_xF400A 0x27802780 /* 39xF400A ID ( 4M = 256K x 16 ) */ 160 #define SST_ID_xF800A 0x27812781 /* 39xF800A ID ( 8M = 512K x 16 ) */ 161 #define SST_ID_xF160A 0x27822782 /* 39xF800A ID (16M = 1M x 16 ) */ 162 163 #define STM_ID_F040B 0xE2 /* M29F040B ID ( 4M = 512K x 8 ) */ 164 /* 8 64K x 8 uniform sectors */ 165 166 #define STM_ID_x800AB 0x005B005B /* M29W800AB ID (8M = 512K x 16 ) */ 167 #define STM_ID_29W320DT 0x22CA22CA /* M29W320DT ID (32 M, top boot sector) */ 168 #define STM_ID_29W320DB 0x22CB22CB /* M29W320DB ID (32 M, bottom boot sect) */ 169 #define STM_ID_29W040B 0x00E300E3 /* M29W040B ID (4M = 512K x 8) */ 170 171 #define INTEL_ID_28F016S 0x66a066a0 /* 28F016S[VS] ID (16M = 512k x 16) */ 172 #define INTEL_ID_28F800B3T 0x88928892 /* 8M = 512K x 16 top boot sector */ 173 #define INTEL_ID_28F800B3B 0x88938893 /* 8M = 512K x 16 bottom boot sector */ 174 #define INTEL_ID_28F160B3T 0x88908890 /* 16M = 1M x 16 top boot sector */ 175 #define INTEL_ID_28F160B3B 0x88918891 /* 16M = 1M x 16 bottom boot sector */ 176 #define INTEL_ID_28F320B3T 0x88968896 /* 32M = 2M x 16 top boot sector */ 177 #define INTEL_ID_28F320B3B 0x88978897 /* 32M = 2M x 16 bottom boot sector */ 178 #define INTEL_ID_28F640B3T 0x88988898 /* 64M = 4M x 16 top boot sector */ 179 #define INTEL_ID_28F640B3B 0x88998899 /* 64M = 4M x 16 bottom boot sector */ 180 #define INTEL_ID_28F160F3B 0x88F488F4 /* 16M = 1M x 16 bottom boot sector */ 181 182 #define INTEL_ID_28F800C3T 0x88C088C0 /* 8M = 512K x 16 top boot sector */ 183 #define INTEL_ID_28F800C3B 0x88C188C1 /* 8M = 512K x 16 bottom boot sector */ 184 #define INTEL_ID_28F160C3T 0x88C288C2 /* 16M = 1M x 16 top boot sector */ 185 #define INTEL_ID_28F160C3B 0x88C388C3 /* 16M = 1M x 16 bottom boot sector */ 186 #define INTEL_ID_28F320C3T 0x88C488C4 /* 32M = 2M x 16 top boot sector */ 187 #define INTEL_ID_28F320C3B 0x88C588C5 /* 32M = 2M x 16 bottom boot sector */ 188 #define INTEL_ID_28F640C3T 0x88CC88CC /* 64M = 4M x 16 top boot sector */ 189 #define INTEL_ID_28F640C3B 0x88CD88CD /* 64M = 4M x 16 bottom boot sector */ 190 191 #define INTEL_ID_28F128J3 0x89189818 /* 16M = 8M x 16 x 128 */ 192 #define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */ 193 #define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */ 194 #define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */ 195 #define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */ 196 197 #define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */ 198 #define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */ 199 200 /* Note that the Sharp 28F016SC is compatible with the Intel E28F016SC */ 201 #define SHARP_ID_28F016SCL 0xAAAAAAAA /* LH28F016SCT-L95 2Mx8, 32 64k blocks */ 202 #define SHARP_ID_28F016SCZ 0xA0A0A0A0 /* LH28F016SCT-Z4 2Mx8, 32 64k blocks */ 203 #define SHARP_ID_28F008SC 0xA6A6A6A6 /* LH28F008SCT-L12 1Mx8, 16 64k blocks */ 204 /* LH28F008SCR-L85 1Mx8, 16 64k blocks */ 205 206 /*----------------------------------------------------------------------- 207 * Internal FLASH identification codes 208 * 209 * Be careful when adding new type! Odd numbers are "bottom boot sector" types! 210 */ 211 212 #define FLASH_AM040 0x0001 /* AMD Am29F040B, Am29LV040B 213 * Bright Micro BM29F040 214 * Fujitsu MBM29F040A 215 * STM M29W040B 216 * SGS Thomson M29F040B 217 * 8 64K x 8 uniform sectors 218 */ 219 #define FLASH_AM400T 0x0002 /* AMD AM29LV400 */ 220 #define FLASH_AM400B 0x0003 221 #define FLASH_AM800T 0x0004 /* AMD AM29LV800 */ 222 #define FLASH_AM800B 0x0005 223 #define FLASH_AM116DT 0x0026 /* AMD AM29LV116DT (2Mx8bit) */ 224 #define FLASH_AM160T 0x0006 /* AMD AM29LV160 */ 225 #define FLASH_AM160LV 0x0046 /* AMD29LV160DB (2M = 2Mx8bit ) */ 226 #define FLASH_AM160B 0x0007 227 #define FLASH_AM320T 0x0008 /* AMD AM29LV320 */ 228 #define FLASH_AM320B 0x0009 229 230 #define FLASH_AMDL322T 0x0010 /* AMD AM29DL322 */ 231 #define FLASH_AMDL322B 0x0011 232 #define FLASH_AMDL323T 0x0012 /* AMD AM29DL323 */ 233 #define FLASH_AMDL323B 0x0013 234 #define FLASH_AMDL324T 0x0014 /* AMD AM29DL324 */ 235 #define FLASH_AMDL324B 0x0015 236 237 #define FLASH_AMDL640 0x0016 /* AMD AM29DL640D */ 238 #define FLASH_AMD016 0x0018 /* AMD AM29F016D */ 239 240 #define FLASH_SST200A 0x0040 /* SST 39xF200A ID ( 2M = 128K x 16 ) */ 241 #define FLASH_SST400A 0x0042 /* SST 39xF400A ID ( 4M = 256K x 16 ) */ 242 #define FLASH_SST800A 0x0044 /* SST 39xF800A ID ( 8M = 512K x 16 ) */ 243 #define FLASH_SST160A 0x0046 /* SST 39xF160A ID ( 16M = 1M x 16 ) */ 244 245 #define FLASH_STM800AB 0x0051 /* STM M29WF800AB ( 8M = 512K x 16 ) */ 246 #define FLASH_STMW320DT 0x0052 /* STM M29W320DT (32 M, top boot sector) */ 247 #define FLASH_STMW320DB 0x0053 /* STM M29W320DB (32 M, bottom boot sect)*/ 248 #define FLASH_STM320DB 0x00CB /* STM M29W320DB (4M = 64K x 64, bottom)*/ 249 #define FLASH_STM800DT 0x00D7 /* STM M29W800DT (1M = 64K x 16, top) */ 250 #define FLASH_STM800DB 0x005B /* STM M29W800DB (1M = 64K x 16, bottom)*/ 251 252 #define FLASH_28F400_T 0x0062 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ 253 #define FLASH_28F400_B 0x0063 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ 254 255 #define FLASH_INTEL800T 0x0074 /* INTEL 28F800B3T ( 8M = 512K x 16 ) */ 256 #define FLASH_INTEL800B 0x0075 /* INTEL 28F800B3B ( 8M = 512K x 16 ) */ 257 #define FLASH_INTEL160T 0x0076 /* INTEL 28F160B3T ( 16M = 1 M x 16 ) */ 258 #define FLASH_INTEL160B 0x0077 /* INTEL 28F160B3B ( 16M = 1 M x 16 ) */ 259 #define FLASH_INTEL320T 0x0078 /* INTEL 28F320B3T ( 32M = 2 M x 16 ) */ 260 #define FLASH_INTEL320B 0x0079 /* INTEL 28F320B3B ( 32M = 2 M x 16 ) */ 261 #define FLASH_INTEL640T 0x007A /* INTEL 28F320B3T ( 64M = 4 M x 16 ) */ 262 #define FLASH_INTEL640B 0x007B /* INTEL 28F320B3B ( 64M = 4 M x 16 ) */ 263 264 #define FLASH_28F320J3A 0x007C /* INTEL 28F320J3A ( 32M = 128K x 32) */ 265 #define FLASH_28F640J3A 0x007D /* INTEL 28F640J3A ( 64M = 128K x 64) */ 266 #define FLASH_28F128J3A 0x007E /* INTEL 28F128J3A (128M = 128K x 128) */ 267 268 #define FLASH_28F008S5 0x0080 /* Intel 28F008S5 ( 1M = 64K x 16 ) */ 269 #define FLASH_28F016SV 0x0081 /* Intel 28F016SV ( 16M = 512k x 32 ) */ 270 #define FLASH_28F800_B 0x0083 /* Intel E28F800B ( 1M = ? ) */ 271 #define FLASH_AM29F800B 0x0084 /* AMD Am29F800BB ( 1M = ? ) */ 272 #define FLASH_28F320J5 0x0085 /* Intel 28F320J5 ( 4M = 128K x 32 ) */ 273 #define FLASH_28F160S3 0x0086 /* Intel 28F160S3 ( 16M = 512K x 32 ) */ 274 #define FLASH_28F320S3 0x0088 /* Intel 28F320S3 ( 32M = 512K x 64 ) */ 275 #define FLASH_AM640U 0x0090 /* AMD Am29LV640U ( 64M = 4M x 16 ) */ 276 #define FLASH_AM033C 0x0091 /* AMD AM29LV033 ( 32M = 4M x 8 ) */ 277 #define FLASH_LH28F016SCT 0x0092 /* Sharp 28F016SCT ( 8 Meg Flash SIMM ) */ 278 #define FLASH_28F160F3B 0x0093 /* Intel 28F160F3B ( 16M = 1M x 16 ) */ 279 280 #define FLASH_28F640J5 0x0099 /* INTEL 28F640J5 ( 64M = 128K x 64) */ 281 282 #define FLASH_28F800C3T 0x009A /* Intel 28F800C3T ( 8M = 512K x 16 ) */ 283 #define FLASH_28F800C3B 0x009B /* Intel 28F800C3B ( 8M = 512K x 16 ) */ 284 #define FLASH_28F160C3T 0x009C /* Intel 28F160C3T ( 16M = 1M x 16 ) */ 285 #define FLASH_28F160C3B 0x009D /* Intel 28F160C3B ( 16M = 1M x 16 ) */ 286 #define FLASH_28F320C3T 0x009E /* Intel 28F320C3T ( 32M = 2M x 16 ) */ 287 #define FLASH_28F320C3B 0x009F /* Intel 28F320C3B ( 32M = 2M x 16 ) */ 288 #define FLASH_28F640C3T 0x00A0 /* Intel 28F640C3T ( 64M = 4M x 16 ) */ 289 #define FLASH_28F640C3B 0x00A1 /* Intel 28F640C3B ( 64M = 4M x 16 ) */ 290 291 #define FLASH_UNKNOWN 0xFFFF /* unknown flash type */ 292 293 294 /* manufacturer offsets 295 */ 296 #define FLASH_MAN_AMD 0x00000000 /* AMD */ 297 #define FLASH_MAN_FUJ 0x00010000 /* Fujitsu */ 298 #define FLASH_MAN_BM 0x00020000 /* Bright Microelectronics */ 299 #define FLASH_MAN_MX 0x00030000 /* MXIC */ 300 #define FLASH_MAN_STM 0x00040000 301 #define FLASH_MAN_SST 0x00100000 302 #define FLASH_MAN_INTEL 0x00300000 303 #define FLASH_MAN_MT 0x00400000 304 #define FLASH_MAN_SHARP 0x00500000 305 306 307 #define FLASH_TYPEMASK 0x0000FFFF /* extract FLASH type information */ 308 #define FLASH_VENDMASK 0xFFFF0000 /* extract FLASH vendor information */ 309 310 #define FLASH_AMD_COMP 0x000FFFFF /* Up to this ID, FLASH is compatible */ 311 /* with AMD, Fujitsu and SST */ 312 /* (JEDEC standard commands ?) */ 313 314 #define FLASH_BTYPE 0x0001 /* mask for bottom boot sector type */ 315 316 /*----------------------------------------------------------------------- 317 * Timeout constants: 318 * 319 * We can't find any specifications for maximum chip erase times, 320 * so these values are guestimates. 321 */ 322 #define FLASH_ERASE_TIMEOUT 120000 /* timeout for erasing in ms */ 323 #define FLASH_WRITE_TIMEOUT 500 /* timeout for writes in ms */ 324 325 #endif /* !CFG_NO_FLASH */ 326 327 #endif /* _FLASH_H_ */ 328