xref: /openbmc/u-boot/include/flash.h (revision c1393bb3)
1 /*
2  * (C) Copyright 2000-2005
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 #ifndef _FLASH_H_
25 #define _FLASH_H_
26 
27 #ifndef CONFIG_SYS_NO_FLASH
28 /*-----------------------------------------------------------------------
29  * FLASH Info: contains chip specific data, per FLASH bank
30  */
31 
32 typedef struct {
33 	ulong	size;			/* total bank size in bytes		*/
34 	ushort	sector_count;		/* number of erase units		*/
35 	ulong	flash_id;		/* combined device & manufacturer code	*/
36 	ulong	start[CONFIG_SYS_MAX_FLASH_SECT];   /* virtual sector start address */
37 	uchar	protect[CONFIG_SYS_MAX_FLASH_SECT]; /* sector protection status	*/
38 #ifdef CONFIG_SYS_FLASH_CFI
39 	uchar	portwidth;		/* the width of the port		*/
40 	uchar	chipwidth;		/* the width of the chip		*/
41 	ushort	buffer_size;		/* # of bytes in write buffer		*/
42 	ulong	erase_blk_tout;		/* maximum block erase timeout		*/
43 	ulong	write_tout;		/* maximum write timeout		*/
44 	ulong	buffer_write_tout;	/* maximum buffer write timeout		*/
45 	ushort	vendor;			/* the primary vendor id		*/
46 	ushort	cmd_reset;		/* vendor specific reset command	*/
47 	ushort	interface;		/* used for x8/x16 adjustments		*/
48 	ushort	legacy_unlock;		/* support Intel legacy (un)locking	*/
49 	ushort	manufacturer_id;	/* manufacturer id			*/
50 	ushort	device_id;		/* device id				*/
51 	ushort	device_id2;		/* extended device id			*/
52 	ushort	ext_addr;		/* extended query table address		*/
53 	ushort	cfi_version;		/* cfi version				*/
54 	ushort	cfi_offset;		/* offset for cfi query			*/
55 	ulong   addr_unlock1;		/* unlock address 1 for AMD flash roms  */
56 	ulong   addr_unlock2;		/* unlock address 2 for AMD flash roms  */
57 	const char *name;		/* human-readable name	                */
58 #endif
59 } flash_info_t;
60 
61 extern flash_info_t flash_info[]; /* info for FLASH chips	*/
62 
63 typedef unsigned long flash_sect_t;
64 
65 /*
66  * Values for the width of the port
67  */
68 #define FLASH_CFI_8BIT		0x01
69 #define FLASH_CFI_16BIT		0x02
70 #define FLASH_CFI_32BIT		0x04
71 #define FLASH_CFI_64BIT		0x08
72 /*
73  * Values for the width of the chip
74  */
75 #define FLASH_CFI_BY8		0x01
76 #define FLASH_CFI_BY16		0x02
77 #define FLASH_CFI_BY32		0x04
78 #define FLASH_CFI_BY64		0x08
79 /* convert between bit value and numeric value */
80 #define CFI_FLASH_SHIFT_WIDTH	3
81 /*
82  * Values for the flash device interface
83  */
84 #define FLASH_CFI_X8		0x00
85 #define FLASH_CFI_X16		0x01
86 #define FLASH_CFI_X8X16		0x02
87 #define FLASH_CFI_X16X32	0x05
88 
89 /* convert between bit value and numeric value */
90 #define CFI_FLASH_SHIFT_WIDTH	3
91 
92 /* Prototypes */
93 
94 extern unsigned long flash_init (void);
95 extern void flash_protect_default(void);
96 extern void flash_print_info (flash_info_t *);
97 extern int flash_erase	(flash_info_t *, int, int);
98 extern int flash_sect_erase (ulong addr_first, ulong addr_last);
99 extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last);
100 extern int flash_sect_roundb (ulong *addr);
101 extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect);
102 extern void flash_set_verbose(uint);
103 
104 /* common/flash.c */
105 extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info);
106 extern int flash_write (char *, ulong, ulong);
107 extern flash_info_t *addr2info (ulong);
108 extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
109 
110 /* drivers/mtd/cfi_mtd.c */
111 #ifdef CONFIG_FLASH_CFI_MTD
112 extern int cfi_mtd_init(void);
113 #endif
114 
115 /* board/?/flash.c */
116 #if defined(CONFIG_SYS_FLASH_PROTECTION)
117 extern int flash_real_protect(flash_info_t *info, long sector, int prot);
118 extern void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len);
119 extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len);
120 #endif	/* CONFIG_SYS_FLASH_PROTECTION */
121 
122 #ifdef CONFIG_FLASH_CFI_LEGACY
123 extern ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info);
124 extern int jedec_flash_match(flash_info_t *info, ulong base);
125 #define CFI_CMDSET_AMD_LEGACY		0xFFF0
126 #endif
127 
128 #if defined(CONFIG_SYS_FLASH_CFI)
129 extern flash_info_t *flash_get_info(ulong base);
130 #endif
131 
132 /*-----------------------------------------------------------------------
133  * return codes from flash_write():
134  */
135 #define ERR_OK				0
136 #define ERR_TIMOUT			1
137 #define ERR_NOT_ERASED			2
138 #define ERR_PROTECTED			4
139 #define ERR_INVAL			8
140 #define ERR_ALIGN			16
141 #define ERR_UNKNOWN_FLASH_VENDOR	32
142 #define ERR_UNKNOWN_FLASH_TYPE		64
143 #define ERR_PROG_ERROR			128
144 
145 /*-----------------------------------------------------------------------
146  * Protection Flags for flash_protect():
147  */
148 #define FLAG_PROTECT_SET	0x01
149 #define FLAG_PROTECT_CLEAR	0x02
150 #define	FLAG_PROTECT_INVALID	0x03
151 /*-----------------------------------------------------------------------
152  * Set Environment according to label:
153  */
154 #define	FLAG_SETENV		0x80
155 
156 /*-----------------------------------------------------------------------
157  * Device IDs
158  */
159 
160 /* Manufacturers inside bank 0 have ids like 0x00xx00xx */
161 #define AMD_MANUFACT	0x00010001	/* AMD	   manuf. ID in D23..D16, D7..D0 */
162 #define FUJ_MANUFACT	0x00040004	/* FUJITSU manuf. ID in D23..D16, D7..D0 */
163 #define ATM_MANUFACT	0x001F001F	/* ATMEL */
164 #define STM_MANUFACT	0x00200020	/* STM (Thomson) manuf. ID in D23.. -"- */
165 #define SST_MANUFACT	0x00BF00BF	/* SST	   manuf. ID in D23..D16, D7..D0 */
166 #define MT_MANUFACT	0x00890089	/* MT	   manuf. ID in D23..D16, D7..D0 */
167 #define INTEL_MANUFACT	0x00890089	/* INTEL   manuf. ID in D23..D16, D7..D0 */
168 #define INTEL_ALT_MANU	0x00B000B0	/* alternate INTEL namufacturer ID	*/
169 #define MX_MANUFACT	0x00C200C2	/* MXIC	   manuf. ID in D23..D16, D7..D0 */
170 #define TOSH_MANUFACT	0x00980098	/* TOSHIBA manuf. ID in D23..D16, D7..D0 */
171 #define MT2_MANUFACT	0x002C002C	/* alternate MICRON manufacturer ID*/
172 #define EXCEL_MANUFACT	0x004A004A	/* Excel Semiconductor			*/
173 #define AMIC_MANUFACT	0x00370037	/* AMIC    manuf. ID in D23..D16, D7..D0 */
174 #define WINB_MANUFACT	0x00DA00DA	/* Winbond manuf. ID in D23..D16, D7..D0 */
175 
176 /* Manufacturers inside bank 1 have ids like 0x01xx01xx */
177 #define EON_MANUFACT	0x011C011C	/* EON     manuf. ID in D23..D16, D7..D0 */
178 
179 /* Manufacturers inside bank 2 have ids like 0x02xx02xx */
180 
181 					/* Micron Technologies (INTEL compat.)	*/
182 #define MT_ID_28F400_T	0x44704470	/* 28F400B3 ID ( 4 M, top boot sector)	*/
183 #define MT_ID_28F400_B	0x44714471	/* 28F400B3 ID ( 4 M, bottom boot sect) */
184 
185 #define AMD_ID_LV040B	0x4F		/* 29LV040B ID				*/
186 					/* 4 Mbit, 512K x 8,			*/
187 					/* 8 64K x 8 uniform sectors		*/
188 #define AMD_ID_F033C	0xA3		/* 29LV033C ID				*/
189 					/* 32 Mbit, 4Mbits x 8,			*/
190 					/* 64 64K x 8 uniform sectors		*/
191 #define AMD_ID_F065D	0x93		/* 29LV065D ID				*/
192 					/* 64 Mbit, 8Mbits x 8,			*/
193 					/* 126 64K x 8 uniform sectors		*/
194 #define ATM_ID_LV040	0x13		/* 29LV040B ID				*/
195 					/* 4 Mbit, 512K x 8,			*/
196 					/* 8 64K x 8 uniform sectors		*/
197 #define AMD_ID_F040B	0xA4		/* 29F040B ID				*/
198 					/* 4 Mbit, 512K x 8,			*/
199 					/* 8 64K x 8 uniform sectors		*/
200 #define STM_ID_M29W040B 0xE3		/* M29W040B ID				*/
201 					/* 4 Mbit, 512K x 8,			*/
202 					/* 8 64K x 8 uniform sectors		*/
203 #define AMD_ID_F080B	0xD5		/* 29F080  ID  ( 1 M)			*/
204 					/* 8 Mbit, 512K x 16,			*/
205 					/* 8 64K x 16 uniform sectors		*/
206 #define AMD_ID_F016D	0xAD		/* 29F016  ID  ( 2 M x 8)		*/
207 #define AMD_ID_F032B	0x41		/* 29F032  ID  ( 4 M x 8)		*/
208 #define AMD_ID_LV116DT	0xC7		/* 29LV116DT   ( 2 M x 8, top boot sect) */
209 #define AMD_ID_LV116DB	0x4C		/* 29LV116DB   ( 2 M x 8, bottom boot sect) */
210 #define AMD_ID_LV016B	0xc8		/* 29LV016 ID  ( 2 M x 8)		*/
211 
212 #define AMD_ID_PL160CB	0x22452245	/* 29PL160CB ID (16 M, bottom boot sect */
213 
214 #define AMD_ID_LV400T	0x22B922B9	/* 29LV400T ID ( 4 M, top boot sector)	*/
215 #define AMD_ID_LV400B	0x22BA22BA	/* 29LV400B ID ( 4 M, bottom boot sect) */
216 
217 #define AMD_ID_LV033C	0xA3		/* 29LV033C ID ( 4 M x 8)		*/
218 #define AMD_ID_LV065D	0x93		/* 29LV065D ID ( 8 M x 8)		*/
219 
220 #define AMD_ID_LV800T	0x22DA22DA	/* 29LV800T ID ( 8 M, top boot sector)	*/
221 #define AMD_ID_LV800B	0x225B225B	/* 29LV800B ID ( 8 M, bottom boot sect) */
222 
223 #define AMD_ID_LV160T	0x22C422C4	/* 29LV160T ID (16 M, top boot sector)	*/
224 #define AMD_ID_LV160B	0x22492249	/* 29LV160B ID (16 M, bottom boot sect) */
225 
226 #define AMD_ID_DL163T	0x22282228	/* 29DL163T ID (16 M, top boot sector)	*/
227 #define AMD_ID_DL163B	0x222B222B	/* 29DL163B ID (16 M, bottom boot sect) */
228 
229 #define AMD_ID_LV320T	0x22F622F6	/* 29LV320T ID (32 M, top boot sector)	*/
230 #define MX_ID_LV320T	0x22A722A7	/* 29LV320T by Macronix, AMD compatible */
231 #define AMD_ID_LV320B	0x22F922F9	/* 29LV320B ID (32 M, bottom boot sect) */
232 #define MX_ID_LV320B	0x22A822A8	/* 29LV320B by Macronix, AMD compatible */
233 
234 #define AMD_ID_DL322T	0x22552255	/* 29DL322T ID (32 M, top boot sector)	*/
235 #define AMD_ID_DL322B	0x22562256	/* 29DL322B ID (32 M, bottom boot sect) */
236 #define AMD_ID_DL323T	0x22502250	/* 29DL323T ID (32 M, top boot sector)	*/
237 #define AMD_ID_DL323B	0x22532253	/* 29DL323B ID (32 M, bottom boot sect) */
238 #define AMD_ID_DL324T	0x225C225C	/* 29DL324T ID (32 M, top boot sector)	*/
239 #define AMD_ID_DL324B	0x225F225F	/* 29DL324B ID (32 M, bottom boot sect) */
240 
241 #define AMD_ID_DL640	0x227E227E	/* 29DL640D ID (64 M, dual boot sectors)*/
242 #define AMD_ID_MIRROR	0x227E227E	/* 1st ID word for MirrorBit family */
243 #define AMD_ID_DL640G_2 0x22022202	/* 2nd ID word for AM29DL640G  at 0x38 */
244 #define AMD_ID_DL640G_3 0x22012201	/* 3rd ID word for AM29DL640G  at 0x3c */
245 #define AMD_ID_LV640U_2 0x220C220C	/* 2nd ID word for AM29LV640M  at 0x38 */
246 #define AMD_ID_LV640U_3 0x22012201	/* 3rd ID word for AM29LV640M  at 0x3c */
247 #define AMD_ID_LV640MT_2 0x22102210	/* 2nd ID word for AM29LV640MT at 0x38 */
248 #define AMD_ID_LV640MT_3 0x22012201	/* 3rd ID word for AM29LV640MT at 0x3c */
249 #define AMD_ID_LV640MB_2 0x22102210	/* 2nd ID word for AM29LV640MB at 0x38 */
250 #define AMD_ID_LV640MB_3 0x22002200	/* 3rd ID word for AM29LV640MB at 0x3c */
251 #define AMD_ID_LV128U_2 0x22122212	/* 2nd ID word for AM29LV128M  at 0x38 */
252 #define AMD_ID_LV128U_3 0x22002200	/* 3rd ID word for AM29LV128M  at 0x3c */
253 #define AMD_ID_LV256U_2 0x22122212	/* 2nd ID word for AM29LV256M  at 0x38 */
254 #define AMD_ID_LV256U_3 0x22012201	/* 3rd ID word for AM29LV256M  at 0x3c */
255 #define AMD_ID_GL064M_2 0x22132213	/* 2nd ID word for S29GL064M-R6 */
256 #define AMD_ID_GL064M_3 0x22012201	/* 3rd ID word for S29GL064M-R6 */
257 #define AMD_ID_GL064MT_2 0x22102210	/* 2nd ID word for S29GL064M-R3 (top boot sector) */
258 #define AMD_ID_GL064MT_3 0x22012201	/* 3rd ID word for S29GL064M-R3 (top boot sector) */
259 #define AMD_ID_GL128N_2	0x22212221	/* 2nd ID word for S29GL128N */
260 #define AMD_ID_GL128N_3	0x22012201	/* 3rd ID word for S29GL128N */
261 
262 
263 #define AMD_ID_LV320B_2 0x221A221A	/* 2d ID word for AM29LV320MB at 0x38 */
264 #define AMD_ID_LV320B_3 0x22002200	/* 3d ID word for AM29LV320MB at 0x3c */
265 
266 #define AMD_ID_LV640U	0x22D722D7	/* 29LV640U ID (64 M, uniform sectors)	*/
267 #define AMD_ID_LV650U	0x22D722D7	/* 29LV650U ID (64 M, uniform sectors)	*/
268 
269 #define ATM_ID_BV1614	0x000000C0	/* 49BV1614  ID */
270 #define ATM_ID_BV1614A	0x000000C8	/* 49BV1614A ID */
271 #define ATM_ID_BV6416	0x000000D6	/* 49BV6416  ID */
272 
273 #define FUJI_ID_29F800BA  0x22582258	/* MBM29F800BA ID  (8M) */
274 #define FUJI_ID_29F800TA  0x22D622D6	/* MBM29F800TA ID  (8M) */
275 #define FUJI_ID_29LV650UE 0x22d722d7	/* MBM29LV650UE/651UE ID (8M = 128 x 32kWord) */
276 
277 #define SST_ID_xF200A	0x27892789	/* 39xF200A ID ( 2M = 128K x 16 )	*/
278 #define SST_ID_xF400A	0x27802780	/* 39xF400A ID ( 4M = 256K x 16 )	*/
279 #define SST_ID_xF800A	0x27812781	/* 39xF800A ID ( 8M = 512K x 16 )	*/
280 #define SST_ID_xF160A	0x27822782	/* 39xF800A ID (16M =	1M x 16 )	*/
281 #define SST_ID_xF1601	0x234B234B	/* 39xF1601 ID (16M =	1M x 16 )	*/
282 #define SST_ID_xF1602	0x234A234A	/* 39xF1602 ID (16M =	1M x 16 )	*/
283 #define SST_ID_xF3201	0x235B235B	/* 39xF3201 ID (32M =	2M x 16 )	*/
284 #define SST_ID_xF3202	0x235A235A	/* 39xF3202 ID (32M =	2M x 16 )	*/
285 #define SST_ID_xF6401	0x236B236B	/* 39xF6401 ID (64M =	4M x 16 )	*/
286 #define SST_ID_xF6402	0x236A236A	/* 39xF6402 ID (64M =	4M x 16 )	*/
287 #define SST_ID_xF020	0xBFD6BFD6	/* 39xF020 ID (256KB = 2Mbit x 8)	*/
288 #define SST_ID_xF040	0xBFD7BFD7	/* 39xF040 ID (512KB = 4Mbit x 8)	*/
289 
290 #define STM_ID_F040B	0xE2		/* M29F040B ID ( 4M = 512K x 8	)	*/
291 					/* 8 64K x 8 uniform sectors		*/
292 
293 #define STM_ID_x800AB	0x005B005B	/* M29W800AB ID (8M = 512K x 16 )	*/
294 #define STM_ID_29W320DT 0x22CA22CA	/* M29W320DT ID (32 M, top boot sector) */
295 #define STM_ID_29W320DB 0x22CB22CB	/* M29W320DB ID (32 M, bottom boot sect)	*/
296 #define STM_ID_29W320ET 0x22562256	/* M29W320ET ID (32 M, top boot sector) */
297 #define STM_ID_29W320EB 0x22572257	/* M29W320EB ID (32 M, bottom boot sect)*/
298 #define STM_ID_29W040B	0x00E300E3	/* M29W040B ID (4M = 512K x 8)	*/
299 #define FLASH_PSD4256GV 0x00E9		/* PSD4256 Flash and CPLD combination	*/
300 
301 #define INTEL_ID_28F016S    0x66a066a0	/* 28F016S[VS] ID (16M = 512k x 16)	*/
302 #define INTEL_ID_28F800B3T  0x88928892	/*  8M = 512K x 16 top boot sector	*/
303 #define INTEL_ID_28F800B3B  0x88938893	/*  8M = 512K x 16 bottom boot sector	*/
304 #define INTEL_ID_28F160B3T  0x88908890	/*  16M = 1M x 16 top boot sector	*/
305 #define INTEL_ID_28F160B3B  0x88918891	/*  16M = 1M x 16 bottom boot sector	*/
306 #define INTEL_ID_28F320B3T  0x88968896	/*  32M = 2M x 16 top boot sector	*/
307 #define INTEL_ID_28F320B3B  0x88978897	/*  32M = 2M x 16 bottom boot sector	*/
308 #define INTEL_ID_28F640B3T  0x88988898	/*  64M = 4M x 16 top boot sector	*/
309 #define INTEL_ID_28F640B3B  0x88998899	/*  64M = 4M x 16 bottom boot sector	*/
310 #define INTEL_ID_28F160F3B  0x88F488F4	/*  16M = 1M x 16 bottom boot sector	*/
311 
312 #define INTEL_ID_28F800C3T  0x88C088C0	/*  8M = 512K x 16 top boot sector	*/
313 #define INTEL_ID_28F800C3B  0x88C188C1	/*  8M = 512K x 16 bottom boot sector	*/
314 #define INTEL_ID_28F160C3T  0x88C288C2	/*  16M = 1M x 16 top boot sector	*/
315 #define INTEL_ID_28F160C3B  0x88C388C3	/*  16M = 1M x 16 bottom boot sector	*/
316 #define INTEL_ID_28F320C3T  0x88C488C4	/*  32M = 2M x 16 top boot sector	*/
317 #define INTEL_ID_28F320C3B  0x88C588C5	/*  32M = 2M x 16 bottom boot sector	*/
318 #define INTEL_ID_28F640C3T  0x88CC88CC	/*  64M = 4M x 16 top boot sector	*/
319 #define INTEL_ID_28F640C3B  0x88CD88CD	/*  64M = 4M x 16 bottom boot sector	*/
320 
321 #define INTEL_ID_28F128J3   0x89188918	/*  16M = 8M x 16 x 128 */
322 #define INTEL_ID_28F320J5   0x00140014	/*  32M = 128K x  32	*/
323 #define INTEL_ID_28F640J5   0x00150015	/*  64M = 128K x  64	*/
324 #define INTEL_ID_28F320J3A  0x00160016	/*  32M = 128K x  32	*/
325 #define INTEL_ID_28F640J3A  0x00170017	/*  64M = 128K x  64	*/
326 #define INTEL_ID_28F128J3A  0x00180018	/* 128M = 128K x 128	*/
327 #define INTEL_ID_28F256J3A  0x001D001D	/* 256M = 128K x 256	*/
328 #define INTEL_ID_28F256L18T 0x880D880D	/* 256M = 128K x 255 + 32k x 4 */
329 #define INTEL_ID_28F64K3    0x88018801	/*  64M =  32K x 255 + 32k x 4 */
330 #define INTEL_ID_28F128K3   0x88028802	/* 128M =  64K x 255 + 32k x 4 */
331 #define INTEL_ID_28F256K3   0x88038803	/* 256M = 128K x 255 + 32k x 4 */
332 #define INTEL_ID_28F64P30T  0x88178817	/*  64M =  32K x 255 + 32k x 4 */
333 #define INTEL_ID_28F64P30B  0x881A881A	/*  64M =  32K x 255 + 32k x 4 */
334 #define INTEL_ID_28F128P30T 0x88188818	/* 128M =  64K x 255 + 32k x 4 */
335 #define INTEL_ID_28F128P30B 0x881B881B	/* 128M =  64K x 255 + 32k x 4 */
336 #define INTEL_ID_28F256P30T 0x88198819	/* 256M = 128K x 255 + 32k x 4 */
337 #define INTEL_ID_28F256P30B 0x881C881C	/* 256M = 128K x 255 + 32k x 4 */
338 
339 #define INTEL_ID_28F160S3   0x00D000D0	/*  16M = 512K x  32 (64kB x 32)	*/
340 #define INTEL_ID_28F320S3   0x00D400D4	/*  32M = 512K x  64 (64kB x 64)	*/
341 
342 /* Note that the Sharp 28F016SC is compatible with the Intel E28F016SC */
343 #define SHARP_ID_28F016SCL  0xAAAAAAAA	/* LH28F016SCT-L95 2Mx8, 32 64k blocks	*/
344 #define SHARP_ID_28F016SCZ  0xA0A0A0A0	/* LH28F016SCT-Z4  2Mx8, 32 64k blocks	*/
345 #define SHARP_ID_28F008SC   0xA6A6A6A6	/* LH28F008SCT-L12 1Mx8, 16 64k blocks	*/
346 					/* LH28F008SCR-L85 1Mx8, 16 64k blocks	*/
347 
348 #define TOSH_ID_FVT160	0xC2		/* TC58FVT160 ID (16 M, top )		*/
349 #define TOSH_ID_FVB160	0x43		/* TC58FVT160 ID (16 M, bottom )	*/
350 #define PHILIPS_LPC2292 0x0401FF13  /* LPC2292 internal FLASH			*/
351 #define NUMONYX_256MBIT	0x8922		/* Numonyx P33/30 256MBit 65nm	*/
352 
353 /*-----------------------------------------------------------------------
354  * Internal FLASH identification codes
355  *
356  * Be careful when adding new type! Odd numbers are "bottom boot sector" types!
357  */
358 
359 #define FLASH_AM040	0x0001		/* AMD Am29F040B, Am29LV040B		*/
360 					/* Bright Micro BM29F040		*/
361 					/* Fujitsu MBM29F040A			*/
362 					/* STM M29W040B				*/
363 					/* SGS Thomson M29F040B			*/
364 					/* 8 64K x 8 uniform sectors		*/
365 #define FLASH_AM400T	0x0002		/* AMD AM29LV400			*/
366 #define FLASH_AM400B	0x0003
367 #define FLASH_AM800T	0x0004		/* AMD AM29LV800			*/
368 #define FLASH_AM800B	0x0005
369 #define FLASH_AM116DT	0x0026		/* AMD AM29LV116DT (2Mx8bit) */
370 #define FLASH_AM116DB	0x0027		/* AMD AM29LV116DB (2Mx8bit) */
371 #define FLASH_AM160T	0x0006		/* AMD AM29LV160			*/
372 #define FLASH_AM160LV	0x0046		/* AMD29LV160DB (2M = 2Mx8bit ) */
373 #define FLASH_AM160B	0x0007
374 #define FLASH_AM320T	0x0008		/* AMD AM29LV320			*/
375 #define FLASH_AM320B	0x0009
376 
377 #define FLASH_AM080	0x000A		/* AMD Am29F080B			*/
378 					/* 16 64K x 8 uniform sectors		*/
379 
380 #define FLASH_AMDL322T	0x0010		/* AMD AM29DL322			*/
381 #define FLASH_AMDL322B	0x0011
382 #define FLASH_AMDL323T	0x0012		/* AMD AM29DL323			*/
383 #define FLASH_AMDL323B	0x0013
384 #define FLASH_AMDL324T	0x0014		/* AMD AM29DL324			*/
385 #define FLASH_AMDL324B	0x0015
386 
387 #define FLASH_AMDLV033C 0x0018
388 #define FLASH_AMDLV065D 0x001A
389 
390 #define FLASH_AMDL640	0x0016		/* AMD AM29DL640D			*/
391 #define FLASH_AMD016	0x0018		/* AMD AM29F016D			*/
392 #define FLASH_AMDL640MB 0x0019		/* AMD AM29LV640MB (64M, bottom boot sect)*/
393 #define FLASH_AMDL640MT 0x001A		/* AMD AM29LV640MT (64M, top boot sect) */
394 
395 #define FLASH_SST200A	0x0040		/* SST 39xF200A ID (  2M = 128K x 16 )	*/
396 #define FLASH_SST400A	0x0042		/* SST 39xF400A ID (  4M = 256K x 16 )	*/
397 #define FLASH_SST800A	0x0044		/* SST 39xF800A ID (  8M = 512K x 16 )	*/
398 #define FLASH_SST160A	0x0046		/* SST 39xF160A ID ( 16M =   1M x 16 )	*/
399 #define FLASH_SST320	0x0048		/* SST 39xF160A ID ( 16M =   1M x 16 )	*/
400 #define FLASH_SST640	0x004A		/* SST 39xF160A ID ( 16M =   1M x 16 )	*/
401 #define FLASH_SST020	0x0024		/* SST 39xF020 ID (256KB = 2Mbit x 8 )	*/
402 #define FLASH_SST040	0x000E		/* SST 39xF040 ID (512KB = 4Mbit x 8 )	*/
403 
404 #define FLASH_STM800AB	0x0051		/* STM M29WF800AB  (  8M = 512K x 16 )	*/
405 #define FLASH_STMW320DT 0x0052		/* STM M29W320DT   (32 M, top boot sector)	*/
406 #define FLASH_STMW320DB 0x0053		/* STM M29W320DB   (32 M, bottom boot sect)*/
407 #define FLASH_STM320DB	0x00CB		/* STM M29W320DB (4M = 64K x 64, bottom)*/
408 #define FLASH_STM800DT	0x00D7		/* STM M29W800DT (1M = 64K x 16, top)	*/
409 #define FLASH_STM800DB	0x005B		/* STM M29W800DB (1M = 64K x 16, bottom)*/
410 
411 #define FLASH_28F400_T	0x0062		/* MT  28F400B3 ID (  4M = 256K x 16 )	*/
412 #define FLASH_28F400_B	0x0063		/* MT  28F400B3 ID (  4M = 256K x 16 )	*/
413 
414 #define FLASH_INTEL800T 0x0074		/* INTEL 28F800B3T (  8M = 512K x 16 )	*/
415 #define FLASH_INTEL800B 0x0075		/* INTEL 28F800B3B (  8M = 512K x 16 )	*/
416 #define FLASH_INTEL160T 0x0076		/* INTEL 28F160B3T ( 16M =  1 M x 16 )	*/
417 #define FLASH_INTEL160B 0x0077		/* INTEL 28F160B3B ( 16M =  1 M x 16 )	*/
418 #define FLASH_INTEL320T 0x0078		/* INTEL 28F320B3T ( 32M =  2 M x 16 )	*/
419 #define FLASH_INTEL320B 0x0079		/* INTEL 28F320B3B ( 32M =  2 M x 16 )	*/
420 #define FLASH_INTEL640T 0x007A		/* INTEL 28F320B3T ( 64M =  4 M x 16 )	*/
421 #define FLASH_INTEL640B 0x007B		/* INTEL 28F320B3B ( 64M =  4 M x 16 )	*/
422 
423 #define FLASH_28F008S5	0x0080		/* Intel 28F008S5  (  1M =  64K x 16 )	*/
424 #define FLASH_28F016SV	0x0081		/* Intel 28F016SV  ( 16M = 512k x 32 )	*/
425 #define FLASH_28F800_B	0x0083		/* Intel E28F800B  (  1M = ? )		*/
426 #define FLASH_AM29F800B 0x0084		/* AMD Am29F800BB  (  1M = ? )		*/
427 #define FLASH_28F320J5	0x0085		/* Intel 28F320J5  (  4M = 128K x 32 )	*/
428 #define FLASH_28F160S3	0x0086		/* Intel 28F160S3  ( 16M = 512K x 32 )	*/
429 #define FLASH_28F320S3	0x0088		/* Intel 28F320S3  ( 32M = 512K x 64 )	*/
430 #define FLASH_AM640U	0x0090		/* AMD Am29LV640U  ( 64M = 4M x 16 )	*/
431 #define FLASH_AM033C	0x0091		/* AMD AM29LV033   ( 32M = 4M x 8 )	*/
432 #define FLASH_LH28F016SCT 0x0092	/* Sharp 28F016SCT ( 8 Meg Flash SIMM ) */
433 #define FLASH_28F160F3B 0x0093		/* Intel 28F160F3B ( 16M = 1M x 16 )	*/
434 #define FLASH_AM065D	0x0093
435 
436 #define FLASH_28F640J5	0x0099		/* INTEL 28F640J5  ( 64M = 128K x  64)	*/
437 
438 #define FLASH_28F800C3T 0x009A		/* Intel 28F800C3T (  8M = 512K x 16 )	*/
439 #define FLASH_28F800C3B 0x009B		/* Intel 28F800C3B (  8M = 512K x 16 )	*/
440 #define FLASH_28F160C3T 0x009C		/* Intel 28F160C3T ( 16M = 1M x 16 )	*/
441 #define FLASH_28F160C3B 0x009D		/* Intel 28F160C3B ( 16M = 1M x 16 )	*/
442 #define FLASH_28F320C3T 0x009E		/* Intel 28F320C3T ( 32M = 2M x 16 )	*/
443 #define FLASH_28F320C3B 0x009F		/* Intel 28F320C3B ( 32M = 2M x 16 )	*/
444 #define FLASH_28F640C3T 0x00A0		/* Intel 28F640C3T ( 64M = 4M x 16 )	*/
445 #define FLASH_28F640C3B 0x00A1		/* Intel 28F640C3B ( 64M = 4M x 16 )	*/
446 #define FLASH_AMLV320U	0x00A2		/* AMD 29LV320M	   ( 32M = 2M x 16 )	*/
447 
448 #define FLASH_AM033	0x00A3		/* AMD AmL033C90V1   (32M = 4M x 8)	*/
449 #define FLASH_AM065	0x0093		/* AMD AmL065DU12RI  (64M = 8M x 8)	*/
450 #define FLASH_AT040	0x00A5		/* Amtel AT49LV040   (4M = 512K x 8)	*/
451 
452 #define FLASH_AMLV640U	0x00A4		/* AMD 29LV640M	   ( 64M = 4M x 16 )	*/
453 #define FLASH_AMLV128U	0x00A6		/* AMD 29LV128M	   ( 128M = 8M x 16 )	*/
454 #define FLASH_AMLV320B	0x00A7		/* AMD 29LV320MB   ( 32M = 2M x 16 )	*/
455 #define FLASH_AMLV320T	0x00A8		/* AMD 29LV320MT   ( 32M = 2M x 16 )	*/
456 #define FLASH_AMLV256U	0x00AA		/* AMD 29LV256M	   ( 256M = 16M x 16 )	*/
457 #define FLASH_MXLV320B	0x00AB		/* MX  29LV320MB   ( 32M = 2M x 16 )	*/
458 #define FLASH_MXLV320T	0x00AC		/* MX  29LV320MT   ( 32M = 2M x 16 )	*/
459 #define FLASH_28F256L18T 0x00B0		/* Intel 28F256L18T 256M = 128K x 255 + 32k x 4 */
460 #define FLASH_AMDL163T	0x00B2		/* AMD AM29DL163T (2M x 16 )			*/
461 #define FLASH_AMDL163B	0x00B3
462 #define FLASH_28F64K3	0x00B4		/* Intel 28F64K3   (  64M)		*/
463 #define FLASH_28F128K3	0x00B6		/* Intel 28F128K3  ( 128M = 8M x 16 )	*/
464 #define FLASH_28F256K3	0x00B8		/* Intel 28F256K3  ( 256M = 16M x 16 )	*/
465 
466 #define FLASH_28F320J3A 0x00C0		/* INTEL 28F320J3A ( 32M = 128K x  32)	*/
467 #define FLASH_28F640J3A 0x00C2		/* INTEL 28F640J3A ( 64M = 128K x  64)	*/
468 #define FLASH_28F128J3A 0x00C4		/* INTEL 28F128J3A (128M = 128K x 128)	*/
469 #define FLASH_28F256J3A 0x00C6		/* INTEL 28F256J3A (256M = 128K x 256)	*/
470 
471 #define FLASH_FUJLV650	0x00D0		/* Fujitsu MBM 29LV650UE/651UE		*/
472 #define FLASH_MT28S4M16LC 0x00E1	/* Micron MT28S4M16LC			*/
473 #define FLASH_S29GL064M 0x00F0		/* Spansion S29GL064M-R6		*/
474 #define FLASH_S29GL128N 0x00F1		/* Spansion S29GL128N			*/
475 
476 #define FLASH_UNKNOWN	0xFFFF		/* unknown flash type			*/
477 
478 
479 /* manufacturer offsets
480  */
481 #define FLASH_MAN_AMD	0x00000000	/* AMD					*/
482 #define FLASH_MAN_FUJ	0x00010000	/* Fujitsu				*/
483 #define FLASH_MAN_BM	0x00020000	/* Bright Microelectronics		*/
484 #define FLASH_MAN_MX	0x00030000	/* MXIC					*/
485 #define FLASH_MAN_STM	0x00040000
486 #define FLASH_MAN_TOSH	0x00050000	/* Toshiba				*/
487 #define FLASH_MAN_EXCEL 0x00060000	/* Excel Semiconductor			*/
488 #define FLASH_MAN_SST	0x00100000
489 #define FLASH_MAN_INTEL 0x00300000
490 #define FLASH_MAN_MT	0x00400000
491 #define FLASH_MAN_SHARP 0x00500000
492 #define FLASH_MAN_ATM	0x00600000
493 #define FLASH_MAN_CFI	0x01000000
494 
495 
496 #define FLASH_TYPEMASK	0x0000FFFF	/* extract FLASH type	information	*/
497 #define FLASH_VENDMASK	0xFFFF0000	/* extract FLASH vendor information	*/
498 
499 #define FLASH_AMD_COMP	0x000FFFFF	/* Up to this ID, FLASH is compatible	*/
500 					/* with AMD, Fujitsu and SST		*/
501 					/* (JEDEC standard commands ?)		*/
502 
503 #define FLASH_BTYPE	0x0001		/* mask for bottom boot sector type	*/
504 
505 /*-----------------------------------------------------------------------
506  * Timeout constants:
507  *
508  * We can't find any specifications for maximum chip erase times,
509  * so these values are guestimates.
510  */
511 #define FLASH_ERASE_TIMEOUT	120000	/* timeout for erasing in ms		*/
512 #define FLASH_WRITE_TIMEOUT	500	/* timeout for writes  in ms		*/
513 
514 #endif /* !CONFIG_SYS_NO_FLASH */
515 
516 #endif /* _FLASH_H_ */
517