1*0f7ffd75SMacpaul Lin /* 2*0f7ffd75SMacpaul Lin * (C) Copyright 2009 Faraday Technology 3*0f7ffd75SMacpaul Lin * Po-Yu Chuang <ratbert@faraday-tech.com> 4*0f7ffd75SMacpaul Lin * 5*0f7ffd75SMacpaul Lin * This program is free software; you can redistribute it and/or modify 6*0f7ffd75SMacpaul Lin * it under the terms of the GNU General Public License as published by 7*0f7ffd75SMacpaul Lin * the Free Software Foundation; either version 2 of the License, or 8*0f7ffd75SMacpaul Lin * (at your option) any later version. 9*0f7ffd75SMacpaul Lin * 10*0f7ffd75SMacpaul Lin * This program is distributed in the hope that it will be useful, 11*0f7ffd75SMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 12*0f7ffd75SMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*0f7ffd75SMacpaul Lin * GNU General Public License for more details. 14*0f7ffd75SMacpaul Lin * 15*0f7ffd75SMacpaul Lin * You should have received a copy of the GNU General Public License 16*0f7ffd75SMacpaul Lin * along with this program; if not, write to the Free Software 17*0f7ffd75SMacpaul Lin * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18*0f7ffd75SMacpaul Lin */ 19*0f7ffd75SMacpaul Lin 20*0f7ffd75SMacpaul Lin /* 21*0f7ffd75SMacpaul Lin * Timer 22*0f7ffd75SMacpaul Lin */ 23*0f7ffd75SMacpaul Lin #ifndef __FTTMR010_H 24*0f7ffd75SMacpaul Lin #define __FTTMR010_H 25*0f7ffd75SMacpaul Lin 26*0f7ffd75SMacpaul Lin struct fttmr010 { 27*0f7ffd75SMacpaul Lin unsigned int timer1_counter; /* 0x00 */ 28*0f7ffd75SMacpaul Lin unsigned int timer1_load; /* 0x04 */ 29*0f7ffd75SMacpaul Lin unsigned int timer1_match1; /* 0x08 */ 30*0f7ffd75SMacpaul Lin unsigned int timer1_match2; /* 0x0c */ 31*0f7ffd75SMacpaul Lin unsigned int timer2_counter; /* 0x10 */ 32*0f7ffd75SMacpaul Lin unsigned int timer2_load; /* 0x14 */ 33*0f7ffd75SMacpaul Lin unsigned int timer2_match1; /* 0x18 */ 34*0f7ffd75SMacpaul Lin unsigned int timer2_match2; /* 0x1c */ 35*0f7ffd75SMacpaul Lin unsigned int timer3_counter; /* 0x20 */ 36*0f7ffd75SMacpaul Lin unsigned int timer3_load; /* 0x24 */ 37*0f7ffd75SMacpaul Lin unsigned int timer3_match1; /* 0x28 */ 38*0f7ffd75SMacpaul Lin unsigned int timer3_match2; /* 0x2c */ 39*0f7ffd75SMacpaul Lin unsigned int cr; /* 0x30 */ 40*0f7ffd75SMacpaul Lin unsigned int interrupt_state; /* 0x34 */ 41*0f7ffd75SMacpaul Lin unsigned int interrupt_mask; /* 0x38 */ 42*0f7ffd75SMacpaul Lin }; 43*0f7ffd75SMacpaul Lin 44*0f7ffd75SMacpaul Lin /* 45*0f7ffd75SMacpaul Lin * Timer Control Register 46*0f7ffd75SMacpaul Lin */ 47*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_UPDOWN (1 << 11) 48*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_UPDOWN (1 << 10) 49*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_UPDOWN (1 << 9) 50*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_OFENABLE (1 << 8) 51*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_CLOCK (1 << 7) 52*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_ENABLE (1 << 6) 53*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_OFENABLE (1 << 5) 54*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_CLOCK (1 << 4) 55*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_ENABLE (1 << 3) 56*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_OFENABLE (1 << 2) 57*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_CLOCK (1 << 1) 58*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_ENABLE (1 << 0) 59*0f7ffd75SMacpaul Lin 60*0f7ffd75SMacpaul Lin /* 61*0f7ffd75SMacpaul Lin * Timer Interrupt State & Mask Registers 62*0f7ffd75SMacpaul Lin */ 63*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_OVERFLOW (1 << 8) 64*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_MATCH2 (1 << 7) 65*0f7ffd75SMacpaul Lin #define FTTMR010_TM3_MATCH1 (1 << 6) 66*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_OVERFLOW (1 << 5) 67*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_MATCH2 (1 << 4) 68*0f7ffd75SMacpaul Lin #define FTTMR010_TM2_MATCH1 (1 << 3) 69*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_OVERFLOW (1 << 2) 70*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_MATCH2 (1 << 1) 71*0f7ffd75SMacpaul Lin #define FTTMR010_TM1_MATCH1 (1 << 0) 72*0f7ffd75SMacpaul Lin 73*0f7ffd75SMacpaul Lin #endif /* __FTTMR010_H */ 74