xref: /openbmc/u-boot/include/faraday/ftahbc020s.h (revision 713cb680)
1 /*
2  * Copyright (C) 2011 Andes Technology Corporation
3  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  */
19 
20 /* FTAHBC020S - AHB Controller (Arbiter/Decoder) definitions */
21 #ifndef __FTAHBC020S_H
22 #define __FTAHBC202S_H
23 
24 /* Registers Offsets */
25 
26 /*
27  * AHB Slave BSR, offset: n * 4, n=0~31
28  */
29 #ifndef __ASSEMBLY__
30 struct ftahbc02s {
31 	unsigned int	s_bsr[32];	/* 0x00-0x7c - Slave n Base/Size Reg */
32 	unsigned int	pcr;		/* 0x80	- Priority Ctrl Reg */
33 	unsigned int	tcrg;		/* 0x84	- Transfer Ctrl Reg */
34 	unsigned int	cr;		/* 0x88	- Ctrl Reg */
35 };
36 #endif /* __ASSEMBLY__ */
37 
38 /*
39  * FTAHBC020S_SLAVE_BSR - Slave n Base / Size Register
40  */
41 #define FTAHBC020S_SLAVE_BSR_BASE(x)	(((x) & 0xfff) << 20)
42 #define FTAHBC020S_SLAVE_BSR_SIZE(x)	(((x) & 0xf) << 16)
43 /* The value of b(16:19)SLAVE_BSR_SIZE: 1M-2048M, must be power of 2 */
44 #define FTAHBC020S_BSR_SIZE(x)		(ffs(x) - 1)	/* size of Addr Space */
45 
46 /*
47  * FTAHBC020S_PCR - Priority Control Register
48  */
49 #define FTAHBC020S_PCR_PLEVEL_(x)	(1 << (x))	/* x: 1-15 */
50 
51 /*
52  * FTAHBC020S_CR - Interrupt Control Register
53  */
54 #define FTAHBC020S_CR_INTSTS	(1 << 24)
55 #define FTAHBC020S_CR_RESP(x)	(((x) & 0x3) << 20)
56 #define FTAHBC020S_CR_INTSMASK	(1 << 16)
57 #define FTAHBC020S_CR_REMAP	(1 << 0)
58 
59 #endif	/* __FTAHBC020S_H */
60