1 /* Copyright (c) 2018 The Chromium OS Authors. All rights reserved. 2 * Use of this source code is governed by a BSD-style license that can be 3 * found in the LICENSE file. 4 */ 5 6 /* Host communication command constants for Chrome EC */ 7 8 #ifndef __CROS_EC_COMMANDS_H 9 #define __CROS_EC_COMMANDS_H 10 11 /* 12 * Protocol overview 13 * 14 * request: CMD [ P0 P1 P2 ... Pn S ] 15 * response: ERR [ P0 P1 P2 ... Pn S ] 16 * 17 * where the bytes are defined as follow : 18 * - CMD is the command code. (defined by EC_CMD_ constants) 19 * - ERR is the error code. (defined by EC_RES_ constants) 20 * - Px is the optional payload. 21 * it is not sent if the error code is not success. 22 * (defined by ec_params_ and ec_response_ structures) 23 * - S is the checksum which is the sum of all payload bytes. 24 * 25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD 26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM. 27 * On I2C, all bytes are sent serially in the same message. 28 */ 29 30 /* 31 * Current version of this protocol 32 * 33 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 34 * determined in other ways. Remove this once the kernel code no longer 35 * depends on it. 36 */ 37 #define EC_PROTO_VERSION 0x00000002 38 39 /* Command version mask */ 40 #define EC_VER_MASK(version) (1UL << (version)) 41 42 /* I/O addresses for ACPI commands */ 43 #define EC_LPC_ADDR_ACPI_DATA 0x62 44 #define EC_LPC_ADDR_ACPI_CMD 0x66 45 46 /* I/O addresses for host command */ 47 #define EC_LPC_ADDR_HOST_DATA 0x200 48 #define EC_LPC_ADDR_HOST_CMD 0x204 49 50 /* I/O addresses for host command args and params */ 51 /* Protocol version 2 */ 52 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 53 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 54 * EC_PROTO2_MAX_PARAM_SIZE */ 55 /* Protocol version 3 */ 56 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 57 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 58 59 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 60 * and they tell the kernel that so we have to think of it as two parts. */ 61 #define EC_HOST_CMD_REGION0 0x800 62 #define EC_HOST_CMD_REGION1 0x880 63 #define EC_HOST_CMD_REGION_SIZE 0x80 64 65 /* EC command register bit functions */ 66 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ 67 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ 68 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ 69 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ 70 #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ 71 #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ 72 #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ 73 74 #define EC_LPC_ADDR_MEMMAP 0x900 75 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 76 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 77 78 /* The offset address of each type of data in mapped memory. */ 79 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 80 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 81 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 82 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 83 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 84 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 85 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 86 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 87 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 88 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 89 /* Unused 0x28 - 0x2f */ 90 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 91 /* Unused 0x31 - 0x33 */ 92 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ 93 /* Reserve 0x38 - 0x3f for additional host event-related stuff */ 94 /* Battery values are all 32 bits */ 95 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 96 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 97 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 98 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ 99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109 /* Unused 0x84 - 0x8f */ 110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111 /* Unused 0x91 */ 112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114 /* 0x94 - 0x99: 1st Accelerometer */ 115 /* 0x9a - 0x9f: 2nd Accelerometer */ 116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117 /* Unused 0xa6 - 0xdf */ 118 119 /* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124 #define EC_MEMMAP_NO_ACPI 0xe0 125 126 /* Define the format of the accelerometer mapped memory status byte. */ 127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) 129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) 130 131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132 #define EC_TEMP_SENSOR_ENTRIES 16 133 /* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138 #define EC_TEMP_SENSOR_B_ENTRIES 8 139 140 /* Special values for mapped temperature sensors */ 141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142 #define EC_TEMP_SENSOR_ERROR 0xfe 143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145 /* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149 #define EC_TEMP_SENSOR_OFFSET 200 150 151 /* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154 #define EC_ALS_ENTRIES 2 155 156 /* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168 #define EC_BATT_FLAG_AC_PRESENT 0x01 169 #define EC_BATT_FLAG_BATT_PRESENT 0x02 170 #define EC_BATT_FLAG_DISCHARGING 0x04 171 #define EC_BATT_FLAG_CHARGING 0x08 172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173 174 /* Switch flags at EC_MEMMAP_SWITCHES */ 175 #define EC_SWITCH_LID_OPEN 0x01 176 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 177 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 178 /* Was recovery requested via keyboard; now unused. */ 179 #define EC_SWITCH_IGNORE1 0x08 180 /* Recovery requested via dedicated signal (from servo board) */ 181 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 182 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 183 #define EC_SWITCH_IGNORE0 0x20 184 185 /* Host command interface flags */ 186 /* Host command interface supports LPC args (LPC interface only) */ 187 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 188 /* Host command interface supports version 3 protocol */ 189 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 190 191 /* Wireless switch flags */ 192 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 193 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 194 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 195 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 196 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 197 198 /*****************************************************************************/ 199 /* 200 * ACPI commands 201 * 202 * These are valid ONLY on the ACPI command/data port. 203 */ 204 205 /* 206 * ACPI Read Embedded Controller 207 * 208 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 209 * 210 * Use the following sequence: 211 * 212 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 213 * - Wait for EC_LPC_CMDR_PENDING bit to clear 214 * - Write address to EC_LPC_ADDR_ACPI_DATA 215 * - Wait for EC_LPC_CMDR_DATA bit to set 216 * - Read value from EC_LPC_ADDR_ACPI_DATA 217 */ 218 #define EC_CMD_ACPI_READ 0x0080 219 220 /* 221 * ACPI Write Embedded Controller 222 * 223 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 224 * 225 * Use the following sequence: 226 * 227 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 228 * - Wait for EC_LPC_CMDR_PENDING bit to clear 229 * - Write address to EC_LPC_ADDR_ACPI_DATA 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write value to EC_LPC_ADDR_ACPI_DATA 232 */ 233 #define EC_CMD_ACPI_WRITE 0x0081 234 235 /* 236 * ACPI Burst Enable Embedded Controller 237 * 238 * This enables burst mode on the EC to allow the host to issue several 239 * commands back-to-back. While in this mode, writes to mapped multi-byte 240 * data are locked out to ensure data consistency. 241 */ 242 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 243 244 /* 245 * ACPI Burst Disable Embedded Controller 246 * 247 * This disables burst mode on the EC and stops preventing EC writes to mapped 248 * multi-byte data. 249 */ 250 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 251 252 /* 253 * ACPI Query Embedded Controller 254 * 255 * This clears the lowest-order bit in the currently pending host events, and 256 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 257 * event 0x80000000 = 32), or 0 if no event was pending. 258 */ 259 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 260 261 /* Valid addresses in ACPI memory space, for read/write commands */ 262 263 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 264 #define EC_ACPI_MEM_VERSION 0x00 265 /* 266 * Test location; writing value here updates test compliment byte to (0xff - 267 * value). 268 */ 269 #define EC_ACPI_MEM_TEST 0x01 270 /* Test compliment; writes here are ignored. */ 271 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 272 273 /* Keyboard backlight brightness percent (0 - 100) */ 274 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 275 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 276 #define EC_ACPI_MEM_FAN_DUTY 0x04 277 278 /* 279 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 280 * independent thresholds attached to them. The current value of the ID 281 * register determines which sensor is affected by the THRESHOLD and COMMIT 282 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 283 * as the memory-mapped sensors. The COMMIT register applies those settings. 284 * 285 * The spec does not mandate any way to read back the threshold settings 286 * themselves, but when a threshold is crossed the AP needs a way to determine 287 * which sensor(s) are responsible. Each reading of the ID register clears and 288 * returns one sensor ID that has crossed one of its threshold (in either 289 * direction) since the last read. A value of 0xFF means "no new thresholds 290 * have tripped". Setting or enabling the thresholds for a sensor will clear 291 * the unread event count for that sensor. 292 */ 293 #define EC_ACPI_MEM_TEMP_ID 0x05 294 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 295 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 296 /* 297 * Here are the bits for the COMMIT register: 298 * bit 0 selects the threshold index for the chosen sensor (0/1) 299 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 300 * Each write to the commit register affects one threshold. 301 */ 302 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) 303 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) 304 /* 305 * Example: 306 * 307 * Set the thresholds for sensor 2 to 50 C and 60 C: 308 * write 2 to [0x05] -- select temp sensor 2 309 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 310 * write 0x2 to [0x07] -- enable threshold 0 with this value 311 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 312 * write 0x3 to [0x07] -- enable threshold 1 with this value 313 * 314 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 315 * write 2 to [0x05] -- select temp sensor 2 316 * write 0x1 to [0x07] -- disable threshold 1 317 */ 318 319 /* DPTF battery charging current limit */ 320 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 321 322 /* Charging limit is specified in 64 mA steps */ 323 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 324 /* Value to disable DPTF battery charging limit */ 325 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 326 327 /* 328 * Report device orientation 329 * bit 0 device is tablet mode 330 */ 331 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 332 #define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01 333 334 /* 335 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 336 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 337 */ 338 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 339 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 340 341 /* Current version of ACPI memory address space */ 342 #define EC_ACPI_MEM_VERSION_CURRENT 2 343 344 345 /* 346 * This header file is used in coreboot both in C and ACPI code. The ACPI code 347 * is pre-processed to handle constants but the ASL compiler is unable to 348 * handle actual C code so keep it separate. 349 */ 350 #ifndef __ACPI__ 351 352 /* 353 * Define __packed if someone hasn't beat us to it. Linux kernel style 354 * checking prefers __packed over __attribute__((packed)). 355 */ 356 #ifndef __packed 357 #define __packed __attribute__((packed)) 358 #endif 359 360 #ifndef __aligned 361 #define __aligned(x) __attribute__((aligned(x))) 362 #endif 363 364 /* 365 * Attributes for EC request and response packets. Just defining __packed 366 * results in inefficient assembly code on ARM, if the structure is actually 367 * 32-bit aligned, as it should be for all buffers. 368 * 369 * Be very careful when adding these to existing structures. They will round 370 * up the structure size to the specified boundary. 371 * 372 * Also be very careful to make that if a structure is included in some other 373 * parent structure that the alignment will still be true given the packing of 374 * the parent structure. This is particularly important if the sub-structure 375 * will be passed as a pointer to another function, since that function will 376 * not know about the misaligment caused by the parent structure's packing. 377 * 378 * Also be very careful using __packed - particularly when nesting non-packed 379 * structures inside packed ones. In fact, DO NOT use __packed directly; 380 * always use one of these attributes. 381 * 382 * Once everything is annotated properly, the following search strings should 383 * not return ANY matches in this file other than right here: 384 * 385 * "__packed" - generates inefficient code; all sub-structs must also be packed 386 * 387 * "struct [^_]" - all structs should be annotated, except for structs that are 388 * members of other structs/unions (and their original declarations should be 389 * annotated). 390 */ 391 #ifdef CONFIG_HOSTCMD_ALIGNED 392 393 /* 394 * Packed structures where offset and size are always aligned to 1, 2, or 4 395 * byte boundary. 396 */ 397 #define __ec_align1 __packed 398 #define __ec_align2 __packed __aligned(2) 399 #define __ec_align4 __packed __aligned(4) 400 401 /* 402 * Packed structure which must be under-aligned, because its size is not a 403 * 4-byte multiple. This is sub-optimal because it forces byte-wise access 404 * of all multi-byte fields in it, even though they are themselves aligned. 405 * 406 * In theory, we could duplicate the structure with __aligned(4) for accessing 407 * its members, but use the __packed version for sizeof(). 408 */ 409 #define __ec_align_size1 __packed 410 411 /* 412 * Packed structure which must be under-aligned, because its offset inside a 413 * parent structure is not a 4-byte multiple. 414 */ 415 #define __ec_align_offset1 __packed 416 #define __ec_align_offset2 __packed __aligned(2) 417 418 /* 419 * Structures which are complicated enough that I'm skipping them on the first 420 * pass. They are effectively unchanged from their previous definitions. 421 * 422 * TODO(rspangler): Figure out what to do with these. It's likely necessary 423 * to work out the size and offset of each member and add explicit padding to 424 * maintain those. 425 */ 426 #define __ec_todo_packed __packed 427 #define __ec_todo_unpacked 428 429 #else /* !CONFIG_HOSTCMD_ALIGNED */ 430 431 /* 432 * Packed structures make no assumption about alignment, so they do inefficient 433 * byte-wise reads. 434 */ 435 #define __ec_align1 __packed 436 #define __ec_align2 __packed 437 #define __ec_align4 __packed 438 #define __ec_align_size1 __packed 439 #define __ec_align_offset1 __packed 440 #define __ec_align_offset2 __packed 441 #define __ec_todo_packed __packed 442 #define __ec_todo_unpacked 443 444 #endif /* !CONFIG_HOSTCMD_ALIGNED */ 445 446 /* LPC command status byte masks */ 447 /* EC has written a byte in the data register and host hasn't read it yet */ 448 #define EC_LPC_STATUS_TO_HOST 0x01 449 /* Host has written a command/data byte and the EC hasn't read it yet */ 450 #define EC_LPC_STATUS_FROM_HOST 0x02 451 /* EC is processing a command */ 452 #define EC_LPC_STATUS_PROCESSING 0x04 453 /* Last write to EC was a command, not data */ 454 #define EC_LPC_STATUS_LAST_CMD 0x08 455 /* EC is in burst mode */ 456 #define EC_LPC_STATUS_BURST_MODE 0x10 457 /* SCI event is pending (requesting SCI query) */ 458 #define EC_LPC_STATUS_SCI_PENDING 0x20 459 /* SMI event is pending (requesting SMI query) */ 460 #define EC_LPC_STATUS_SMI_PENDING 0x40 461 /* (reserved) */ 462 #define EC_LPC_STATUS_RESERVED 0x80 463 464 /* 465 * EC is busy. This covers both the EC processing a command, and the host has 466 * written a new command but the EC hasn't picked it up yet. 467 */ 468 #define EC_LPC_STATUS_BUSY_MASK \ 469 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 470 471 /* Host command response codes (16-bit). Note that response codes should be 472 * stored in a uint16_t rather than directly in a value of this type. 473 */ 474 enum ec_status { 475 EC_RES_SUCCESS = 0, 476 EC_RES_INVALID_COMMAND = 1, 477 EC_RES_ERROR = 2, 478 EC_RES_INVALID_PARAM = 3, 479 EC_RES_ACCESS_DENIED = 4, 480 EC_RES_INVALID_RESPONSE = 5, 481 EC_RES_INVALID_VERSION = 6, 482 EC_RES_INVALID_CHECKSUM = 7, 483 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 484 EC_RES_UNAVAILABLE = 9, /* No response available */ 485 EC_RES_TIMEOUT = 10, /* We got a timeout */ 486 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 487 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 488 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 489 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 490 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 491 EC_RES_BUSY = 16 /* Up but too busy. Should retry */ 492 }; 493 494 /* 495 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 496 * EC command uses code 0 to mean "no event pending". We explicitly specify 497 * each value in the enum listing so they won't change if we delete/insert an 498 * item or rearrange the list (it needs to be stable across platforms, not 499 * just within a single compiled instance). 500 */ 501 enum host_event_code { 502 EC_HOST_EVENT_LID_CLOSED = 1, 503 EC_HOST_EVENT_LID_OPEN = 2, 504 EC_HOST_EVENT_POWER_BUTTON = 3, 505 EC_HOST_EVENT_AC_CONNECTED = 4, 506 EC_HOST_EVENT_AC_DISCONNECTED = 5, 507 EC_HOST_EVENT_BATTERY_LOW = 6, 508 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 509 EC_HOST_EVENT_BATTERY = 8, 510 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 511 /* Event generated by a device attached to the EC */ 512 EC_HOST_EVENT_DEVICE = 10, 513 EC_HOST_EVENT_THERMAL = 11, 514 EC_HOST_EVENT_USB_CHARGER = 12, 515 EC_HOST_EVENT_KEY_PRESSED = 13, 516 /* 517 * EC has finished initializing the host interface. The host can check 518 * for this event following sending a EC_CMD_REBOOT_EC command to 519 * determine when the EC is ready to accept subsequent commands. 520 */ 521 EC_HOST_EVENT_INTERFACE_READY = 14, 522 /* Keyboard recovery combo has been pressed */ 523 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 524 525 /* Shutdown due to thermal overload */ 526 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 527 /* Shutdown due to battery level too low */ 528 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 529 530 /* Suggest that the AP throttle itself */ 531 EC_HOST_EVENT_THROTTLE_START = 18, 532 /* Suggest that the AP resume normal speed */ 533 EC_HOST_EVENT_THROTTLE_STOP = 19, 534 535 /* Hang detect logic detected a hang and host event timeout expired */ 536 EC_HOST_EVENT_HANG_DETECT = 20, 537 /* Hang detect logic detected a hang and warm rebooted the AP */ 538 EC_HOST_EVENT_HANG_REBOOT = 21, 539 540 /* PD MCU triggering host event */ 541 EC_HOST_EVENT_PD_MCU = 22, 542 543 /* Battery Status flags have changed */ 544 EC_HOST_EVENT_BATTERY_STATUS = 23, 545 546 /* EC encountered a panic, triggering a reset */ 547 EC_HOST_EVENT_PANIC = 24, 548 549 /* Keyboard fastboot combo has been pressed */ 550 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 551 552 /* EC RTC event occurred */ 553 EC_HOST_EVENT_RTC = 26, 554 555 /* Emulate MKBP event */ 556 EC_HOST_EVENT_MKBP = 27, 557 558 /* EC desires to change state of host-controlled USB mux */ 559 EC_HOST_EVENT_USB_MUX = 28, 560 561 /* TABLET/LAPTOP mode event*/ 562 EC_HOST_EVENT_MODE_CHANGE = 29, 563 564 /* Keyboard recovery combo with hardware reinitialization */ 565 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 566 567 /* 568 * Reserve this last bit to indicate that at least one bit in a 569 * secondary host event word is set. See crbug.com/633646. 570 */ 571 EC_HOST_EVENT_EXTENDED = 31, 572 573 /* 574 * The high bit of the event mask is not used as a host event code. If 575 * it reads back as set, then the entire event mask should be 576 * considered invalid by the host. This can happen when reading the 577 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 578 * not initialized on the EC, or improperly configured on the host. 579 */ 580 EC_HOST_EVENT_INVALID = 32 581 }; 582 /* Host event mask */ 583 #define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1)) 584 585 /* Arguments at EC_LPC_ADDR_HOST_ARGS */ 586 struct __ec_align4 ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 /* 591 * Checksum; sum of command + flags + command_version + data_size + 592 * all params/response data bytes. 593 */ 594 uint8_t checksum; 595 }; 596 597 /* Flags for ec_lpc_host_args.flags */ 598 /* 599 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 600 * params. 601 * 602 * If EC gets a command and this flag is not set, this is an old-style command. 603 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 604 * unknown length. EC must respond with an old-style response (that is, 605 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 606 */ 607 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 608 /* 609 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 610 * 611 * If EC responds to a command and this flag is not set, this is an old-style 612 * response. Command version is 0 and response data from EC is at 613 * EC_LPC_ADDR_OLD_PARAM with unknown length. 614 */ 615 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 616 617 /*****************************************************************************/ 618 /* 619 * Byte codes returned by EC over SPI interface. 620 * 621 * These can be used by the AP to debug the EC interface, and to determine 622 * when the EC is not in a state where it will ever get around to responding 623 * to the AP. 624 * 625 * Example of sequence of bytes read from EC for a current good transfer: 626 * 1. - - AP asserts chip select (CS#) 627 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 628 * 3. - - EC starts handling CS# interrupt 629 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 630 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 631 * bytes looking for EC_SPI_FRAME_START 632 * 6. - - EC finishes processing and sets up response 633 * 7. EC_SPI_FRAME_START - AP reads frame byte 634 * 8. (response packet) - AP reads response packet 635 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 636 * 10 - - AP deasserts chip select 637 * 11 - - EC processes CS# interrupt and sets up DMA for 638 * next request 639 * 640 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 641 * the following byte values: 642 * EC_SPI_OLD_READY 643 * EC_SPI_RX_READY 644 * EC_SPI_RECEIVING 645 * EC_SPI_PROCESSING 646 * 647 * Then the EC found an error in the request, or was not ready for the request 648 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 649 * because the EC is unable to tell when the AP is done sending its request. 650 */ 651 652 /* 653 * Framing byte which precedes a response packet from the EC. After sending a 654 * request, the AP will clock in bytes until it sees the framing byte, then 655 * clock in the response packet. 656 */ 657 #define EC_SPI_FRAME_START 0xec 658 659 /* 660 * Padding bytes which are clocked out after the end of a response packet. 661 */ 662 #define EC_SPI_PAST_END 0xed 663 664 /* 665 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 666 * that the AP will send a valid packet header (starting with 667 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 668 */ 669 #define EC_SPI_RX_READY 0xf8 670 671 /* 672 * EC has started receiving the request from the AP, but hasn't started 673 * processing it yet. 674 */ 675 #define EC_SPI_RECEIVING 0xf9 676 677 /* EC has received the entire request from the AP and is processing it. */ 678 #define EC_SPI_PROCESSING 0xfa 679 680 /* 681 * EC received bad data from the AP, such as a packet header with an invalid 682 * length. EC will ignore all data until chip select deasserts. 683 */ 684 #define EC_SPI_RX_BAD_DATA 0xfb 685 686 /* 687 * EC received data from the AP before it was ready. That is, the AP asserted 688 * chip select and started clocking data before the EC was ready to receive it. 689 * EC will ignore all data until chip select deasserts. 690 */ 691 #define EC_SPI_NOT_READY 0xfc 692 693 /* 694 * EC was ready to receive a request from the AP. EC has treated the byte sent 695 * by the AP as part of a request packet, or (for old-style ECs) is processing 696 * a fully received packet but is not ready to respond yet. 697 */ 698 #define EC_SPI_OLD_READY 0xfd 699 700 /*****************************************************************************/ 701 702 /* 703 * Protocol version 2 for I2C and SPI send a request this way: 704 * 705 * 0 EC_CMD_VERSION0 + (command version) 706 * 1 Command number 707 * 2 Length of params = N 708 * 3..N+2 Params, if any 709 * N+3 8-bit checksum of bytes 0..N+2 710 * 711 * The corresponding response is: 712 * 713 * 0 Result code (EC_RES_*) 714 * 1 Length of params = M 715 * 2..M+1 Params, if any 716 * M+2 8-bit checksum of bytes 0..M+1 717 */ 718 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 719 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 720 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 721 EC_PROTO2_REQUEST_TRAILER_BYTES) 722 723 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 724 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 725 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 726 EC_PROTO2_RESPONSE_TRAILER_BYTES) 727 728 /* Parameter length was limited by the LPC interface */ 729 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 730 731 /* Maximum request and response packet sizes for protocol version 2 */ 732 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 733 EC_PROTO2_MAX_PARAM_SIZE) 734 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 735 EC_PROTO2_MAX_PARAM_SIZE) 736 737 /*****************************************************************************/ 738 739 /* 740 * Value written to legacy command port / prefix byte to indicate protocol 741 * 3+ structs are being used. Usage is bus-dependent. 742 */ 743 #define EC_COMMAND_PROTOCOL_3 0xda 744 745 #define EC_HOST_REQUEST_VERSION 3 746 747 /* Version 3 request from host */ 748 struct __ec_align4 ec_host_request { 749 /* Structure version (=3) 750 * 751 * EC will return EC_RES_INVALID_HEADER if it receives a header with a 752 * version it doesn't know how to parse. 753 */ 754 uint8_t struct_version; 755 756 /* 757 * Checksum of request and data; sum of all bytes including checksum 758 * should total to 0. 759 */ 760 uint8_t checksum; 761 762 /* Command code */ 763 uint16_t command; 764 765 /* Command version */ 766 uint8_t command_version; 767 768 /* Unused byte in current protocol version; set to 0 */ 769 uint8_t reserved; 770 771 /* Length of data which follows this header */ 772 uint16_t data_len; 773 }; 774 775 #define EC_HOST_RESPONSE_VERSION 3 776 777 /* Version 3 response from EC */ 778 struct __ec_align4 ec_host_response { 779 /* Structure version (=3) */ 780 uint8_t struct_version; 781 782 /* 783 * Checksum of response and data; sum of all bytes including checksum 784 * should total to 0. 785 */ 786 uint8_t checksum; 787 788 /* Result code (EC_RES_*) */ 789 uint16_t result; 790 791 /* Length of data which follows this header */ 792 uint16_t data_len; 793 794 /* Unused bytes in current protocol version; set to 0 */ 795 uint16_t reserved; 796 }; 797 798 /*****************************************************************************/ 799 /* 800 * Notes on commands: 801 * 802 * Each command is an 16-bit command value. Commands which take params or 803 * return response data specify structures for that data. If no structure is 804 * specified, the command does not input or output data, respectively. 805 * Parameter/response length is implicit in the structs. Some underlying 806 * communication protocols (I2C, SPI) may add length or checksum headers, but 807 * those are implementation-dependent and not defined here. 808 * 809 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 810 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 811 */ 812 813 /*****************************************************************************/ 814 /* General / test commands */ 815 816 /* 817 * Get protocol version, used to deal with non-backward compatible protocol 818 * changes. 819 */ 820 #define EC_CMD_PROTO_VERSION 0x0000 821 822 struct __ec_align4 ec_response_proto_version { 823 uint32_t version; 824 }; 825 826 /* 827 * Hello. This is a simple command to test the EC is responsive to 828 * commands. 829 */ 830 #define EC_CMD_HELLO 0x0001 831 832 struct __ec_align4 ec_params_hello { 833 uint32_t in_data; /* Pass anything here */ 834 }; 835 836 struct __ec_align4 ec_response_hello { 837 uint32_t out_data; /* Output will be in_data + 0x01020304 */ 838 }; 839 840 /* Get version number */ 841 #define EC_CMD_GET_VERSION 0x0002 842 843 enum ec_current_image { 844 EC_IMAGE_UNKNOWN = 0, 845 EC_IMAGE_RO, 846 EC_IMAGE_RW 847 }; 848 849 struct __ec_align4 ec_response_get_version { 850 /* Null-terminated version strings for RO, RW */ 851 char version_string_ro[32]; 852 char version_string_rw[32]; 853 char reserved[32]; /* Was previously RW-B string */ 854 uint32_t current_image; /* One of ec_current_image */ 855 }; 856 857 /* Read test */ 858 #define EC_CMD_READ_TEST 0x0003 859 860 struct __ec_align4 ec_params_read_test { 861 uint32_t offset; /* Starting value for read buffer */ 862 uint32_t size; /* Size to read in bytes */ 863 }; 864 865 struct __ec_align4 ec_response_read_test { 866 uint32_t data[32]; 867 }; 868 869 /* 870 * Get build information 871 * 872 * Response is null-terminated string. 873 */ 874 #define EC_CMD_GET_BUILD_INFO 0x0004 875 876 /* Get chip info */ 877 #define EC_CMD_GET_CHIP_INFO 0x0005 878 879 struct __ec_align4 ec_response_get_chip_info { 880 /* Null-terminated strings */ 881 char vendor[32]; 882 char name[32]; 883 char revision[32]; /* Mask version */ 884 }; 885 886 /* Get board HW version */ 887 #define EC_CMD_GET_BOARD_VERSION 0x0006 888 889 struct __ec_align2 ec_response_board_version { 890 uint16_t board_version; /* A monotonously incrementing number. */ 891 }; 892 893 /* 894 * Read memory-mapped data. 895 * 896 * This is an alternate interface to memory-mapped data for bus protocols 897 * which don't support direct-mapped memory - I2C, SPI, etc. 898 * 899 * Response is params.size bytes of data. 900 */ 901 #define EC_CMD_READ_MEMMAP 0x0007 902 903 struct __ec_align1 ec_params_read_memmap { 904 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ 905 uint8_t size; /* Size to read in bytes */ 906 }; 907 908 /* Read versions supported for a command */ 909 #define EC_CMD_GET_CMD_VERSIONS 0x0008 910 911 struct __ec_align1 ec_params_get_cmd_versions { 912 uint8_t cmd; /* Command to check */ 913 }; 914 915 struct __ec_align2 ec_params_get_cmd_versions_v1 { 916 uint16_t cmd; /* Command to check */ 917 }; 918 919 struct __ec_align4 ec_response_get_cmd_versions { 920 /* 921 * Mask of supported versions; use EC_VER_MASK() to compare with a 922 * desired version. 923 */ 924 uint32_t version_mask; 925 }; 926 927 /* 928 * Check EC communications status (busy). This is needed on i2c/spi but not 929 * on lpc since it has its own out-of-band busy indicator. 930 * 931 * lpc must read the status from the command register. Attempting this on 932 * lpc will overwrite the args/parameter space and corrupt its data. 933 */ 934 #define EC_CMD_GET_COMMS_STATUS 0x0009 935 936 /* Avoid using ec_status which is for return values */ 937 enum ec_comms_status { 938 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ 939 }; 940 941 struct __ec_align4 ec_response_get_comms_status { 942 uint32_t flags; /* Mask of enum ec_comms_status */ 943 }; 944 945 /* Fake a variety of responses, purely for testing purposes. */ 946 #define EC_CMD_TEST_PROTOCOL 0x000A 947 948 /* Tell the EC what to send back to us. */ 949 struct __ec_align4 ec_params_test_protocol { 950 uint32_t ec_result; 951 uint32_t ret_len; 952 uint8_t buf[32]; 953 }; 954 955 /* Here it comes... */ 956 struct __ec_align4 ec_response_test_protocol { 957 uint8_t buf[32]; 958 }; 959 960 /* Get protocol information */ 961 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 962 963 /* Flags for ec_response_get_protocol_info.flags */ 964 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 965 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) 966 967 struct __ec_align4 ec_response_get_protocol_info { 968 /* Fields which exist if at least protocol version 3 supported */ 969 970 /* Bitmask of protocol versions supported (1 << n means version n)*/ 971 uint32_t protocol_versions; 972 973 /* Maximum request packet size, in bytes */ 974 uint16_t max_request_packet_size; 975 976 /* Maximum response packet size, in bytes */ 977 uint16_t max_response_packet_size; 978 979 /* Flags; see EC_PROTOCOL_INFO_* */ 980 uint32_t flags; 981 }; 982 983 984 /*****************************************************************************/ 985 /* Get/Set miscellaneous values */ 986 987 /* The upper byte of .flags tells what to do (nothing means "get") */ 988 #define EC_GSV_SET 0x80000000 989 990 /* The lower three bytes of .flags identifies the parameter, if that has 991 meaning for an individual command. */ 992 #define EC_GSV_PARAM_MASK 0x00ffffff 993 994 struct __ec_align4 ec_params_get_set_value { 995 uint32_t flags; 996 uint32_t value; 997 }; 998 999 struct __ec_align4 ec_response_get_set_value { 1000 uint32_t flags; 1001 uint32_t value; 1002 }; 1003 1004 /* More than one command can use these structs to get/set parameters. */ 1005 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1006 1007 /*****************************************************************************/ 1008 /* List the features supported by the firmware */ 1009 #define EC_CMD_GET_FEATURES 0x000D 1010 1011 /* Supported features */ 1012 enum ec_feature_code { 1013 /* 1014 * This image contains a limited set of features. Another image 1015 * in RW partition may support more features. 1016 */ 1017 EC_FEATURE_LIMITED = 0, 1018 /* 1019 * Commands for probing/reading/writing/erasing the flash in the 1020 * EC are present. 1021 */ 1022 EC_FEATURE_FLASH = 1, 1023 /* 1024 * Can control the fan speed directly. 1025 */ 1026 EC_FEATURE_PWM_FAN = 2, 1027 /* 1028 * Can control the intensity of the keyboard backlight. 1029 */ 1030 EC_FEATURE_PWM_KEYB = 3, 1031 /* 1032 * Support Google lightbar, introduced on Pixel. 1033 */ 1034 EC_FEATURE_LIGHTBAR = 4, 1035 /* Control of LEDs */ 1036 EC_FEATURE_LED = 5, 1037 /* Exposes an interface to control gyro and sensors. 1038 * The host goes through the EC to access these sensors. 1039 * In addition, the EC may provide composite sensors, like lid angle. 1040 */ 1041 EC_FEATURE_MOTION_SENSE = 6, 1042 /* The keyboard is controlled by the EC */ 1043 EC_FEATURE_KEYB = 7, 1044 /* The AP can use part of the EC flash as persistent storage. */ 1045 EC_FEATURE_PSTORE = 8, 1046 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1047 EC_FEATURE_PORT80 = 9, 1048 /* 1049 * Thermal management: include TMP specific commands. 1050 * Higher level than direct fan control. 1051 */ 1052 EC_FEATURE_THERMAL = 10, 1053 /* Can switch the screen backlight on/off */ 1054 EC_FEATURE_BKLIGHT_SWITCH = 11, 1055 /* Can switch the wifi module on/off */ 1056 EC_FEATURE_WIFI_SWITCH = 12, 1057 /* Monitor host events, through for example SMI or SCI */ 1058 EC_FEATURE_HOST_EVENTS = 13, 1059 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1060 EC_FEATURE_GPIO = 14, 1061 /* The EC can send i2c messages to downstream devices. */ 1062 EC_FEATURE_I2C = 15, 1063 /* Command to control charger are included */ 1064 EC_FEATURE_CHARGER = 16, 1065 /* Simple battery support. */ 1066 EC_FEATURE_BATTERY = 17, 1067 /* 1068 * Support Smart battery protocol 1069 * (Common Smart Battery System Interface Specification) 1070 */ 1071 EC_FEATURE_SMART_BATTERY = 18, 1072 /* EC can detect when the host hangs. */ 1073 EC_FEATURE_HANG_DETECT = 19, 1074 /* Report power information, for pit only */ 1075 EC_FEATURE_PMU = 20, 1076 /* Another Cros EC device is present downstream of this one */ 1077 EC_FEATURE_SUB_MCU = 21, 1078 /* Support USB Power delivery (PD) commands */ 1079 EC_FEATURE_USB_PD = 22, 1080 /* Control USB multiplexer, for audio through USB port for instance. */ 1081 EC_FEATURE_USB_MUX = 23, 1082 /* Motion Sensor code has an internal software FIFO */ 1083 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1084 /* Support temporary secure vstore */ 1085 EC_FEATURE_VSTORE = 25, 1086 /* EC decides on USB-C SS mux state, muxes configured by host */ 1087 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1088 /* EC has RTC feature that can be controlled by host commands */ 1089 EC_FEATURE_RTC = 27, 1090 /* The MCU exposes a Fingerprint sensor */ 1091 EC_FEATURE_FINGERPRINT = 28, 1092 /* The MCU exposes a Touchpad */ 1093 EC_FEATURE_TOUCHPAD = 29, 1094 /* The MCU has RWSIG task enabled */ 1095 EC_FEATURE_RWSIG = 30, 1096 /* EC has device events support */ 1097 EC_FEATURE_DEVICE_EVENT = 31, 1098 /* EC supports the unified wake masks for LPC/eSPI systems */ 1099 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1100 }; 1101 1102 #define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) 1103 #define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32)) 1104 struct __ec_align4 ec_response_get_features { 1105 uint32_t flags[2]; 1106 }; 1107 1108 /*****************************************************************************/ 1109 /* Get the board's SKU ID from EC */ 1110 #define EC_CMD_GET_SKU_ID 0x000E 1111 1112 /* Set SKU ID from AP */ 1113 #define EC_CMD_SET_SKU_ID 0x000F 1114 1115 struct __ec_align4 ec_sku_id_info { 1116 uint32_t sku_id; 1117 }; 1118 1119 /*****************************************************************************/ 1120 /* Flash commands */ 1121 1122 /* Get flash info */ 1123 #define EC_CMD_FLASH_INFO 0x0010 1124 #define EC_VER_FLASH_INFO 2 1125 1126 /* Version 0 returns these fields */ 1127 struct __ec_align4 ec_response_flash_info { 1128 /* Usable flash size, in bytes */ 1129 uint32_t flash_size; 1130 /* 1131 * Write block size. Write offset and size must be a multiple 1132 * of this. 1133 */ 1134 uint32_t write_block_size; 1135 /* 1136 * Erase block size. Erase offset and size must be a multiple 1137 * of this. 1138 */ 1139 uint32_t erase_block_size; 1140 /* 1141 * Protection block size. Protection offset and size must be a 1142 * multiple of this. 1143 */ 1144 uint32_t protect_block_size; 1145 }; 1146 1147 /* Flags for version 1+ flash info command */ 1148 /* EC flash erases bits to 0 instead of 1 */ 1149 #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) 1150 1151 /* Flash must be selected for read/write/erase operations to succeed. This may 1152 * be necessary on a chip where write/erase can be corrupted by other board 1153 * activity, or where the chip needs to enable some sort of programming voltage, 1154 * or where the read/write/erase operations require cleanly suspending other 1155 * chip functionality. */ 1156 #define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1) 1157 1158 /* 1159 * Version 1 returns the same initial fields as version 0, with additional 1160 * fields following. 1161 * 1162 * gcc anonymous structs don't seem to get along with the __packed directive; 1163 * if they did we'd define the version 0 structure as a sub-structure of this 1164 * one. 1165 * 1166 * Version 2 supports flash banks of different sizes: 1167 * The caller specified the number of banks it has preallocated 1168 * (num_banks_desc) 1169 * The EC returns the number of banks describing the flash memory. 1170 * It adds banks descriptions up to num_banks_desc. 1171 */ 1172 struct __ec_align4 ec_response_flash_info_1 { 1173 /* Version 0 fields; see above for description */ 1174 uint32_t flash_size; 1175 uint32_t write_block_size; 1176 uint32_t erase_block_size; 1177 uint32_t protect_block_size; 1178 1179 /* Version 1 adds these fields: */ 1180 /* 1181 * Ideal write size in bytes. Writes will be fastest if size is 1182 * exactly this and offset is a multiple of this. For example, an EC 1183 * may have a write buffer which can do half-page operations if data is 1184 * aligned, and a slower word-at-a-time write mode. 1185 */ 1186 uint32_t write_ideal_size; 1187 1188 /* Flags; see EC_FLASH_INFO_* */ 1189 uint32_t flags; 1190 }; 1191 1192 struct __ec_align4 ec_params_flash_info_2 { 1193 /* Number of banks to describe */ 1194 uint16_t num_banks_desc; 1195 /* Reserved; set 0; ignore on read */ 1196 uint8_t reserved[2]; 1197 }; 1198 1199 struct ec_flash_bank { 1200 /* Number of sector is in this bank. */ 1201 uint16_t count; 1202 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1203 uint8_t size_exp; 1204 /* Minimal write size for the sectors in this bank */ 1205 uint8_t write_size_exp; 1206 /* Erase size for the sectors in this bank */ 1207 uint8_t erase_size_exp; 1208 /* Size for write protection, usually identical to erase size. */ 1209 uint8_t protect_size_exp; 1210 /* Reserved; set 0; ignore on read */ 1211 uint8_t reserved[2]; 1212 }; 1213 1214 struct __ec_align4 ec_response_flash_info_2 { 1215 /* Total flash in the EC. */ 1216 uint32_t flash_size; 1217 /* Flags; see EC_FLASH_INFO_* */ 1218 uint32_t flags; 1219 /* Maximum size to use to send data to write to the EC. */ 1220 uint32_t write_ideal_size; 1221 /* Number of banks present in the EC. */ 1222 uint16_t num_banks_total; 1223 /* Number of banks described in banks array. */ 1224 uint16_t num_banks_desc; 1225 struct ec_flash_bank banks[0]; 1226 }; 1227 1228 /* 1229 * Read flash 1230 * 1231 * Response is params.size bytes of data. 1232 */ 1233 #define EC_CMD_FLASH_READ 0x0011 1234 1235 struct __ec_align4 ec_params_flash_read { 1236 uint32_t offset; /* Byte offset to read */ 1237 uint32_t size; /* Size to read in bytes */ 1238 }; 1239 1240 /* Write flash */ 1241 #define EC_CMD_FLASH_WRITE 0x0012 1242 #define EC_VER_FLASH_WRITE 1 1243 1244 /* Version 0 of the flash command supported only 64 bytes of data */ 1245 #define EC_FLASH_WRITE_VER0_SIZE 64 1246 1247 struct __ec_align4 ec_params_flash_write { 1248 uint32_t offset; /* Byte offset to write */ 1249 uint32_t size; /* Size to write in bytes */ 1250 /* Followed by data to write */ 1251 }; 1252 1253 /* Erase flash */ 1254 #define EC_CMD_FLASH_ERASE 0x0013 1255 1256 /* v0 */ 1257 struct __ec_align4 ec_params_flash_erase { 1258 uint32_t offset; /* Byte offset to erase */ 1259 uint32_t size; /* Size to erase in bytes */ 1260 }; 1261 1262 1263 #define EC_VER_FLASH_WRITE 1 1264 /* v1 add async erase: 1265 * subcommands can returns: 1266 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1267 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1268 * EC_RES_ERROR : other errors. 1269 * EC_RES_BUSY : an existing erase operation is in progress. 1270 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1271 * 1272 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1273 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1274 * the proper result. 1275 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1276 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1277 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1278 * permitted while erasing. (For instance, STM32F4). 1279 */ 1280 enum ec_flash_erase_cmd { 1281 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1282 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1283 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1284 }; 1285 1286 struct __ec_align4 ec_params_flash_erase_v1 { 1287 /* One of ec_flash_erase_cmd. */ 1288 uint8_t cmd; 1289 /* Pad byte; currently always contains 0 */ 1290 uint8_t reserved; 1291 /* No flags defined yet; set to 0 */ 1292 uint16_t flag; 1293 /* Same as v0 parameters. */ 1294 struct ec_params_flash_erase params; 1295 }; 1296 1297 /* 1298 * Get/set flash protection. 1299 * 1300 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1301 * firmware write protect GPIO, not all flags will take effect immediately; 1302 * some flags require a subsequent hard reset to take effect. Check the 1303 * returned flags bits to see what actually happened. 1304 * 1305 * If mask=0, simply returns the current flags state. 1306 */ 1307 #define EC_CMD_FLASH_PROTECT 0x0015 1308 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1309 1310 /* Flags for flash protection */ 1311 /* RO flash code protected when the EC boots */ 1312 #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) 1313 /* 1314 * RO flash code protected now. If this bit is set, at-boot status cannot 1315 * be changed. 1316 */ 1317 #define EC_FLASH_PROTECT_RO_NOW (1 << 1) 1318 /* Entire flash code protected now, until reboot. */ 1319 #define EC_FLASH_PROTECT_ALL_NOW (1 << 2) 1320 /* Flash write protect GPIO is asserted now */ 1321 #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) 1322 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1323 #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) 1324 /* 1325 * Error - flash protection is in inconsistent state. At least one bank of 1326 * flash which should be protected is not protected. Usually fixed by 1327 * re-requesting the desired flags, or by a hard reset if that fails. 1328 */ 1329 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) 1330 /* Entire flash code protected when the EC boots */ 1331 #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) 1332 /* RW flash code protected when the EC boots */ 1333 #define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7) 1334 /* RW flash code protected now. */ 1335 #define EC_FLASH_PROTECT_RW_NOW (1 << 8) 1336 /* Rollback information flash region protected when the EC boots */ 1337 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9) 1338 /* Rollback information flash region protected now */ 1339 #define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10) 1340 1341 struct __ec_align4 ec_params_flash_protect { 1342 uint32_t mask; /* Bits in flags to apply */ 1343 uint32_t flags; /* New flags to apply */ 1344 }; 1345 1346 struct __ec_align4 ec_response_flash_protect { 1347 /* Current value of flash protect flags */ 1348 uint32_t flags; 1349 /* 1350 * Flags which are valid on this platform. This allows the caller 1351 * to distinguish between flags which aren't set vs. flags which can't 1352 * be set on this platform. 1353 */ 1354 uint32_t valid_flags; 1355 /* Flags which can be changed given the current protection state */ 1356 uint32_t writable_flags; 1357 }; 1358 1359 /* 1360 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1361 * write protect. These commands may be reused with version > 0. 1362 */ 1363 1364 /* Get the region offset/size */ 1365 #define EC_CMD_FLASH_REGION_INFO 0x0016 1366 #define EC_VER_FLASH_REGION_INFO 1 1367 1368 enum ec_flash_region { 1369 /* Region which holds read-only EC image */ 1370 EC_FLASH_REGION_RO = 0, 1371 /* Region which holds active rewritable EC image */ 1372 EC_FLASH_REGION_ACTIVE, 1373 /* 1374 * Region which should be write-protected in the factory (a superset of 1375 * EC_FLASH_REGION_RO) 1376 */ 1377 EC_FLASH_REGION_WP_RO, 1378 /* Region which holds updatable image */ 1379 EC_FLASH_REGION_UPDATE, 1380 /* Number of regions */ 1381 EC_FLASH_REGION_COUNT, 1382 }; 1383 1384 struct __ec_align4 ec_params_flash_region_info { 1385 uint32_t region; /* enum ec_flash_region */ 1386 }; 1387 1388 struct __ec_align4 ec_response_flash_region_info { 1389 uint32_t offset; 1390 uint32_t size; 1391 }; 1392 1393 /* Read/write VbNvContext */ 1394 #define EC_CMD_VBNV_CONTEXT 0x0017 1395 #define EC_VER_VBNV_CONTEXT 1 1396 #define EC_VBNV_BLOCK_SIZE 16 1397 #define EC_VBNV_BLOCK_SIZE_V2 64 1398 1399 enum ec_vbnvcontext_op { 1400 EC_VBNV_CONTEXT_OP_READ, 1401 EC_VBNV_CONTEXT_OP_WRITE, 1402 }; 1403 1404 struct __ec_align4 ec_params_vbnvcontext { 1405 uint32_t op; 1406 uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; 1407 }; 1408 1409 struct __ec_align4 ec_response_vbnvcontext { 1410 uint8_t block[EC_VBNV_BLOCK_SIZE_V2]; 1411 }; 1412 1413 1414 /* Get SPI flash information */ 1415 #define EC_CMD_FLASH_SPI_INFO 0x0018 1416 1417 struct __ec_align1 ec_response_flash_spi_info { 1418 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1419 uint8_t jedec[3]; 1420 1421 /* Pad byte; currently always contains 0 */ 1422 uint8_t reserved0; 1423 1424 /* Manufacturer / device ID from command 0x90 */ 1425 uint8_t mfr_dev_id[2]; 1426 1427 /* Status registers from command 0x05 and 0x35 */ 1428 uint8_t sr1, sr2; 1429 }; 1430 1431 1432 /* Select flash during flash operations */ 1433 #define EC_CMD_FLASH_SELECT 0x0019 1434 1435 struct __ec_align4 ec_params_flash_select { 1436 /* 1 to select flash, 0 to deselect flash */ 1437 uint8_t select; 1438 }; 1439 1440 /*****************************************************************************/ 1441 /* PWM commands */ 1442 1443 /* Get fan target RPM */ 1444 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1445 1446 struct __ec_align4 ec_response_pwm_get_fan_rpm { 1447 uint32_t rpm; 1448 }; 1449 1450 /* Set target fan RPM */ 1451 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1452 1453 /* Version 0 of input params */ 1454 struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 { 1455 uint32_t rpm; 1456 }; 1457 1458 /* Version 1 of input params */ 1459 struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 { 1460 uint32_t rpm; 1461 uint8_t fan_idx; 1462 }; 1463 1464 /* Get keyboard backlight */ 1465 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1466 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1467 1468 struct __ec_align1 ec_response_pwm_get_keyboard_backlight { 1469 uint8_t percent; 1470 uint8_t enabled; 1471 }; 1472 1473 /* Set keyboard backlight */ 1474 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1475 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1476 1477 struct __ec_align1 ec_params_pwm_set_keyboard_backlight { 1478 uint8_t percent; 1479 }; 1480 1481 /* Set target fan PWM duty cycle */ 1482 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1483 1484 /* Version 0 of input params */ 1485 struct __ec_align4 ec_params_pwm_set_fan_duty_v0 { 1486 uint32_t percent; 1487 }; 1488 1489 /* Version 1 of input params */ 1490 struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 { 1491 uint32_t percent; 1492 uint8_t fan_idx; 1493 }; 1494 1495 #define EC_CMD_PWM_SET_DUTY 0x0025 1496 /* 16 bit duty cycle, 0xffff = 100% */ 1497 #define EC_PWM_MAX_DUTY 0xffff 1498 1499 enum ec_pwm_type { 1500 /* All types, indexed by board-specific enum pwm_channel */ 1501 EC_PWM_TYPE_GENERIC = 0, 1502 /* Keyboard backlight */ 1503 EC_PWM_TYPE_KB_LIGHT, 1504 /* Display backlight */ 1505 EC_PWM_TYPE_DISPLAY_LIGHT, 1506 EC_PWM_TYPE_COUNT, 1507 }; 1508 1509 struct __ec_align4 ec_params_pwm_set_duty { 1510 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1511 uint8_t pwm_type; /* ec_pwm_type */ 1512 uint8_t index; /* Type-specific index, or 0 if unique */ 1513 }; 1514 1515 #define EC_CMD_PWM_GET_DUTY 0x0026 1516 1517 struct __ec_align1 ec_params_pwm_get_duty { 1518 uint8_t pwm_type; /* ec_pwm_type */ 1519 uint8_t index; /* Type-specific index, or 0 if unique */ 1520 }; 1521 1522 struct __ec_align2 ec_response_pwm_get_duty { 1523 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1524 }; 1525 1526 /*****************************************************************************/ 1527 /* 1528 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1529 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1530 * into a subcommand. We'll make separate structs for subcommands with 1531 * different input args, so that we know how much to expect. 1532 */ 1533 #define EC_CMD_LIGHTBAR_CMD 0x0028 1534 1535 struct __ec_todo_unpacked rgb_s { 1536 uint8_t r, g, b; 1537 }; 1538 1539 #define LB_BATTERY_LEVELS 4 1540 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1541 * host command, but the alignment is the same regardless. Keep it that way. 1542 */ 1543 struct __ec_todo_packed lightbar_params_v0 { 1544 /* Timing */ 1545 int32_t google_ramp_up; 1546 int32_t google_ramp_down; 1547 int32_t s3s0_ramp_up; 1548 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1549 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1550 int32_t s0s3_ramp_down; 1551 int32_t s3_sleep_for; 1552 int32_t s3_ramp_up; 1553 int32_t s3_ramp_down; 1554 1555 /* Oscillation */ 1556 uint8_t new_s0; 1557 uint8_t osc_min[2]; /* AC=0/1 */ 1558 uint8_t osc_max[2]; /* AC=0/1 */ 1559 uint8_t w_ofs[2]; /* AC=0/1 */ 1560 1561 /* Brightness limits based on the backlight and AC. */ 1562 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1563 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1564 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1565 1566 /* Battery level thresholds */ 1567 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1568 1569 /* Map [AC][battery_level] to color index */ 1570 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1571 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1572 1573 /* Color palette */ 1574 struct rgb_s color[8]; /* 0-3 are Google colors */ 1575 }; 1576 1577 struct __ec_todo_packed lightbar_params_v1 { 1578 /* Timing */ 1579 int32_t google_ramp_up; 1580 int32_t google_ramp_down; 1581 int32_t s3s0_ramp_up; 1582 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1583 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1584 int32_t s0s3_ramp_down; 1585 int32_t s3_sleep_for; 1586 int32_t s3_ramp_up; 1587 int32_t s3_ramp_down; 1588 int32_t s5_ramp_up; 1589 int32_t s5_ramp_down; 1590 int32_t tap_tick_delay; 1591 int32_t tap_gate_delay; 1592 int32_t tap_display_time; 1593 1594 /* Tap-for-battery params */ 1595 uint8_t tap_pct_red; 1596 uint8_t tap_pct_green; 1597 uint8_t tap_seg_min_on; 1598 uint8_t tap_seg_max_on; 1599 uint8_t tap_seg_osc; 1600 uint8_t tap_idx[3]; 1601 1602 /* Oscillation */ 1603 uint8_t osc_min[2]; /* AC=0/1 */ 1604 uint8_t osc_max[2]; /* AC=0/1 */ 1605 uint8_t w_ofs[2]; /* AC=0/1 */ 1606 1607 /* Brightness limits based on the backlight and AC. */ 1608 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1609 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1610 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1611 1612 /* Battery level thresholds */ 1613 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1614 1615 /* Map [AC][battery_level] to color index */ 1616 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1617 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1618 1619 /* s5: single color pulse on inhibited power-up */ 1620 uint8_t s5_idx; 1621 1622 /* Color palette */ 1623 struct rgb_s color[8]; /* 0-3 are Google colors */ 1624 }; 1625 1626 /* Lightbar command params v2 1627 * crbug.com/467716 1628 * 1629 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1630 * logical groups to make it more manageable ( < 120 bytes). 1631 * 1632 * NOTE: Each of these groups must be less than 120 bytes. 1633 */ 1634 1635 struct __ec_todo_packed lightbar_params_v2_timing { 1636 /* Timing */ 1637 int32_t google_ramp_up; 1638 int32_t google_ramp_down; 1639 int32_t s3s0_ramp_up; 1640 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1641 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1642 int32_t s0s3_ramp_down; 1643 int32_t s3_sleep_for; 1644 int32_t s3_ramp_up; 1645 int32_t s3_ramp_down; 1646 int32_t s5_ramp_up; 1647 int32_t s5_ramp_down; 1648 int32_t tap_tick_delay; 1649 int32_t tap_gate_delay; 1650 int32_t tap_display_time; 1651 }; 1652 1653 struct __ec_todo_packed lightbar_params_v2_tap { 1654 /* Tap-for-battery params */ 1655 uint8_t tap_pct_red; 1656 uint8_t tap_pct_green; 1657 uint8_t tap_seg_min_on; 1658 uint8_t tap_seg_max_on; 1659 uint8_t tap_seg_osc; 1660 uint8_t tap_idx[3]; 1661 }; 1662 1663 struct __ec_todo_packed lightbar_params_v2_oscillation { 1664 /* Oscillation */ 1665 uint8_t osc_min[2]; /* AC=0/1 */ 1666 uint8_t osc_max[2]; /* AC=0/1 */ 1667 uint8_t w_ofs[2]; /* AC=0/1 */ 1668 }; 1669 1670 struct __ec_todo_packed lightbar_params_v2_brightness { 1671 /* Brightness limits based on the backlight and AC. */ 1672 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1673 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1674 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1675 }; 1676 1677 struct __ec_todo_packed lightbar_params_v2_thresholds { 1678 /* Battery level thresholds */ 1679 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1680 }; 1681 1682 struct __ec_todo_packed lightbar_params_v2_colors { 1683 /* Map [AC][battery_level] to color index */ 1684 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1685 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1686 1687 /* s5: single color pulse on inhibited power-up */ 1688 uint8_t s5_idx; 1689 1690 /* Color palette */ 1691 struct rgb_s color[8]; /* 0-3 are Google colors */ 1692 }; 1693 1694 /* Lightbyte program. */ 1695 #define EC_LB_PROG_LEN 192 1696 struct __ec_todo_unpacked lightbar_program { 1697 uint8_t size; 1698 uint8_t data[EC_LB_PROG_LEN]; 1699 }; 1700 1701 struct __ec_todo_packed ec_params_lightbar { 1702 uint8_t cmd; /* Command (see enum lightbar_command) */ 1703 union { 1704 struct __ec_todo_unpacked { 1705 /* no args */ 1706 } dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1707 version, get_brightness, get_demo, suspend, resume, 1708 get_params_v2_timing, get_params_v2_tap, 1709 get_params_v2_osc, get_params_v2_bright, 1710 get_params_v2_thlds, get_params_v2_colors; 1711 1712 struct __ec_todo_unpacked { 1713 uint8_t num; 1714 } set_brightness, seq, demo; 1715 1716 struct __ec_todo_unpacked { 1717 uint8_t ctrl, reg, value; 1718 } reg; 1719 1720 struct __ec_todo_unpacked { 1721 uint8_t led, red, green, blue; 1722 } set_rgb; 1723 1724 struct __ec_todo_unpacked { 1725 uint8_t led; 1726 } get_rgb; 1727 1728 struct __ec_todo_unpacked { 1729 uint8_t enable; 1730 } manual_suspend_ctrl; 1731 1732 struct lightbar_params_v0 set_params_v0; 1733 struct lightbar_params_v1 set_params_v1; 1734 1735 struct lightbar_params_v2_timing set_v2par_timing; 1736 struct lightbar_params_v2_tap set_v2par_tap; 1737 struct lightbar_params_v2_oscillation set_v2par_osc; 1738 struct lightbar_params_v2_brightness set_v2par_bright; 1739 struct lightbar_params_v2_thresholds set_v2par_thlds; 1740 struct lightbar_params_v2_colors set_v2par_colors; 1741 1742 struct lightbar_program set_program; 1743 }; 1744 }; 1745 1746 struct __ec_todo_packed ec_response_lightbar { 1747 union { 1748 struct __ec_todo_unpacked { 1749 struct __ec_todo_unpacked { 1750 uint8_t reg; 1751 uint8_t ic0; 1752 uint8_t ic1; 1753 } vals[23]; 1754 } dump; 1755 1756 struct __ec_todo_unpacked { 1757 uint8_t num; 1758 } get_seq, get_brightness, get_demo; 1759 1760 struct lightbar_params_v0 get_params_v0; 1761 struct lightbar_params_v1 get_params_v1; 1762 1763 1764 struct lightbar_params_v2_timing get_params_v2_timing; 1765 struct lightbar_params_v2_tap get_params_v2_tap; 1766 struct lightbar_params_v2_oscillation get_params_v2_osc; 1767 struct lightbar_params_v2_brightness get_params_v2_bright; 1768 struct lightbar_params_v2_thresholds get_params_v2_thlds; 1769 struct lightbar_params_v2_colors get_params_v2_colors; 1770 1771 struct __ec_todo_unpacked { 1772 uint32_t num; 1773 uint32_t flags; 1774 } version; 1775 1776 struct __ec_todo_unpacked { 1777 uint8_t red, green, blue; 1778 } get_rgb; 1779 1780 struct __ec_todo_unpacked { 1781 /* no return params */ 1782 } off, on, init, set_brightness, seq, reg, set_rgb, 1783 demo, set_params_v0, set_params_v1, 1784 set_program, manual_suspend_ctrl, suspend, resume, 1785 set_v2par_timing, set_v2par_tap, 1786 set_v2par_osc, set_v2par_bright, set_v2par_thlds, 1787 set_v2par_colors; 1788 }; 1789 }; 1790 1791 /* Lightbar commands */ 1792 enum lightbar_command { 1793 LIGHTBAR_CMD_DUMP = 0, 1794 LIGHTBAR_CMD_OFF = 1, 1795 LIGHTBAR_CMD_ON = 2, 1796 LIGHTBAR_CMD_INIT = 3, 1797 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 1798 LIGHTBAR_CMD_SEQ = 5, 1799 LIGHTBAR_CMD_REG = 6, 1800 LIGHTBAR_CMD_SET_RGB = 7, 1801 LIGHTBAR_CMD_GET_SEQ = 8, 1802 LIGHTBAR_CMD_DEMO = 9, 1803 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 1804 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 1805 LIGHTBAR_CMD_VERSION = 12, 1806 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 1807 LIGHTBAR_CMD_GET_RGB = 14, 1808 LIGHTBAR_CMD_GET_DEMO = 15, 1809 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 1810 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 1811 LIGHTBAR_CMD_SET_PROGRAM = 18, 1812 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 1813 LIGHTBAR_CMD_SUSPEND = 20, 1814 LIGHTBAR_CMD_RESUME = 21, 1815 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 1816 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 1817 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 1818 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 1819 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 1820 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 1821 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 1822 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 1823 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 1824 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 1825 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 1826 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 1827 LIGHTBAR_NUM_CMDS 1828 }; 1829 1830 /*****************************************************************************/ 1831 /* LED control commands */ 1832 1833 #define EC_CMD_LED_CONTROL 0x0029 1834 1835 enum ec_led_id { 1836 /* LED to indicate battery state of charge */ 1837 EC_LED_ID_BATTERY_LED = 0, 1838 /* 1839 * LED to indicate system power state (on or in suspend). 1840 * May be on power button or on C-panel. 1841 */ 1842 EC_LED_ID_POWER_LED, 1843 /* LED on power adapter or its plug */ 1844 EC_LED_ID_ADAPTER_LED, 1845 /* LED to indicate left side */ 1846 EC_LED_ID_LEFT_LED, 1847 /* LED to indicate right side */ 1848 EC_LED_ID_RIGHT_LED, 1849 /* LED to indicate recovery mode with HW_REINIT */ 1850 EC_LED_ID_RECOVERY_HW_REINIT_LED, 1851 /* LED to indicate sysrq debug mode. */ 1852 EC_LED_ID_SYSRQ_DEBUG_LED, 1853 1854 EC_LED_ID_COUNT 1855 }; 1856 1857 /* LED control flags */ 1858 #define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ 1859 #define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ 1860 1861 enum ec_led_colors { 1862 EC_LED_COLOR_RED = 0, 1863 EC_LED_COLOR_GREEN, 1864 EC_LED_COLOR_BLUE, 1865 EC_LED_COLOR_YELLOW, 1866 EC_LED_COLOR_WHITE, 1867 EC_LED_COLOR_AMBER, 1868 1869 EC_LED_COLOR_COUNT 1870 }; 1871 1872 struct __ec_align1 ec_params_led_control { 1873 uint8_t led_id; /* Which LED to control */ 1874 uint8_t flags; /* Control flags */ 1875 1876 uint8_t brightness[EC_LED_COLOR_COUNT]; 1877 }; 1878 1879 struct __ec_align1 ec_response_led_control { 1880 /* 1881 * Available brightness value range. 1882 * 1883 * Range 0 means color channel not present. 1884 * Range 1 means on/off control. 1885 * Other values means the LED is control by PWM. 1886 */ 1887 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 1888 }; 1889 1890 /*****************************************************************************/ 1891 /* Verified boot commands */ 1892 1893 /* 1894 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 1895 * reused for other purposes with version > 0. 1896 */ 1897 1898 /* Verified boot hash command */ 1899 #define EC_CMD_VBOOT_HASH 0x002A 1900 1901 struct __ec_align4 ec_params_vboot_hash { 1902 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 1903 uint8_t hash_type; /* enum ec_vboot_hash_type */ 1904 uint8_t nonce_size; /* Nonce size; may be 0 */ 1905 uint8_t reserved0; /* Reserved; set 0 */ 1906 uint32_t offset; /* Offset in flash to hash */ 1907 uint32_t size; /* Number of bytes to hash */ 1908 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 1909 }; 1910 1911 struct __ec_align4 ec_response_vboot_hash { 1912 uint8_t status; /* enum ec_vboot_hash_status */ 1913 uint8_t hash_type; /* enum ec_vboot_hash_type */ 1914 uint8_t digest_size; /* Size of hash digest in bytes */ 1915 uint8_t reserved0; /* Ignore; will be 0 */ 1916 uint32_t offset; /* Offset in flash which was hashed */ 1917 uint32_t size; /* Number of bytes hashed */ 1918 uint8_t hash_digest[64]; /* Hash digest data */ 1919 }; 1920 1921 enum ec_vboot_hash_cmd { 1922 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 1923 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 1924 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 1925 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 1926 }; 1927 1928 enum ec_vboot_hash_type { 1929 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 1930 }; 1931 1932 enum ec_vboot_hash_status { 1933 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 1934 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 1935 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 1936 }; 1937 1938 /* 1939 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 1940 * If one of these is specified, the EC will automatically update offset and 1941 * size to the correct values for the specified image (RO or RW). 1942 */ 1943 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 1944 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 1945 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 1946 1947 /*****************************************************************************/ 1948 /* 1949 * Motion sense commands. We'll make separate structs for sub-commands with 1950 * different input args, so that we know how much to expect. 1951 */ 1952 #define EC_CMD_MOTION_SENSE_CMD 0x002B 1953 1954 /* Motion sense commands */ 1955 enum motionsense_command { 1956 /* 1957 * Dump command returns all motion sensor data including motion sense 1958 * module flags and individual sensor flags. 1959 */ 1960 MOTIONSENSE_CMD_DUMP = 0, 1961 1962 /* 1963 * Info command returns data describing the details of a given sensor, 1964 * including enum motionsensor_type, enum motionsensor_location, and 1965 * enum motionsensor_chip. 1966 */ 1967 MOTIONSENSE_CMD_INFO = 1, 1968 1969 /* 1970 * EC Rate command is a setter/getter command for the EC sampling rate 1971 * in milliseconds. 1972 * It is per sensor, the EC run sample task at the minimum of all 1973 * sensors EC_RATE. 1974 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 1975 * to collect all the sensor samples. 1976 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 1977 * to process of all motion sensors in milliseconds. 1978 */ 1979 MOTIONSENSE_CMD_EC_RATE = 2, 1980 1981 /* 1982 * Sensor ODR command is a setter/getter command for the output data 1983 * rate of a specific motion sensor in millihertz. 1984 */ 1985 MOTIONSENSE_CMD_SENSOR_ODR = 3, 1986 1987 /* 1988 * Sensor range command is a setter/getter command for the range of 1989 * a specified motion sensor in +/-G's or +/- deg/s. 1990 */ 1991 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 1992 1993 /* 1994 * Setter/getter command for the keyboard wake angle. When the lid 1995 * angle is greater than this value, keyboard wake is disabled in S3, 1996 * and when the lid angle goes less than this value, keyboard wake is 1997 * enabled. Note, the lid angle measurement is an approximate, 1998 * un-calibrated value, hence the wake angle isn't exact. 1999 */ 2000 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2001 2002 /* 2003 * Returns a single sensor data. 2004 */ 2005 MOTIONSENSE_CMD_DATA = 6, 2006 2007 /* 2008 * Return sensor fifo info. 2009 */ 2010 MOTIONSENSE_CMD_FIFO_INFO = 7, 2011 2012 /* 2013 * Insert a flush element in the fifo and return sensor fifo info. 2014 * The host can use that element to synchronize its operation. 2015 */ 2016 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2017 2018 /* 2019 * Return a portion of the fifo. 2020 */ 2021 MOTIONSENSE_CMD_FIFO_READ = 9, 2022 2023 /* 2024 * Perform low level calibration. 2025 * On sensors that support it, ask to do offset calibration. 2026 */ 2027 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2028 2029 /* 2030 * Sensor Offset command is a setter/getter command for the offset 2031 * used for calibration. 2032 * The offsets can be calculated by the host, or via 2033 * PERFORM_CALIB command. 2034 */ 2035 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2036 2037 /* 2038 * List available activities for a MOTION sensor. 2039 * Indicates if they are enabled or disabled. 2040 */ 2041 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2042 2043 /* 2044 * Activity management 2045 * Enable/Disable activity recognition. 2046 */ 2047 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2048 2049 /* 2050 * Lid Angle 2051 */ 2052 MOTIONSENSE_CMD_LID_ANGLE = 14, 2053 2054 /* 2055 * Allow the FIFO to trigger interrupt via MKBP events. 2056 * By default the FIFO does not send interrupt to process the FIFO 2057 * until the AP is ready or it is coming from a wakeup sensor. 2058 */ 2059 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2060 2061 /* 2062 * Spoof the readings of the sensors. The spoofed readings can be set 2063 * to arbitrary values, or will lock to the last read actual values. 2064 */ 2065 MOTIONSENSE_CMD_SPOOF = 16, 2066 2067 /* Number of motionsense sub-commands. */ 2068 MOTIONSENSE_NUM_CMDS 2069 }; 2070 2071 /* List of motion sensor types. */ 2072 enum motionsensor_type { 2073 MOTIONSENSE_TYPE_ACCEL = 0, 2074 MOTIONSENSE_TYPE_GYRO = 1, 2075 MOTIONSENSE_TYPE_MAG = 2, 2076 MOTIONSENSE_TYPE_PROX = 3, 2077 MOTIONSENSE_TYPE_LIGHT = 4, 2078 MOTIONSENSE_TYPE_ACTIVITY = 5, 2079 MOTIONSENSE_TYPE_BARO = 6, 2080 MOTIONSENSE_TYPE_MAX, 2081 }; 2082 2083 /* List of motion sensor locations. */ 2084 enum motionsensor_location { 2085 MOTIONSENSE_LOC_BASE = 0, 2086 MOTIONSENSE_LOC_LID = 1, 2087 MOTIONSENSE_LOC_MAX, 2088 }; 2089 2090 /* List of motion sensor chips. */ 2091 enum motionsensor_chip { 2092 MOTIONSENSE_CHIP_KXCJ9 = 0, 2093 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2094 MOTIONSENSE_CHIP_BMI160 = 2, 2095 MOTIONSENSE_CHIP_SI1141 = 3, 2096 MOTIONSENSE_CHIP_SI1142 = 4, 2097 MOTIONSENSE_CHIP_SI1143 = 5, 2098 MOTIONSENSE_CHIP_KX022 = 6, 2099 MOTIONSENSE_CHIP_L3GD20H = 7, 2100 MOTIONSENSE_CHIP_BMA255 = 8, 2101 MOTIONSENSE_CHIP_BMP280 = 9, 2102 MOTIONSENSE_CHIP_OPT3001 = 10, 2103 }; 2104 2105 struct __ec_todo_packed ec_response_motion_sensor_data { 2106 /* Flags for each sensor. */ 2107 uint8_t flags; 2108 /* sensor number the data comes from */ 2109 uint8_t sensor_num; 2110 /* Each sensor is up to 3-axis. */ 2111 union { 2112 int16_t data[3]; 2113 struct __ec_todo_packed { 2114 uint16_t reserved; 2115 uint32_t timestamp; 2116 }; 2117 struct __ec_todo_unpacked { 2118 uint8_t activity; /* motionsensor_activity */ 2119 uint8_t state; 2120 int16_t add_info[2]; 2121 }; 2122 }; 2123 }; 2124 2125 /* Note: used in ec_response_get_next_data */ 2126 struct __ec_todo_packed ec_response_motion_sense_fifo_info { 2127 /* Size of the fifo */ 2128 uint16_t size; 2129 /* Amount of space used in the fifo */ 2130 uint16_t count; 2131 /* Timestamp recorded in us */ 2132 uint32_t timestamp; 2133 /* Total amount of vector lost */ 2134 uint16_t total_lost; 2135 /* Lost events since the last fifo_info, per sensors */ 2136 uint16_t lost[0]; 2137 }; 2138 2139 struct __ec_todo_packed ec_response_motion_sense_fifo_data { 2140 uint32_t number_data; 2141 struct ec_response_motion_sensor_data data[0]; 2142 }; 2143 2144 /* List supported activity recognition */ 2145 enum motionsensor_activity { 2146 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2147 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2148 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2149 }; 2150 2151 struct __ec_todo_unpacked ec_motion_sense_activity { 2152 uint8_t sensor_num; 2153 uint8_t activity; /* one of enum motionsensor_activity */ 2154 uint8_t enable; /* 1: enable, 0: disable */ 2155 uint8_t reserved; 2156 uint16_t parameters[3]; /* activity dependent parameters */ 2157 }; 2158 2159 /* Module flag masks used for the dump sub-command. */ 2160 #define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) 2161 2162 /* Sensor flag masks used for the dump sub-command. */ 2163 #define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) 2164 2165 /* 2166 * Flush entry for synchronization. 2167 * data contains time stamp 2168 */ 2169 #define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0) 2170 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1) 2171 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2) 2172 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3) 2173 2174 /* 2175 * Send this value for the data element to only perform a read. If you 2176 * send any other value, the EC will interpret it as data to set and will 2177 * return the actual value set. 2178 */ 2179 #define EC_MOTION_SENSE_NO_VALUE -1 2180 2181 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2182 2183 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2184 /* Set Calibration information */ 2185 #define MOTION_SENSE_SET_OFFSET 1 2186 2187 #define LID_ANGLE_UNRELIABLE 500 2188 2189 enum motionsense_spoof_mode { 2190 /* Disable spoof mode. */ 2191 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2192 2193 /* Enable spoof mode, but use provided component values. */ 2194 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2195 2196 /* Enable spoof mode, but use the current sensor values. */ 2197 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2198 2199 /* Query the current spoof mode status for the sensor. */ 2200 MOTIONSENSE_SPOOF_MODE_QUERY, 2201 }; 2202 2203 struct __ec_todo_packed ec_params_motion_sense { 2204 uint8_t cmd; 2205 union { 2206 /* Used for MOTIONSENSE_CMD_DUMP */ 2207 struct __ec_todo_unpacked { 2208 /* 2209 * Maximal number of sensor the host is expecting. 2210 * 0 means the host is only interested in the number 2211 * of sensors controlled by the EC. 2212 */ 2213 uint8_t max_sensor_count; 2214 } dump; 2215 2216 /* 2217 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2218 */ 2219 struct __ec_todo_unpacked { 2220 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2221 * kb_wake_angle: angle to wakup AP. 2222 */ 2223 int16_t data; 2224 } kb_wake_angle; 2225 2226 /* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2227 * and MOTIONSENSE_CMD_PERFORM_CALIB. */ 2228 struct __ec_todo_unpacked { 2229 uint8_t sensor_num; 2230 } info, info_3, data, fifo_flush, perform_calib, 2231 list_activities; 2232 2233 /* 2234 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2235 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2236 */ 2237 struct __ec_todo_unpacked { 2238 uint8_t sensor_num; 2239 2240 /* Rounding flag, true for round-up, false for down. */ 2241 uint8_t roundup; 2242 2243 uint16_t reserved; 2244 2245 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2246 int32_t data; 2247 } ec_rate, sensor_odr, sensor_range; 2248 2249 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2250 struct __ec_todo_packed { 2251 uint8_t sensor_num; 2252 2253 /* 2254 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2255 * the calibration information in the EC. 2256 * If unset, just retrieve calibration information. 2257 */ 2258 uint16_t flags; 2259 2260 /* 2261 * Temperature at calibration, in units of 0.01 C 2262 * 0x8000: invalid / unknown. 2263 * 0x0: 0C 2264 * 0x7fff: +327.67C 2265 */ 2266 int16_t temp; 2267 2268 /* 2269 * Offset for calibration. 2270 * Unit: 2271 * Accelerometer: 1/1024 g 2272 * Gyro: 1/1024 deg/s 2273 * Compass: 1/16 uT 2274 */ 2275 int16_t offset[3]; 2276 } sensor_offset; 2277 2278 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2279 struct __ec_todo_unpacked { 2280 } fifo_info; 2281 2282 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2283 struct __ec_todo_unpacked { 2284 /* 2285 * Number of expected vector to return. 2286 * EC may return less or 0 if none available. 2287 */ 2288 uint32_t max_data_vector; 2289 } fifo_read; 2290 2291 struct ec_motion_sense_activity set_activity; 2292 2293 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2294 struct __ec_todo_unpacked { 2295 } lid_angle; 2296 2297 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2298 struct __ec_todo_unpacked { 2299 /* 2300 * 1: enable, 0 disable fifo, 2301 * EC_MOTION_SENSE_NO_VALUE return value. 2302 */ 2303 int8_t enable; 2304 } fifo_int_enable; 2305 2306 /* Used for MOTIONSENSE_CMD_SPOOF */ 2307 struct __ec_todo_packed { 2308 uint8_t sensor_id; 2309 2310 /* See enum motionsense_spoof_mode. */ 2311 uint8_t spoof_enable; 2312 2313 /* Ignored, used for alignment. */ 2314 uint8_t reserved; 2315 2316 /* Individual component values to spoof. */ 2317 int16_t components[3]; 2318 } spoof; 2319 }; 2320 }; 2321 2322 struct __ec_todo_packed ec_response_motion_sense { 2323 union { 2324 /* Used for MOTIONSENSE_CMD_DUMP */ 2325 struct __ec_todo_unpacked { 2326 /* Flags representing the motion sensor module. */ 2327 uint8_t module_flags; 2328 2329 /* Number of sensors managed directly by the EC */ 2330 uint8_t sensor_count; 2331 2332 /* 2333 * sensor data is truncated if response_max is too small 2334 * for holding all the data. 2335 */ 2336 struct ec_response_motion_sensor_data sensor[0]; 2337 } dump; 2338 2339 /* Used for MOTIONSENSE_CMD_INFO. */ 2340 struct __ec_todo_unpacked { 2341 /* Should be element of enum motionsensor_type. */ 2342 uint8_t type; 2343 2344 /* Should be element of enum motionsensor_location. */ 2345 uint8_t location; 2346 2347 /* Should be element of enum motionsensor_chip. */ 2348 uint8_t chip; 2349 } info; 2350 2351 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2352 struct __ec_todo_unpacked { 2353 /* Should be element of enum motionsensor_type. */ 2354 uint8_t type; 2355 2356 /* Should be element of enum motionsensor_location. */ 2357 uint8_t location; 2358 2359 /* Should be element of enum motionsensor_chip. */ 2360 uint8_t chip; 2361 2362 /* Minimum sensor sampling frequency */ 2363 uint32_t min_frequency; 2364 2365 /* Maximum sensor sampling frequency */ 2366 uint32_t max_frequency; 2367 2368 /* Max number of sensor events that could be in fifo */ 2369 uint32_t fifo_max_event_count; 2370 } info_3; 2371 2372 /* Used for MOTIONSENSE_CMD_DATA */ 2373 struct ec_response_motion_sensor_data data; 2374 2375 /* 2376 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2377 * MOTIONSENSE_CMD_SENSOR_RANGE, 2378 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2379 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2380 * MOTIONSENSE_CMD_SPOOF. 2381 */ 2382 struct __ec_todo_unpacked { 2383 /* Current value of the parameter queried. */ 2384 int32_t ret; 2385 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2386 fifo_int_enable, spoof; 2387 2388 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2389 struct __ec_todo_unpacked { 2390 int16_t temp; 2391 int16_t offset[3]; 2392 } sensor_offset, perform_calib; 2393 2394 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2395 2396 struct ec_response_motion_sense_fifo_data fifo_read; 2397 2398 struct __ec_todo_packed { 2399 uint16_t reserved; 2400 uint32_t enabled; 2401 uint32_t disabled; 2402 } list_activities; 2403 2404 struct __ec_todo_unpacked { 2405 } set_activity; 2406 2407 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2408 struct __ec_todo_unpacked { 2409 /* 2410 * Angle between 0 and 360 degree if available, 2411 * LID_ANGLE_UNRELIABLE otherwise. 2412 */ 2413 uint16_t value; 2414 } lid_angle; 2415 }; 2416 }; 2417 2418 /*****************************************************************************/ 2419 /* Force lid open command */ 2420 2421 /* Make lid event always open */ 2422 #define EC_CMD_FORCE_LID_OPEN 0x002C 2423 2424 struct __ec_align1 ec_params_force_lid_open { 2425 uint8_t enabled; 2426 }; 2427 2428 /*****************************************************************************/ 2429 /* Configure the behavior of the power button */ 2430 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2431 2432 enum ec_config_power_button_flags { 2433 /* Enable/Disable power button pulses for x86 devices */ 2434 EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0), 2435 }; 2436 2437 struct __ec_align1 ec_params_config_power_button { 2438 /* See enum ec_config_power_button_flags */ 2439 uint8_t flags; 2440 }; 2441 2442 /*****************************************************************************/ 2443 /* USB charging control commands */ 2444 2445 /* Set USB port charging mode */ 2446 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2447 2448 struct __ec_align1 ec_params_usb_charge_set_mode { 2449 uint8_t usb_port_id; 2450 uint8_t mode; 2451 }; 2452 2453 /*****************************************************************************/ 2454 /* Persistent storage for host */ 2455 2456 /* Maximum bytes that can be read/written in a single command */ 2457 #define EC_PSTORE_SIZE_MAX 64 2458 2459 /* Get persistent storage info */ 2460 #define EC_CMD_PSTORE_INFO 0x0040 2461 2462 struct __ec_align4 ec_response_pstore_info { 2463 /* Persistent storage size, in bytes */ 2464 uint32_t pstore_size; 2465 /* Access size; read/write offset and size must be a multiple of this */ 2466 uint32_t access_size; 2467 }; 2468 2469 /* 2470 * Read persistent storage 2471 * 2472 * Response is params.size bytes of data. 2473 */ 2474 #define EC_CMD_PSTORE_READ 0x0041 2475 2476 struct __ec_align4 ec_params_pstore_read { 2477 uint32_t offset; /* Byte offset to read */ 2478 uint32_t size; /* Size to read in bytes */ 2479 }; 2480 2481 /* Write persistent storage */ 2482 #define EC_CMD_PSTORE_WRITE 0x0042 2483 2484 struct __ec_align4 ec_params_pstore_write { 2485 uint32_t offset; /* Byte offset to write */ 2486 uint32_t size; /* Size to write in bytes */ 2487 uint8_t data[EC_PSTORE_SIZE_MAX]; 2488 }; 2489 2490 /*****************************************************************************/ 2491 /* Real-time clock */ 2492 2493 /* RTC params and response structures */ 2494 struct __ec_align4 ec_params_rtc { 2495 uint32_t time; 2496 }; 2497 2498 struct __ec_align4 ec_response_rtc { 2499 uint32_t time; 2500 }; 2501 2502 /* These use ec_response_rtc */ 2503 #define EC_CMD_RTC_GET_VALUE 0x0044 2504 #define EC_CMD_RTC_GET_ALARM 0x0045 2505 2506 /* These all use ec_params_rtc */ 2507 #define EC_CMD_RTC_SET_VALUE 0x0046 2508 #define EC_CMD_RTC_SET_ALARM 0x0047 2509 2510 /* Pass as time param to SET_ALARM to clear the current alarm */ 2511 #define EC_RTC_ALARM_CLEAR 0 2512 2513 /*****************************************************************************/ 2514 /* Port80 log access */ 2515 2516 /* Maximum entries that can be read/written in a single command */ 2517 #define EC_PORT80_SIZE_MAX 32 2518 2519 /* Get last port80 code from previous boot */ 2520 #define EC_CMD_PORT80_LAST_BOOT 0x0048 2521 #define EC_CMD_PORT80_READ 0x0048 2522 2523 enum ec_port80_subcmd { 2524 EC_PORT80_GET_INFO = 0, 2525 EC_PORT80_READ_BUFFER, 2526 }; 2527 2528 struct __ec_todo_packed ec_params_port80_read { 2529 uint16_t subcmd; 2530 union { 2531 struct __ec_todo_unpacked { 2532 uint32_t offset; 2533 uint32_t num_entries; 2534 } read_buffer; 2535 }; 2536 }; 2537 2538 struct __ec_todo_packed ec_response_port80_read { 2539 union { 2540 struct __ec_todo_unpacked { 2541 uint32_t writes; 2542 uint32_t history_size; 2543 uint32_t last_boot; 2544 } get_info; 2545 struct __ec_todo_unpacked { 2546 uint16_t codes[EC_PORT80_SIZE_MAX]; 2547 } data; 2548 }; 2549 }; 2550 2551 struct __ec_align2 ec_response_port80_last_boot { 2552 uint16_t code; 2553 }; 2554 2555 /*****************************************************************************/ 2556 /* Temporary secure storage for host verified boot use */ 2557 2558 /* Number of bytes in a vstore slot */ 2559 #define EC_VSTORE_SLOT_SIZE 64 2560 2561 /* Maximum number of vstore slots */ 2562 #define EC_VSTORE_SLOT_MAX 32 2563 2564 /* Get persistent storage info */ 2565 #define EC_CMD_VSTORE_INFO 0x0049 2566 struct __ec_align_size1 ec_response_vstore_info { 2567 /* Indicates which slots are locked */ 2568 uint32_t slot_locked; 2569 /* Total number of slots available */ 2570 uint8_t slot_count; 2571 }; 2572 2573 /* 2574 * Read temporary secure storage 2575 * 2576 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 2577 */ 2578 #define EC_CMD_VSTORE_READ 0x004A 2579 2580 struct __ec_align1 ec_params_vstore_read { 2581 uint8_t slot; /* Slot to read from */ 2582 }; 2583 2584 struct __ec_align1 ec_response_vstore_read { 2585 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2586 }; 2587 2588 /* 2589 * Write temporary secure storage and lock it. 2590 */ 2591 #define EC_CMD_VSTORE_WRITE 0x004B 2592 2593 struct __ec_align1 ec_params_vstore_write { 2594 uint8_t slot; /* Slot to write to */ 2595 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2596 }; 2597 2598 /*****************************************************************************/ 2599 /* Thermal engine commands. Note that there are two implementations. We'll 2600 * reuse the command number, but the data and behavior is incompatible. 2601 * Version 0 is what originally shipped on Link. 2602 * Version 1 separates the CPU thermal limits from the fan control. 2603 */ 2604 2605 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 2606 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2607 2608 /* The version 0 structs are opaque. You have to know what they are for 2609 * the get/set commands to make any sense. 2610 */ 2611 2612 /* Version 0 - set */ 2613 struct __ec_align2 ec_params_thermal_set_threshold { 2614 uint8_t sensor_type; 2615 uint8_t threshold_id; 2616 uint16_t value; 2617 }; 2618 2619 /* Version 0 - get */ 2620 struct __ec_align1 ec_params_thermal_get_threshold { 2621 uint8_t sensor_type; 2622 uint8_t threshold_id; 2623 }; 2624 2625 struct __ec_align2 ec_response_thermal_get_threshold { 2626 uint16_t value; 2627 }; 2628 2629 2630 /* The version 1 structs are visible. */ 2631 enum ec_temp_thresholds { 2632 EC_TEMP_THRESH_WARN = 0, 2633 EC_TEMP_THRESH_HIGH, 2634 EC_TEMP_THRESH_HALT, 2635 2636 EC_TEMP_THRESH_COUNT 2637 }; 2638 2639 /* 2640 * Thermal configuration for one temperature sensor. Temps are in degrees K. 2641 * Zero values will be silently ignored by the thermal task. 2642 * 2643 * Note that this structure is a sub-structure of 2644 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 2645 */ 2646 struct __ec_align4 ec_thermal_config { 2647 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 2648 uint32_t temp_fan_off; /* no active cooling needed */ 2649 uint32_t temp_fan_max; /* max active cooling needed */ 2650 }; 2651 2652 /* Version 1 - get config for one sensor. */ 2653 struct __ec_align4 ec_params_thermal_get_threshold_v1 { 2654 uint32_t sensor_num; 2655 }; 2656 /* This returns a struct ec_thermal_config */ 2657 2658 /* Version 1 - set config for one sensor. 2659 * Use read-modify-write for best results! */ 2660 struct __ec_align4 ec_params_thermal_set_threshold_v1 { 2661 uint32_t sensor_num; 2662 struct ec_thermal_config cfg; 2663 }; 2664 /* This returns no data */ 2665 2666 /****************************************************************************/ 2667 2668 /* Toggle automatic fan control */ 2669 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 2670 2671 /* Version 1 of input params */ 2672 struct __ec_align1 ec_params_auto_fan_ctrl_v1 { 2673 uint8_t fan_idx; 2674 }; 2675 2676 /* Get/Set TMP006 calibration data */ 2677 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 2678 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 2679 2680 /* 2681 * The original TMP006 calibration only needed four params, but now we need 2682 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 2683 * the params opaque. The v1 "get" response will include the algorithm number 2684 * and how many params it requires. That way we can change the EC code without 2685 * needing to update this file. We can also use a different algorithm on each 2686 * sensor. 2687 */ 2688 2689 /* This is the same struct for both v0 and v1. */ 2690 struct __ec_align1 ec_params_tmp006_get_calibration { 2691 uint8_t index; 2692 }; 2693 2694 /* Version 0 */ 2695 struct __ec_align4 ec_response_tmp006_get_calibration_v0 { 2696 float s0; 2697 float b0; 2698 float b1; 2699 float b2; 2700 }; 2701 2702 struct __ec_align4 ec_params_tmp006_set_calibration_v0 { 2703 uint8_t index; 2704 uint8_t reserved[3]; 2705 float s0; 2706 float b0; 2707 float b1; 2708 float b2; 2709 }; 2710 2711 /* Version 1 */ 2712 struct __ec_align4 ec_response_tmp006_get_calibration_v1 { 2713 uint8_t algorithm; 2714 uint8_t num_params; 2715 uint8_t reserved[2]; 2716 float val[0]; 2717 }; 2718 2719 struct __ec_align4 ec_params_tmp006_set_calibration_v1 { 2720 uint8_t index; 2721 uint8_t algorithm; 2722 uint8_t num_params; 2723 uint8_t reserved; 2724 float val[0]; 2725 }; 2726 2727 2728 /* Read raw TMP006 data */ 2729 #define EC_CMD_TMP006_GET_RAW 0x0055 2730 2731 struct __ec_align1 ec_params_tmp006_get_raw { 2732 uint8_t index; 2733 }; 2734 2735 struct __ec_align4 ec_response_tmp006_get_raw { 2736 int32_t t; /* In 1/100 K */ 2737 int32_t v; /* In nV */ 2738 }; 2739 2740 /*****************************************************************************/ 2741 /* MKBP - Matrix KeyBoard Protocol */ 2742 2743 /* 2744 * Read key state 2745 * 2746 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 2747 * expected response size. 2748 * 2749 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 2750 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 2751 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 2752 */ 2753 #define EC_CMD_MKBP_STATE 0x0060 2754 2755 /* 2756 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 2757 */ 2758 #define EC_CMD_MKBP_INFO 0x0061 2759 2760 struct __ec_align_size1 ec_response_mkbp_info { 2761 uint32_t rows; 2762 uint32_t cols; 2763 /* Formerly "switches", which was 0. */ 2764 uint8_t reserved; 2765 }; 2766 2767 struct __ec_align1 ec_params_mkbp_info { 2768 uint8_t info_type; 2769 uint8_t event_type; 2770 }; 2771 2772 enum ec_mkbp_info_type { 2773 /* 2774 * Info about the keyboard matrix: number of rows and columns. 2775 * 2776 * Returns struct ec_response_mkbp_info. 2777 */ 2778 EC_MKBP_INFO_KBD = 0, 2779 2780 /* 2781 * For buttons and switches, info about which specifically are 2782 * supported. event_type must be set to one of the values in enum 2783 * ec_mkbp_event. 2784 * 2785 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 2786 * bitmask indicating which buttons or switches are present. See the 2787 * bit inidices below. 2788 */ 2789 EC_MKBP_INFO_SUPPORTED = 1, 2790 2791 /* 2792 * Instantaneous state of buttons and switches. 2793 * 2794 * event_type must be set to one of the values in enum ec_mkbp_event. 2795 * 2796 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 2797 * indicating the current state of the keyboard matrix. 2798 * 2799 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 2800 * event state. 2801 * 2802 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 2803 * state of supported buttons. 2804 * 2805 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 2806 * state of supported switches. 2807 */ 2808 EC_MKBP_INFO_CURRENT = 2, 2809 }; 2810 2811 /* Simulate key press */ 2812 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 2813 2814 struct __ec_align1 ec_params_mkbp_simulate_key { 2815 uint8_t col; 2816 uint8_t row; 2817 uint8_t pressed; 2818 }; 2819 2820 /* Configure keyboard scanning */ 2821 #define EC_CMD_MKBP_SET_CONFIG 0x0064 2822 #define EC_CMD_MKBP_GET_CONFIG 0x0065 2823 2824 /* flags */ 2825 enum mkbp_config_flags { 2826 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 2827 }; 2828 2829 enum mkbp_config_valid { 2830 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, 2831 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, 2832 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, 2833 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, 2834 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, 2835 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, 2836 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, 2837 }; 2838 2839 /* 2840 * Configuration for our key scanning algorithm. 2841 * 2842 * Note that this is used as a sub-structure of 2843 * ec_{params/response}_mkbp_get_config. 2844 */ 2845 struct __ec_align_size1 ec_mkbp_config { 2846 uint32_t valid_mask; /* valid fields */ 2847 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 2848 uint8_t valid_flags; /* which flags are valid */ 2849 uint16_t scan_period_us; /* period between start of scans */ 2850 /* revert to interrupt mode after no activity for this long */ 2851 uint32_t poll_timeout_us; 2852 /* 2853 * minimum post-scan relax time. Once we finish a scan we check 2854 * the time until we are due to start the next one. If this time is 2855 * shorter this field, we use this instead. 2856 */ 2857 uint16_t min_post_scan_delay_us; 2858 /* delay between setting up output and waiting for it to settle */ 2859 uint16_t output_settle_us; 2860 uint16_t debounce_down_us; /* time for debounce on key down */ 2861 uint16_t debounce_up_us; /* time for debounce on key up */ 2862 /* maximum depth to allow for fifo (0 = no keyscan output) */ 2863 uint8_t fifo_max_depth; 2864 }; 2865 2866 struct __ec_align_size1 ec_params_mkbp_set_config { 2867 struct ec_mkbp_config config; 2868 }; 2869 2870 struct __ec_align_size1 ec_response_mkbp_get_config { 2871 struct ec_mkbp_config config; 2872 }; 2873 2874 /* Run the key scan emulation */ 2875 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 2876 2877 enum ec_keyscan_seq_cmd { 2878 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 2879 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 2880 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 2881 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 2882 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 2883 }; 2884 2885 enum ec_collect_flags { 2886 /* 2887 * Indicates this scan was processed by the EC. Due to timing, some 2888 * scans may be skipped. 2889 */ 2890 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, 2891 }; 2892 2893 struct __ec_align1 ec_collect_item { 2894 uint8_t flags; /* some flags (enum ec_collect_flags) */ 2895 }; 2896 2897 struct __ec_todo_packed ec_params_keyscan_seq_ctrl { 2898 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 2899 union { 2900 struct __ec_align1 { 2901 uint8_t active; /* still active */ 2902 uint8_t num_items; /* number of items */ 2903 /* Current item being presented */ 2904 uint8_t cur_item; 2905 } status; 2906 struct __ec_todo_unpacked { 2907 /* 2908 * Absolute time for this scan, measured from the 2909 * start of the sequence. 2910 */ 2911 uint32_t time_us; 2912 uint8_t scan[0]; /* keyscan data */ 2913 } add; 2914 struct __ec_align1 { 2915 uint8_t start_item; /* First item to return */ 2916 uint8_t num_items; /* Number of items to return */ 2917 } collect; 2918 }; 2919 }; 2920 2921 struct __ec_todo_packed ec_result_keyscan_seq_ctrl { 2922 union { 2923 struct __ec_todo_unpacked { 2924 uint8_t num_items; /* Number of items */ 2925 /* Data for each item */ 2926 struct ec_collect_item item[0]; 2927 } collect; 2928 }; 2929 }; 2930 2931 /* 2932 * Get the next pending MKBP event. 2933 * 2934 * Returns EC_RES_UNAVAILABLE if there is no event pending. 2935 */ 2936 #define EC_CMD_GET_NEXT_EVENT 0x0067 2937 2938 enum ec_mkbp_event { 2939 /* Keyboard matrix changed. The event data is the new matrix state. */ 2940 EC_MKBP_EVENT_KEY_MATRIX = 0, 2941 2942 /* New host event. The event data is 4 bytes of host event flags. */ 2943 EC_MKBP_EVENT_HOST_EVENT = 1, 2944 2945 /* New Sensor FIFO data. The event data is fifo_info structure. */ 2946 EC_MKBP_EVENT_SENSOR_FIFO = 2, 2947 2948 /* The state of the non-matrixed buttons have changed. */ 2949 EC_MKBP_EVENT_BUTTON = 3, 2950 2951 /* The state of the switches have changed. */ 2952 EC_MKBP_EVENT_SWITCH = 4, 2953 2954 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 2955 EC_MKBP_EVENT_FINGERPRINT = 5, 2956 2957 /* 2958 * Sysrq event: send emulated sysrq. The event data is sysrq, 2959 * corresponding to the key to be pressed. 2960 */ 2961 EC_MKBP_EVENT_SYSRQ = 6, 2962 2963 /* Number of MKBP events */ 2964 EC_MKBP_EVENT_COUNT, 2965 }; 2966 2967 union __ec_align_offset1 ec_response_get_next_data { 2968 uint8_t key_matrix[13]; 2969 2970 /* Unaligned */ 2971 uint32_t host_event; 2972 2973 struct __ec_todo_unpacked { 2974 /* For aligning the fifo_info */ 2975 uint8_t reserved[3]; 2976 struct ec_response_motion_sense_fifo_info info; 2977 } sensor_fifo; 2978 2979 uint32_t buttons; 2980 2981 uint32_t switches; 2982 2983 uint32_t fp_events; 2984 2985 uint32_t sysrq; 2986 }; 2987 2988 struct __ec_align1 ec_response_get_next_event { 2989 uint8_t event_type; 2990 /* Followed by event data if any */ 2991 union ec_response_get_next_data data; 2992 }; 2993 2994 /* Bit indices for buttons and switches.*/ 2995 /* Buttons */ 2996 #define EC_MKBP_POWER_BUTTON 0 2997 #define EC_MKBP_VOL_UP 1 2998 #define EC_MKBP_VOL_DOWN 2 2999 #define EC_MKBP_RECOVERY 3 3000 3001 /* Switches */ 3002 #define EC_MKBP_LID_OPEN 0 3003 #define EC_MKBP_TABLET_MODE 1 3004 3005 /* Run keyboard factory test scanning */ 3006 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3007 3008 struct __ec_align2 ec_response_keyboard_factory_test { 3009 uint16_t shorted; /* Keyboard pins are shorted */ 3010 }; 3011 3012 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3013 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3014 #define EC_MKBP_FP_FINGER_DOWN (1 << 29) 3015 #define EC_MKBP_FP_FINGER_UP (1 << 30) 3016 #define EC_MKBP_FP_IMAGE_READY (1 << 31) 3017 3018 /*****************************************************************************/ 3019 /* Temperature sensor commands */ 3020 3021 /* Read temperature sensor info */ 3022 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3023 3024 struct __ec_align1 ec_params_temp_sensor_get_info { 3025 uint8_t id; 3026 }; 3027 3028 struct __ec_align1 ec_response_temp_sensor_get_info { 3029 char sensor_name[32]; 3030 uint8_t sensor_type; 3031 }; 3032 3033 /*****************************************************************************/ 3034 3035 /* 3036 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3037 * commands accidentally sent to the wrong interface. See the ACPI section 3038 * below. 3039 */ 3040 3041 /*****************************************************************************/ 3042 /* Host event commands */ 3043 3044 3045 /* Obsolete. New implementation should use EC_CMD_PROGRAM_HOST_EVENT instead */ 3046 /* 3047 * Host event mask params and response structures, shared by all of the host 3048 * event commands below. 3049 */ 3050 struct __ec_align4 ec_params_host_event_mask { 3051 uint32_t mask; 3052 }; 3053 3054 struct __ec_align4 ec_response_host_event_mask { 3055 uint32_t mask; 3056 }; 3057 3058 /* These all use ec_response_host_event_mask */ 3059 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3060 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3061 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3062 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3063 3064 /* These all use ec_params_host_event_mask */ 3065 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3066 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3067 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3068 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3069 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3070 3071 /* 3072 * Unified host event programming interface - Should be used by newer versions 3073 * of BIOS/OS to program host events and masks 3074 */ 3075 3076 struct __ec_align4 ec_params_host_event { 3077 3078 /* Action requested by host - one of enum ec_host_event_action. */ 3079 uint8_t action; 3080 3081 /* 3082 * Mask type that the host requested the action on - one of 3083 * enum ec_host_event_mask_type. 3084 */ 3085 uint8_t mask_type; 3086 3087 /* Set to 0, ignore on read */ 3088 uint16_t reserved; 3089 3090 /* Value to be used in case of set operations. */ 3091 uint64_t value; 3092 }; 3093 3094 /* 3095 * Response structure returned by EC_CMD_HOST_EVENT. 3096 * Update the value on a GET request. Set to 0 on GET/CLEAR 3097 */ 3098 3099 struct __ec_align4 ec_response_host_event { 3100 3101 /* Mask value in case of get operation */ 3102 uint64_t value; 3103 }; 3104 3105 enum ec_host_event_action { 3106 /* 3107 * params.value is ignored. Value of mask_type populated 3108 * in response.value 3109 */ 3110 EC_HOST_EVENT_GET, 3111 3112 /* Bits in params.value are set */ 3113 EC_HOST_EVENT_SET, 3114 3115 /* Bits in params.value are cleared */ 3116 EC_HOST_EVENT_CLEAR, 3117 }; 3118 3119 enum ec_host_event_mask_type { 3120 3121 /* Main host event copy */ 3122 EC_HOST_EVENT_MAIN, 3123 3124 /* Copy B of host events */ 3125 EC_HOST_EVENT_B, 3126 3127 /* SCI Mask */ 3128 EC_HOST_EVENT_SCI_MASK, 3129 3130 /* SMI Mask */ 3131 EC_HOST_EVENT_SMI_MASK, 3132 3133 /* Mask of events that should be always reported in hostevents */ 3134 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3135 3136 /* Active wake mask */ 3137 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3138 3139 /* Lazy wake mask for S0ix */ 3140 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3141 3142 /* Lazy wake mask for S3 */ 3143 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3144 3145 /* Lazy wake mask for S5 */ 3146 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3147 }; 3148 3149 #define EC_CMD_HOST_EVENT 0x00A4 3150 3151 /*****************************************************************************/ 3152 /* Switch commands */ 3153 3154 /* Enable/disable LCD backlight */ 3155 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3156 3157 struct __ec_align1 ec_params_switch_enable_backlight { 3158 uint8_t enabled; 3159 }; 3160 3161 /* Enable/disable WLAN/Bluetooth */ 3162 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3163 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3164 3165 /* Version 0 params; no response */ 3166 struct __ec_align1 ec_params_switch_enable_wireless_v0 { 3167 uint8_t enabled; 3168 }; 3169 3170 /* Version 1 params */ 3171 struct __ec_align1 ec_params_switch_enable_wireless_v1 { 3172 /* Flags to enable now */ 3173 uint8_t now_flags; 3174 3175 /* Which flags to copy from now_flags */ 3176 uint8_t now_mask; 3177 3178 /* 3179 * Flags to leave enabled in S3, if they're on at the S0->S3 3180 * transition. (Other flags will be disabled by the S0->S3 3181 * transition.) 3182 */ 3183 uint8_t suspend_flags; 3184 3185 /* Which flags to copy from suspend_flags */ 3186 uint8_t suspend_mask; 3187 }; 3188 3189 /* Version 1 response */ 3190 struct __ec_align1 ec_response_switch_enable_wireless_v1 { 3191 /* Flags to enable now */ 3192 uint8_t now_flags; 3193 3194 /* Flags to leave enabled in S3 */ 3195 uint8_t suspend_flags; 3196 }; 3197 3198 /*****************************************************************************/ 3199 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3200 3201 /* Set GPIO output value */ 3202 #define EC_CMD_GPIO_SET 0x0092 3203 3204 struct __ec_align1 ec_params_gpio_set { 3205 char name[32]; 3206 uint8_t val; 3207 }; 3208 3209 /* Get GPIO value */ 3210 #define EC_CMD_GPIO_GET 0x0093 3211 3212 /* Version 0 of input params and response */ 3213 struct __ec_align1 ec_params_gpio_get { 3214 char name[32]; 3215 }; 3216 3217 struct __ec_align1 ec_response_gpio_get { 3218 uint8_t val; 3219 }; 3220 3221 /* Version 1 of input params and response */ 3222 struct __ec_align1 ec_params_gpio_get_v1 { 3223 uint8_t subcmd; 3224 union { 3225 struct __ec_align1 { 3226 char name[32]; 3227 } get_value_by_name; 3228 struct __ec_align1 { 3229 uint8_t index; 3230 } get_info; 3231 }; 3232 }; 3233 3234 struct __ec_todo_packed ec_response_gpio_get_v1 { 3235 union { 3236 struct __ec_align1 { 3237 uint8_t val; 3238 } get_value_by_name, get_count; 3239 struct __ec_todo_unpacked { 3240 uint8_t val; 3241 char name[32]; 3242 uint32_t flags; 3243 } get_info; 3244 }; 3245 }; 3246 3247 enum gpio_get_subcmd { 3248 EC_GPIO_GET_BY_NAME = 0, 3249 EC_GPIO_GET_COUNT = 1, 3250 EC_GPIO_GET_INFO = 2, 3251 }; 3252 3253 /*****************************************************************************/ 3254 /* I2C commands. Only available when flash write protect is unlocked. */ 3255 3256 /* 3257 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3258 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3259 * 3260 * Use EC_CMD_I2C_PASSTHRU instead. 3261 */ 3262 3263 /* Read I2C bus */ 3264 #define EC_CMD_I2C_READ 0x0094 3265 3266 struct __ec_align_size1 ec_params_i2c_read { 3267 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3268 uint8_t read_size; /* Either 8 or 16. */ 3269 uint8_t port; 3270 uint8_t offset; 3271 }; 3272 3273 struct __ec_align2 ec_response_i2c_read { 3274 uint16_t data; 3275 }; 3276 3277 /* Write I2C bus */ 3278 #define EC_CMD_I2C_WRITE 0x0095 3279 3280 struct __ec_align_size1 ec_params_i2c_write { 3281 uint16_t data; 3282 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3283 uint8_t write_size; /* Either 8 or 16. */ 3284 uint8_t port; 3285 uint8_t offset; 3286 }; 3287 3288 /*****************************************************************************/ 3289 /* Charge state commands. Only available when flash write protect unlocked. */ 3290 3291 /* Force charge state machine to stop charging the battery or force it to 3292 * discharge the battery. 3293 */ 3294 #define EC_CMD_CHARGE_CONTROL 0x0096 3295 #define EC_VER_CHARGE_CONTROL 1 3296 3297 enum ec_charge_control_mode { 3298 CHARGE_CONTROL_NORMAL = 0, 3299 CHARGE_CONTROL_IDLE, 3300 CHARGE_CONTROL_DISCHARGE, 3301 }; 3302 3303 struct __ec_align4 ec_params_charge_control { 3304 uint32_t mode; /* enum charge_control_mode */ 3305 }; 3306 3307 /*****************************************************************************/ 3308 /* Console commands. Only available when flash write protect is unlocked. */ 3309 3310 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3311 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3312 3313 /* 3314 * Read data from the saved snapshot. If the subcmd parameter is 3315 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3316 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3317 * end of the previous snapshot. 3318 * 3319 * The params are only looked at in version >= 1 of this command. Prior 3320 * versions will just default to CONSOLE_READ_NEXT behavior. 3321 * 3322 * Response is null-terminated string. Empty string, if there is no more 3323 * remaining output. 3324 */ 3325 #define EC_CMD_CONSOLE_READ 0x0098 3326 3327 enum ec_console_read_subcmd { 3328 CONSOLE_READ_NEXT = 0, 3329 CONSOLE_READ_RECENT 3330 }; 3331 3332 struct __ec_align1 ec_params_console_read_v1 { 3333 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3334 }; 3335 3336 /*****************************************************************************/ 3337 3338 /* 3339 * Cut off battery power immediately or after the host has shut down. 3340 * 3341 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3342 * EC_RES_SUCCESS if the command was successful. 3343 * EC_RES_ERROR if the cut off command failed. 3344 */ 3345 #define EC_CMD_BATTERY_CUT_OFF 0x0099 3346 3347 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) 3348 3349 struct __ec_align1 ec_params_battery_cutoff { 3350 uint8_t flags; 3351 }; 3352 3353 /*****************************************************************************/ 3354 /* USB port mux control. */ 3355 3356 /* 3357 * Switch USB mux or return to automatic switching. 3358 */ 3359 #define EC_CMD_USB_MUX 0x009A 3360 3361 struct __ec_align1 ec_params_usb_mux { 3362 uint8_t mux; 3363 }; 3364 3365 /*****************************************************************************/ 3366 /* LDOs / FETs control. */ 3367 3368 enum ec_ldo_state { 3369 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 3370 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 3371 }; 3372 3373 /* 3374 * Switch on/off a LDO. 3375 */ 3376 #define EC_CMD_LDO_SET 0x009B 3377 3378 struct __ec_align1 ec_params_ldo_set { 3379 uint8_t index; 3380 uint8_t state; 3381 }; 3382 3383 /* 3384 * Get LDO state. 3385 */ 3386 #define EC_CMD_LDO_GET 0x009C 3387 3388 struct __ec_align1 ec_params_ldo_get { 3389 uint8_t index; 3390 }; 3391 3392 struct __ec_align1 ec_response_ldo_get { 3393 uint8_t state; 3394 }; 3395 3396 /*****************************************************************************/ 3397 /* Power info. */ 3398 3399 /* 3400 * Get power info. 3401 */ 3402 #define EC_CMD_POWER_INFO 0x009D 3403 3404 struct __ec_align4 ec_response_power_info { 3405 uint32_t usb_dev_type; 3406 uint16_t voltage_ac; 3407 uint16_t voltage_system; 3408 uint16_t current_system; 3409 uint16_t usb_current_limit; 3410 }; 3411 3412 /*****************************************************************************/ 3413 /* I2C passthru command */ 3414 3415 #define EC_CMD_I2C_PASSTHRU 0x009E 3416 3417 /* Read data; if not present, message is a write */ 3418 #define EC_I2C_FLAG_READ (1 << 15) 3419 3420 /* Mask for address */ 3421 #define EC_I2C_ADDR_MASK 0x3ff 3422 3423 #define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ 3424 #define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ 3425 3426 /* Any error */ 3427 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 3428 3429 struct __ec_align2 ec_params_i2c_passthru_msg { 3430 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3431 uint16_t len; /* Number of bytes to read or write */ 3432 }; 3433 3434 struct __ec_align2 ec_params_i2c_passthru { 3435 uint8_t port; /* I2C port number */ 3436 uint8_t num_msgs; /* Number of messages */ 3437 struct ec_params_i2c_passthru_msg msg[]; 3438 /* Data to write for all messages is concatenated here */ 3439 }; 3440 3441 struct __ec_align1 ec_response_i2c_passthru { 3442 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3443 uint8_t num_msgs; /* Number of messages processed */ 3444 uint8_t data[]; /* Data read by messages concatenated here */ 3445 }; 3446 3447 /*****************************************************************************/ 3448 /* Power button hang detect */ 3449 3450 #define EC_CMD_HANG_DETECT 0x009F 3451 3452 /* Reasons to start hang detection timer */ 3453 /* Power button pressed */ 3454 #define EC_HANG_START_ON_POWER_PRESS (1 << 0) 3455 3456 /* Lid closed */ 3457 #define EC_HANG_START_ON_LID_CLOSE (1 << 1) 3458 3459 /* Lid opened */ 3460 #define EC_HANG_START_ON_LID_OPEN (1 << 2) 3461 3462 /* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3463 #define EC_HANG_START_ON_RESUME (1 << 3) 3464 3465 /* Reasons to cancel hang detection */ 3466 3467 /* Power button released */ 3468 #define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) 3469 3470 /* Any host command from AP received */ 3471 #define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) 3472 3473 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3474 #define EC_HANG_STOP_ON_SUSPEND (1 << 10) 3475 3476 /* 3477 * If this flag is set, all the other fields are ignored, and the hang detect 3478 * timer is started. This provides the AP a way to start the hang timer 3479 * without reconfiguring any of the other hang detect settings. Note that 3480 * you must previously have configured the timeouts. 3481 */ 3482 #define EC_HANG_START_NOW (1 << 30) 3483 3484 /* 3485 * If this flag is set, all the other fields are ignored (including 3486 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3487 * without reconfiguring any of the other hang detect settings. 3488 */ 3489 #define EC_HANG_STOP_NOW (1 << 31) 3490 3491 struct __ec_align4 ec_params_hang_detect { 3492 /* Flags; see EC_HANG_* */ 3493 uint32_t flags; 3494 3495 /* Timeout in msec before generating host event, if enabled */ 3496 uint16_t host_event_timeout_msec; 3497 3498 /* Timeout in msec before generating warm reboot, if enabled */ 3499 uint16_t warm_reboot_timeout_msec; 3500 }; 3501 3502 /*****************************************************************************/ 3503 /* Commands for battery charging */ 3504 3505 /* 3506 * This is the single catch-all host command to exchange data regarding the 3507 * charge state machine (v2 and up). 3508 */ 3509 #define EC_CMD_CHARGE_STATE 0x00A0 3510 3511 /* Subcommands for this host command */ 3512 enum charge_state_command { 3513 CHARGE_STATE_CMD_GET_STATE, 3514 CHARGE_STATE_CMD_GET_PARAM, 3515 CHARGE_STATE_CMD_SET_PARAM, 3516 CHARGE_STATE_NUM_CMDS 3517 }; 3518 3519 /* 3520 * Known param numbers are defined here. Ranges are reserved for board-specific 3521 * params, which are handled by the particular implementations. 3522 */ 3523 enum charge_state_params { 3524 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 3525 CS_PARAM_CHG_CURRENT, /* charger current limit */ 3526 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 3527 CS_PARAM_CHG_STATUS, /* charger-specific status */ 3528 CS_PARAM_CHG_OPTION, /* charger-specific options */ 3529 CS_PARAM_LIMIT_POWER, /* 3530 * Check if power is limited due to 3531 * low battery and / or a weak external 3532 * charger. READ ONLY. 3533 */ 3534 /* How many so far? */ 3535 CS_NUM_BASE_PARAMS, 3536 3537 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 3538 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 3539 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 3540 3541 /* Other custom param ranges go here... */ 3542 }; 3543 3544 struct __ec_todo_packed ec_params_charge_state { 3545 uint8_t cmd; /* enum charge_state_command */ 3546 union { 3547 struct __ec_align1 { 3548 /* no args */ 3549 } get_state; 3550 3551 struct __ec_todo_unpacked { 3552 uint32_t param; /* enum charge_state_param */ 3553 } get_param; 3554 3555 struct __ec_todo_unpacked { 3556 uint32_t param; /* param to set */ 3557 uint32_t value; /* value to set */ 3558 } set_param; 3559 }; 3560 }; 3561 3562 struct __ec_align4 ec_response_charge_state { 3563 union { 3564 struct __ec_align4 { 3565 int ac; 3566 int chg_voltage; 3567 int chg_current; 3568 int chg_input_current; 3569 int batt_state_of_charge; 3570 } get_state; 3571 3572 struct __ec_align4 { 3573 uint32_t value; 3574 } get_param; 3575 struct __ec_align4 { 3576 /* no return values */ 3577 } set_param; 3578 }; 3579 }; 3580 3581 3582 /* 3583 * Set maximum battery charging current. 3584 */ 3585 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 3586 3587 struct __ec_align4 ec_params_current_limit { 3588 uint32_t limit; /* in mA */ 3589 }; 3590 3591 /* 3592 * Set maximum external voltage / current. 3593 */ 3594 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 3595 3596 /* Command v0 is used only on Spring and is obsolete + unsupported */ 3597 struct __ec_align2 ec_params_external_power_limit_v1 { 3598 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 3599 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 3600 }; 3601 3602 #define EC_POWER_LIMIT_NONE 0xffff 3603 3604 /* 3605 * Set maximum voltage & current of a dedicated charge port 3606 */ 3607 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 3608 3609 struct __ec_align2 ec_params_dedicated_charger_limit { 3610 uint16_t current_lim; /* in mA */ 3611 uint16_t voltage_lim; /* in mV */ 3612 }; 3613 3614 /*****************************************************************************/ 3615 /* Hibernate/Deep Sleep Commands */ 3616 3617 /* Set the delay before going into hibernation. */ 3618 #define EC_CMD_HIBERNATION_DELAY 0x00A8 3619 3620 struct __ec_align4 ec_params_hibernation_delay { 3621 /* 3622 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 3623 * current settings without changing them. 3624 */ 3625 uint32_t seconds; 3626 }; 3627 3628 struct __ec_align4 ec_response_hibernation_delay { 3629 /* 3630 * The current time in seconds in which the system has been in the G3 3631 * state. This value is reset if the EC transitions out of G3. 3632 */ 3633 uint32_t time_g3; 3634 3635 /* 3636 * The current time remaining in seconds until the EC should hibernate. 3637 * This value is also reset if the EC transitions out of G3. 3638 */ 3639 uint32_t time_remaining; 3640 3641 /* 3642 * The current time in seconds that the EC should wait in G3 before 3643 * hibernating. 3644 */ 3645 uint32_t hibernate_delay; 3646 }; 3647 3648 /* Inform the EC when entering a sleep state */ 3649 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 3650 3651 enum host_sleep_event { 3652 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 3653 HOST_SLEEP_EVENT_S3_RESUME = 2, 3654 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 3655 HOST_SLEEP_EVENT_S0IX_RESUME = 4 3656 }; 3657 3658 struct __ec_align1 ec_params_host_sleep_event { 3659 uint8_t sleep_event; 3660 }; 3661 3662 /*****************************************************************************/ 3663 /* Device events */ 3664 #define EC_CMD_DEVICE_EVENT 0x00AA 3665 3666 enum ec_device_event { 3667 EC_DEVICE_EVENT_TRACKPAD, 3668 EC_DEVICE_EVENT_DSP, 3669 EC_DEVICE_EVENT_WIFI, 3670 }; 3671 3672 enum ec_device_event_param { 3673 /* Get and clear pending device events */ 3674 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 3675 /* Get device event mask */ 3676 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 3677 /* Set device event mask */ 3678 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 3679 }; 3680 3681 #define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32)) 3682 3683 struct __ec_align_size1 ec_params_device_event { 3684 uint32_t event_mask; 3685 uint8_t param; 3686 }; 3687 3688 struct __ec_align4 ec_response_device_event { 3689 uint32_t event_mask; 3690 }; 3691 3692 /*****************************************************************************/ 3693 /* Smart battery pass-through */ 3694 3695 /* Get / Set 16-bit smart battery registers */ 3696 #define EC_CMD_SB_READ_WORD 0x00B0 3697 #define EC_CMD_SB_WRITE_WORD 0x00B1 3698 3699 /* Get / Set string smart battery parameters 3700 * formatted as SMBUS "block". 3701 */ 3702 #define EC_CMD_SB_READ_BLOCK 0x00B2 3703 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 3704 3705 struct __ec_align1 ec_params_sb_rd { 3706 uint8_t reg; 3707 }; 3708 3709 struct __ec_align2 ec_response_sb_rd_word { 3710 uint16_t value; 3711 }; 3712 3713 struct __ec_align1 ec_params_sb_wr_word { 3714 uint8_t reg; 3715 uint16_t value; 3716 }; 3717 3718 struct __ec_align1 ec_response_sb_rd_block { 3719 uint8_t data[32]; 3720 }; 3721 3722 struct __ec_align1 ec_params_sb_wr_block { 3723 uint8_t reg; 3724 uint16_t data[32]; 3725 }; 3726 3727 /*****************************************************************************/ 3728 /* Battery vendor parameters 3729 * 3730 * Get or set vendor-specific parameters in the battery. Implementations may 3731 * differ between boards or batteries. On a set operation, the response 3732 * contains the actual value set, which may be rounded or clipped from the 3733 * requested value. 3734 */ 3735 3736 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 3737 3738 enum ec_battery_vendor_param_mode { 3739 BATTERY_VENDOR_PARAM_MODE_GET = 0, 3740 BATTERY_VENDOR_PARAM_MODE_SET, 3741 }; 3742 3743 struct __ec_align_size1 ec_params_battery_vendor_param { 3744 uint32_t param; 3745 uint32_t value; 3746 uint8_t mode; 3747 }; 3748 3749 struct __ec_align4 ec_response_battery_vendor_param { 3750 uint32_t value; 3751 }; 3752 3753 /*****************************************************************************/ 3754 /* 3755 * Smart Battery Firmware Update Commands 3756 */ 3757 #define EC_CMD_SB_FW_UPDATE 0x00B5 3758 3759 enum ec_sb_fw_update_subcmd { 3760 EC_SB_FW_UPDATE_PREPARE = 0x0, 3761 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 3762 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 3763 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 3764 EC_SB_FW_UPDATE_END = 0x4, 3765 EC_SB_FW_UPDATE_STATUS = 0x5, 3766 EC_SB_FW_UPDATE_PROTECT = 0x6, 3767 EC_SB_FW_UPDATE_MAX = 0x7, 3768 }; 3769 3770 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 3771 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 3772 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 3773 3774 struct __ec_align4 ec_sb_fw_update_header { 3775 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 3776 uint16_t fw_id; /* firmware id */ 3777 }; 3778 3779 struct __ec_align4 ec_params_sb_fw_update { 3780 struct ec_sb_fw_update_header hdr; 3781 union { 3782 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 3783 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 3784 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 3785 /* EC_SB_FW_UPDATE_END = 0x4 */ 3786 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 3787 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 3788 struct __ec_align4 { 3789 /* no args */ 3790 } dummy; 3791 3792 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 3793 struct __ec_align4 { 3794 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 3795 } write; 3796 }; 3797 }; 3798 3799 struct __ec_align1 ec_response_sb_fw_update { 3800 union { 3801 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 3802 struct __ec_align1 { 3803 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 3804 } info; 3805 3806 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 3807 struct __ec_align1 { 3808 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 3809 } status; 3810 }; 3811 }; 3812 3813 /* 3814 * Entering Verified Boot Mode Command 3815 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 3816 * Valid Modes are: normal, developer, and recovery. 3817 */ 3818 #define EC_CMD_ENTERING_MODE 0x00B6 3819 3820 struct __ec_align4 ec_params_entering_mode { 3821 int vboot_mode; 3822 }; 3823 3824 #define VBOOT_MODE_NORMAL 0 3825 #define VBOOT_MODE_DEVELOPER 1 3826 #define VBOOT_MODE_RECOVERY 2 3827 3828 /*****************************************************************************/ 3829 /* 3830 * I2C passthru protection command: Protects I2C tunnels against access on 3831 * certain addresses (board-specific). 3832 */ 3833 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 3834 3835 enum ec_i2c_passthru_protect_subcmd { 3836 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 3837 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 3838 }; 3839 3840 struct __ec_align1 ec_params_i2c_passthru_protect { 3841 uint8_t subcmd; 3842 uint8_t port; /* I2C port number */ 3843 }; 3844 3845 struct __ec_align1 ec_response_i2c_passthru_protect { 3846 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 3847 }; 3848 3849 /*****************************************************************************/ 3850 /* System commands */ 3851 3852 /* 3853 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 3854 * necessarily reboot the EC. Rename to "image" or something similar? 3855 */ 3856 #define EC_CMD_REBOOT_EC 0x00D2 3857 3858 /* Command */ 3859 enum ec_reboot_cmd { 3860 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 3861 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 3862 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ 3863 /* (command 3 was jump to RW-B) */ 3864 EC_REBOOT_COLD = 4, /* Cold-reboot */ 3865 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 3866 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 3867 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 3868 }; 3869 3870 /* Flags for ec_params_reboot_ec.reboot_flags */ 3871 #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ 3872 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ 3873 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2) /* Switch RW slot */ 3874 3875 struct __ec_align1 ec_params_reboot_ec { 3876 uint8_t cmd; /* enum ec_reboot_cmd */ 3877 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 3878 }; 3879 3880 /* 3881 * Get information on last EC panic. 3882 * 3883 * Returns variable-length platform-dependent panic information. See panic.h 3884 * for details. 3885 */ 3886 #define EC_CMD_GET_PANIC_INFO 0x00D3 3887 3888 /*****************************************************************************/ 3889 /* 3890 * Special commands 3891 * 3892 * These do not follow the normal rules for commands. See each command for 3893 * details. 3894 */ 3895 3896 /* 3897 * Reboot NOW 3898 * 3899 * This command will work even when the EC LPC interface is busy, because the 3900 * reboot command is processed at interrupt level. Note that when the EC 3901 * reboots, the host will reboot too, so there is no response to this command. 3902 * 3903 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 3904 */ 3905 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 3906 3907 /* 3908 * Resend last response (not supported on LPC). 3909 * 3910 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 3911 * there was no previous command, or the previous command's response was too 3912 * big to save. 3913 */ 3914 #define EC_CMD_RESEND_RESPONSE 0x00DB 3915 3916 /* 3917 * This header byte on a command indicate version 0. Any header byte less 3918 * than this means that we are talking to an old EC which doesn't support 3919 * versioning. In that case, we assume version 0. 3920 * 3921 * Header bytes greater than this indicate a later version. For example, 3922 * EC_CMD_VERSION0 + 1 means we are using version 1. 3923 * 3924 * The old EC interface must not use commands 0xdc or higher. 3925 */ 3926 #define EC_CMD_VERSION0 0x00DC 3927 3928 /*****************************************************************************/ 3929 /* 3930 * PD commands 3931 * 3932 * These commands are for PD MCU communication. 3933 */ 3934 3935 /* EC to PD MCU exchange status command */ 3936 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 3937 #define EC_VER_PD_EXCHANGE_STATUS 2 3938 3939 enum pd_charge_state { 3940 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 3941 PD_CHARGE_NONE, /* No charging allowed */ 3942 PD_CHARGE_5V, /* 5V charging only */ 3943 PD_CHARGE_MAX /* Charge at max voltage */ 3944 }; 3945 3946 /* Status of EC being sent to PD */ 3947 #define EC_STATUS_HIBERNATING (1 << 0) 3948 3949 struct __ec_align1 ec_params_pd_status { 3950 uint8_t status; /* EC status */ 3951 int8_t batt_soc; /* battery state of charge */ 3952 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 3953 }; 3954 3955 /* Status of PD being sent back to EC */ 3956 #define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */ 3957 #define PD_STATUS_IN_RW (1 << 1) /* Running RW image */ 3958 #define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */ 3959 #define PD_STATUS_TCPC_ALERT_0 (1 << 3) /* Alert active in port 0 TCPC */ 3960 #define PD_STATUS_TCPC_ALERT_1 (1 << 4) /* Alert active in port 1 TCPC */ 3961 #define PD_STATUS_TCPC_ALERT_2 (1 << 5) /* Alert active in port 2 TCPC */ 3962 #define PD_STATUS_TCPC_ALERT_3 (1 << 6) /* Alert active in port 3 TCPC */ 3963 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 3964 PD_STATUS_TCPC_ALERT_1 | \ 3965 PD_STATUS_HOST_EVENT) 3966 struct __ec_align_size1 ec_response_pd_status { 3967 uint32_t curr_lim_ma; /* input current limit */ 3968 uint16_t status; /* PD MCU status */ 3969 int8_t active_charge_port; /* active charging port */ 3970 }; 3971 3972 /* AP to PD MCU host event status command, cleared on read */ 3973 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 3974 3975 /* PD MCU host event status bits */ 3976 #define PD_EVENT_UPDATE_DEVICE (1 << 0) 3977 #define PD_EVENT_POWER_CHANGE (1 << 1) 3978 #define PD_EVENT_IDENTITY_RECEIVED (1 << 2) 3979 #define PD_EVENT_DATA_SWAP (1 << 3) 3980 struct __ec_align4 ec_response_host_event_status { 3981 uint32_t status; /* PD MCU host event status */ 3982 }; 3983 3984 /* Set USB type-C port role and muxes */ 3985 #define EC_CMD_USB_PD_CONTROL 0x0101 3986 3987 enum usb_pd_control_role { 3988 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 3989 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 3990 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 3991 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 3992 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 3993 USB_PD_CTRL_ROLE_COUNT 3994 }; 3995 3996 enum usb_pd_control_mux { 3997 USB_PD_CTRL_MUX_NO_CHANGE = 0, 3998 USB_PD_CTRL_MUX_NONE = 1, 3999 USB_PD_CTRL_MUX_USB = 2, 4000 USB_PD_CTRL_MUX_DP = 3, 4001 USB_PD_CTRL_MUX_DOCK = 4, 4002 USB_PD_CTRL_MUX_AUTO = 5, 4003 USB_PD_CTRL_MUX_COUNT 4004 }; 4005 4006 enum usb_pd_control_swap { 4007 USB_PD_CTRL_SWAP_NONE = 0, 4008 USB_PD_CTRL_SWAP_DATA = 1, 4009 USB_PD_CTRL_SWAP_POWER = 2, 4010 USB_PD_CTRL_SWAP_VCONN = 3, 4011 USB_PD_CTRL_SWAP_COUNT 4012 }; 4013 4014 struct __ec_align1 ec_params_usb_pd_control { 4015 uint8_t port; 4016 uint8_t role; 4017 uint8_t mux; 4018 uint8_t swap; 4019 }; 4020 4021 #define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ 4022 #define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ 4023 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ 4024 4025 #define PD_CTRL_RESP_ROLE_POWER (1 << 0) /* 0=SNK/1=SRC */ 4026 #define PD_CTRL_RESP_ROLE_DATA (1 << 1) /* 0=UFP/1=DFP */ 4027 #define PD_CTRL_RESP_ROLE_VCONN (1 << 2) /* Vconn status */ 4028 #define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3) /* Partner is dualrole power */ 4029 #define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4) /* Partner is dualrole data */ 4030 #define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5) /* Partner USB comm capable */ 4031 #define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6) /* Partner externally powerd */ 4032 4033 struct __ec_align1 ec_response_usb_pd_control { 4034 uint8_t enabled; 4035 uint8_t role; 4036 uint8_t polarity; 4037 uint8_t state; 4038 }; 4039 4040 struct __ec_align1 ec_response_usb_pd_control_v1 { 4041 uint8_t enabled; 4042 uint8_t role; 4043 uint8_t polarity; 4044 char state[32]; 4045 }; 4046 4047 #define EC_CMD_USB_PD_PORTS 0x0102 4048 4049 /* Maximum number of PD ports on a device, num_ports will be <= this */ 4050 #define EC_USB_PD_MAX_PORTS 8 4051 4052 struct __ec_align1 ec_response_usb_pd_ports { 4053 uint8_t num_ports; 4054 }; 4055 4056 #define EC_CMD_USB_PD_POWER_INFO 0x0103 4057 4058 #define PD_POWER_CHARGING_PORT 0xff 4059 struct __ec_align1 ec_params_usb_pd_power_info { 4060 uint8_t port; 4061 }; 4062 4063 enum usb_chg_type { 4064 USB_CHG_TYPE_NONE, 4065 USB_CHG_TYPE_PD, 4066 USB_CHG_TYPE_C, 4067 USB_CHG_TYPE_PROPRIETARY, 4068 USB_CHG_TYPE_BC12_DCP, 4069 USB_CHG_TYPE_BC12_CDP, 4070 USB_CHG_TYPE_BC12_SDP, 4071 USB_CHG_TYPE_OTHER, 4072 USB_CHG_TYPE_VBUS, 4073 USB_CHG_TYPE_UNKNOWN, 4074 }; 4075 enum usb_power_roles { 4076 USB_PD_PORT_POWER_DISCONNECTED, 4077 USB_PD_PORT_POWER_SOURCE, 4078 USB_PD_PORT_POWER_SINK, 4079 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 4080 }; 4081 4082 struct __ec_align2 usb_chg_measures { 4083 uint16_t voltage_max; 4084 uint16_t voltage_now; 4085 uint16_t current_max; 4086 uint16_t current_lim; 4087 }; 4088 4089 struct __ec_align4 ec_response_usb_pd_power_info { 4090 uint8_t role; 4091 uint8_t type; 4092 uint8_t dualrole; 4093 uint8_t reserved1; 4094 struct usb_chg_measures meas; 4095 uint32_t max_power; 4096 }; 4097 4098 /* Write USB-PD device FW */ 4099 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 4100 4101 enum usb_pd_fw_update_cmds { 4102 USB_PD_FW_REBOOT, 4103 USB_PD_FW_FLASH_ERASE, 4104 USB_PD_FW_FLASH_WRITE, 4105 USB_PD_FW_ERASE_SIG, 4106 }; 4107 4108 struct __ec_align4 ec_params_usb_pd_fw_update { 4109 uint16_t dev_id; 4110 uint8_t cmd; 4111 uint8_t port; 4112 uint32_t size; /* Size to write in bytes */ 4113 /* Followed by data to write */ 4114 }; 4115 4116 /* Write USB-PD Accessory RW_HASH table entry */ 4117 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 4118 /* RW hash is first 20 bytes of SHA-256 of RW section */ 4119 #define PD_RW_HASH_SIZE 20 4120 struct __ec_align1 ec_params_usb_pd_rw_hash_entry { 4121 uint16_t dev_id; 4122 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 4123 uint8_t reserved; /* For alignment of current_image 4124 * TODO(rspangler) but it's not aligned! 4125 * Should have been reserved[2]. */ 4126 uint32_t current_image; /* One of ec_current_image */ 4127 }; 4128 4129 /* Read USB-PD Accessory info */ 4130 #define EC_CMD_USB_PD_DEV_INFO 0x0112 4131 4132 struct __ec_align1 ec_params_usb_pd_info_request { 4133 uint8_t port; 4134 }; 4135 4136 /* Read USB-PD Device discovery info */ 4137 #define EC_CMD_USB_PD_DISCOVERY 0x0113 4138 struct __ec_align_size1 ec_params_usb_pd_discovery_entry { 4139 uint16_t vid; /* USB-IF VID */ 4140 uint16_t pid; /* USB-IF PID */ 4141 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 4142 }; 4143 4144 /* Override default charge behavior */ 4145 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 4146 4147 /* Negative port parameters have special meaning */ 4148 enum usb_pd_override_ports { 4149 OVERRIDE_DONT_CHARGE = -2, 4150 OVERRIDE_OFF = -1, 4151 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 4152 }; 4153 4154 struct __ec_align2 ec_params_charge_port_override { 4155 int16_t override_port; /* Override port# */ 4156 }; 4157 4158 /* Read (and delete) one entry of PD event log */ 4159 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 4160 4161 struct __ec_align4 ec_response_pd_log { 4162 uint32_t timestamp; /* relative timestamp in milliseconds */ 4163 uint8_t type; /* event type : see PD_EVENT_xx below */ 4164 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 4165 uint16_t data; /* type-defined data payload */ 4166 uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ 4167 }; 4168 4169 4170 /* The timestamp is the microsecond counter shifted to get about a ms. */ 4171 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 4172 4173 #define PD_LOG_SIZE_MASK 0x1f 4174 #define PD_LOG_PORT_MASK 0xe0 4175 #define PD_LOG_PORT_SHIFT 5 4176 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 4177 ((size) & PD_LOG_SIZE_MASK)) 4178 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 4179 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 4180 4181 /* PD event log : entry types */ 4182 /* PD MCU events */ 4183 #define PD_EVENT_MCU_BASE 0x00 4184 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 4185 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 4186 /* Reserved for custom board event */ 4187 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 4188 /* PD generic accessory events */ 4189 #define PD_EVENT_ACC_BASE 0x20 4190 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 4191 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 4192 /* PD power supply events */ 4193 #define PD_EVENT_PS_BASE 0x40 4194 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 4195 /* PD video dongles events */ 4196 #define PD_EVENT_VIDEO_BASE 0x60 4197 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 4198 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 4199 /* Returned in the "type" field, when there is no entry available */ 4200 #define PD_EVENT_NO_ENTRY 0xff 4201 4202 /* 4203 * PD_EVENT_MCU_CHARGE event definition : 4204 * the payload is "struct usb_chg_measures" 4205 * the data field contains the port state flags as defined below : 4206 */ 4207 /* Port partner is a dual role device */ 4208 #define CHARGE_FLAGS_DUAL_ROLE (1 << 15) 4209 /* Port is the pending override port */ 4210 #define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14) 4211 /* Port is the override port */ 4212 #define CHARGE_FLAGS_OVERRIDE (1 << 13) 4213 /* Charger type */ 4214 #define CHARGE_FLAGS_TYPE_SHIFT 3 4215 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 4216 /* Power delivery role */ 4217 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 4218 4219 /* 4220 * PD_EVENT_PS_FAULT data field flags definition : 4221 */ 4222 #define PS_FAULT_OCP 1 4223 #define PS_FAULT_FAST_OCP 2 4224 #define PS_FAULT_OVP 3 4225 #define PS_FAULT_DISCH 4 4226 4227 /* 4228 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 4229 */ 4230 struct __ec_align4 mcdp_version { 4231 uint8_t major; 4232 uint8_t minor; 4233 uint16_t build; 4234 }; 4235 4236 struct __ec_align4 mcdp_info { 4237 uint8_t family[2]; 4238 uint8_t chipid[2]; 4239 struct mcdp_version irom; 4240 struct mcdp_version fw; 4241 }; 4242 4243 /* struct mcdp_info field decoding */ 4244 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 4245 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 4246 4247 /* Get/Set USB-PD Alternate mode info */ 4248 #define EC_CMD_USB_PD_GET_AMODE 0x0116 4249 struct __ec_align_size1 ec_params_usb_pd_get_mode_request { 4250 uint16_t svid_idx; /* SVID index to get */ 4251 uint8_t port; /* port */ 4252 }; 4253 4254 struct __ec_align4 ec_params_usb_pd_get_mode_response { 4255 uint16_t svid; /* SVID */ 4256 uint16_t opos; /* Object Position */ 4257 uint32_t vdo[6]; /* Mode VDOs */ 4258 }; 4259 4260 #define EC_CMD_USB_PD_SET_AMODE 0x0117 4261 4262 enum pd_mode_cmd { 4263 PD_EXIT_MODE = 0, 4264 PD_ENTER_MODE = 1, 4265 /* Not a command. Do NOT remove. */ 4266 PD_MODE_CMD_COUNT, 4267 }; 4268 4269 struct __ec_align4 ec_params_usb_pd_set_mode_request { 4270 uint32_t cmd; /* enum pd_mode_cmd */ 4271 uint16_t svid; /* SVID to set */ 4272 uint8_t opos; /* Object Position */ 4273 uint8_t port; /* port */ 4274 }; 4275 4276 /* Ask the PD MCU to record a log of a requested type */ 4277 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 4278 4279 struct __ec_align1 ec_params_pd_write_log_entry { 4280 uint8_t type; /* event type : see PD_EVENT_xx above */ 4281 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 4282 }; 4283 4284 4285 /* Control USB-PD chip */ 4286 #define EC_CMD_PD_CONTROL 0x0119 4287 4288 enum ec_pd_control_cmd { 4289 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 4290 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 4291 PD_RESET, /* Force reset the PD chip */ 4292 PD_CONTROL_DISABLE /* Disable further calls to this command */ 4293 }; 4294 4295 struct __ec_align1 ec_params_pd_control { 4296 uint8_t chip; /* chip id (should be 0) */ 4297 uint8_t subcmd; 4298 }; 4299 4300 /* Get info about USB-C SS muxes */ 4301 #define EC_CMD_USB_PD_MUX_INFO 0x011A 4302 4303 struct __ec_align1 ec_params_usb_pd_mux_info { 4304 uint8_t port; /* USB-C port number */ 4305 }; 4306 4307 /* Flags representing mux state */ 4308 #define USB_PD_MUX_USB_ENABLED (1 << 0) 4309 #define USB_PD_MUX_DP_ENABLED (1 << 1) 4310 #define USB_PD_MUX_POLARITY_INVERTED (1 << 2) 4311 #define USB_PD_MUX_HPD_IRQ (1 << 3) 4312 4313 struct __ec_align1 ec_response_usb_pd_mux_info { 4314 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 4315 }; 4316 4317 #define EC_CMD_PD_CHIP_INFO 0x011B 4318 4319 struct __ec_align1 ec_params_pd_chip_info { 4320 uint8_t port; /* USB-C port number */ 4321 uint8_t renew; /* Force renewal */ 4322 }; 4323 4324 struct __ec_align2 ec_response_pd_chip_info { 4325 uint16_t vendor_id; 4326 uint16_t product_id; 4327 uint16_t device_id; 4328 union { 4329 uint8_t fw_version_string[8]; 4330 uint64_t fw_version_number; 4331 }; 4332 }; 4333 4334 /* Run RW signature verification and get status */ 4335 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 4336 4337 struct __ec_align4 ec_response_rwsig_check_status { 4338 uint32_t status; 4339 }; 4340 4341 /* For controlling RWSIG task */ 4342 #define EC_CMD_RWSIG_ACTION 0x011D 4343 4344 enum rwsig_action { 4345 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 4346 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 4347 }; 4348 4349 struct __ec_align4 ec_params_rwsig_action { 4350 uint32_t action; 4351 }; 4352 4353 /* Run verification on a slot */ 4354 #define EC_CMD_EFS_VERIFY 0x011E 4355 4356 struct __ec_align1 ec_params_efs_verify { 4357 uint8_t region; /* enum ec_flash_region */ 4358 }; 4359 4360 /* 4361 * Retrieve info from Cros Board Info store. Response is based on the data 4362 * type. Integers return a uint32. Strings return a string, using the response 4363 * size to determine how big it is. 4364 */ 4365 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 4366 /* 4367 * Write info into Cros Board Info on EEPROM. Write fails if the board has 4368 * hardware write-protect enabled. 4369 */ 4370 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 4371 4372 enum cbi_data_tag { 4373 CBI_TAG_BOARD_VERSION = 0, /* uint16_t or uint8_t[] = {minor,major} */ 4374 CBI_TAG_OEM_ID = 1, /* uint8_t */ 4375 CBI_TAG_SKU_ID = 2, /* uint8_t */ 4376 CBI_TAG_COUNT, 4377 }; 4378 4379 /* 4380 * Flags to control read operation 4381 * 4382 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 4383 * write was successful without reboot. 4384 */ 4385 #define CBI_GET_RELOAD (1 << 0) 4386 4387 struct __ec_align4 ec_params_get_cbi { 4388 uint32_t type; /* enum cbi_data_tag */ 4389 uint32_t flag; /* CBI_GET_* */ 4390 }; 4391 4392 /* 4393 * Flags to control write behavior. 4394 * 4395 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 4396 * useful when writing multiple fields in a row. 4397 * INIT: Needs to be set when creating a new CBI from scratch. All fields 4398 * will be initialized to zero first. 4399 */ 4400 #define CBI_SET_NO_SYNC (1 << 0) 4401 #define CBI_SET_INIT (1 << 1) 4402 4403 struct __ec_align1 ec_params_set_cbi { 4404 uint32_t tag; /* enum cbi_data_tag */ 4405 uint32_t flag; /* CBI_SET_* */ 4406 uint32_t size; /* Data size */ 4407 uint8_t data[]; /* For string and raw data */ 4408 }; 4409 4410 /*****************************************************************************/ 4411 /* The command range 0x200-0x2FF is reserved for Rotor. */ 4412 4413 /*****************************************************************************/ 4414 /* 4415 * Reserve a range of host commands for the CR51 firmware. 4416 */ 4417 #define EC_CMD_CR51_BASE 0x0300 4418 #define EC_CMD_CR51_LAST 0x03FF 4419 4420 /*****************************************************************************/ 4421 /* Fingerprint MCU commands: range 0x0400-0x040x */ 4422 4423 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 4424 #define EC_CMD_FP_PASSTHRU 0x0400 4425 4426 #define EC_FP_FLAG_NOT_COMPLETE 0x1 4427 4428 struct __ec_align2 ec_params_fp_passthru { 4429 uint16_t len; /* Number of bytes to write then read */ 4430 uint16_t flags; /* EC_FP_FLAG_xxx */ 4431 uint8_t data[]; /* Data to send */ 4432 }; 4433 4434 /* Fingerprint sensor configuration command: prototyping ONLY */ 4435 #define EC_CMD_FP_SENSOR_CONFIG 0x0401 4436 4437 #define EC_FP_SENSOR_CONFIG_MAX_REGS 16 4438 4439 struct __ec_align2 ec_params_fp_sensor_config { 4440 uint8_t count; /* Number of setup registers */ 4441 /* 4442 * the value to send to each of the 'count' setup registers 4443 * is stored in the 'data' array for 'len' bytes just after 4444 * the previous one. 4445 */ 4446 uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS]; 4447 uint8_t data[]; 4448 }; 4449 4450 /* Configure the Fingerprint MCU behavior */ 4451 #define EC_CMD_FP_MODE 0x0402 4452 4453 /* Put the sensor in its lowest power mode */ 4454 #define FP_MODE_DEEPSLEEP (1<<0) 4455 /* Wait to see a finger on the sensor */ 4456 #define FP_MODE_FINGER_DOWN (1<<1) 4457 /* Poll until the finger has left the sensor */ 4458 #define FP_MODE_FINGER_UP (1<<2) 4459 /* Capture the current finger image */ 4460 #define FP_MODE_CAPTURE (1<<3) 4461 /* special value: don't change anything just read back current mode */ 4462 #define FP_MODE_DONT_CHANGE (1<<31) 4463 4464 struct __ec_align4 ec_params_fp_mode { 4465 uint32_t mode; /* as defined by FP_MODE_ constants */ 4466 /* TBD */ 4467 }; 4468 4469 struct __ec_align4 ec_response_fp_mode { 4470 uint32_t mode; /* as defined by FP_MODE_ constants */ 4471 /* TBD */ 4472 }; 4473 4474 /* Retrieve Fingerprint sensor information */ 4475 #define EC_CMD_FP_INFO 0x0403 4476 4477 struct __ec_align2 ec_response_fp_info { 4478 /* Sensor identification */ 4479 uint32_t vendor_id; 4480 uint32_t product_id; 4481 uint32_t model_id; 4482 uint32_t version; 4483 /* Image frame characteristics */ 4484 uint32_t frame_size; 4485 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 4486 uint16_t width; 4487 uint16_t height; 4488 uint16_t bpp; 4489 }; 4490 4491 /* Get the last captured finger frame: TODO: will be AES-encrypted */ 4492 #define EC_CMD_FP_FRAME 0x0404 4493 4494 struct __ec_align4 ec_params_fp_frame { 4495 uint32_t offset; 4496 uint32_t size; 4497 }; 4498 4499 /*****************************************************************************/ 4500 /* Touchpad MCU commands: range 0x0500-0x05FF */ 4501 4502 /* Perform touchpad self test */ 4503 #define EC_CMD_TP_SELF_TEST 0x0500 4504 4505 /* Get number of frame types, and the size of each type */ 4506 #define EC_CMD_TP_FRAME_INFO 0x0501 4507 4508 struct __ec_align4 ec_response_tp_frame_info { 4509 uint32_t n_frames; 4510 uint32_t frame_sizes[0]; 4511 }; 4512 4513 /* Create a snapshot of current frame readings */ 4514 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 4515 4516 /* Read the frame */ 4517 #define EC_CMD_TP_FRAME_GET 0x0503 4518 4519 struct __ec_align4 ec_params_tp_frame_get { 4520 uint32_t frame_index; 4521 uint32_t offset; 4522 uint32_t size; 4523 }; 4524 4525 /*****************************************************************************/ 4526 /* 4527 * Reserve a range of host commands for board-specific, experimental, or 4528 * special purpose features. These can be (re)used without updating this file. 4529 * 4530 * CAUTION: Don't go nuts with this. Shipping products should document ALL 4531 * their EC commands for easier development, testing, debugging, and support. 4532 * 4533 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 4534 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 4535 * 4536 * In your experimental code, you may want to do something like this: 4537 * 4538 * #define EC_CMD_MAGIC_FOO 0x0000 4539 * #define EC_CMD_MAGIC_BAR 0x0001 4540 * #define EC_CMD_MAGIC_HEY 0x0002 4541 * 4542 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 4543 * EC_VER_MASK(0); 4544 * 4545 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 4546 * EC_VER_MASK(0); 4547 * 4548 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 4549 * EC_VER_MASK(0); 4550 */ 4551 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 4552 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 4553 4554 /* 4555 * Given the private host command offset, calculate the true private host 4556 * command value. 4557 */ 4558 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 4559 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 4560 4561 /*****************************************************************************/ 4562 /* 4563 * Passthru commands 4564 * 4565 * Some platforms have sub-processors chained to each other. For example. 4566 * 4567 * AP <--> EC <--> PD MCU 4568 * 4569 * The top 2 bits of the command number are used to indicate which device the 4570 * command is intended for. Device 0 is always the device receiving the 4571 * command; other device mapping is board-specific. 4572 * 4573 * When a device receives a command to be passed to a sub-processor, it passes 4574 * it on with the device number set back to 0. This allows the sub-processor 4575 * to remain blissfully unaware of whether the command originated on the next 4576 * device up the chain, or was passed through from the AP. 4577 * 4578 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 4579 * AP sends command 0x4002 to the EC 4580 * EC sends command 0x0002 to the PD MCU 4581 * EC forwards PD MCU response back to the AP 4582 */ 4583 4584 /* Offset and max command number for sub-device n */ 4585 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 4586 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 4587 4588 /*****************************************************************************/ 4589 /* 4590 * Deprecated constants. These constants have been renamed for clarity. The 4591 * meaning and size has not changed. Programs that use the old names should 4592 * switch to the new names soon, as the old names may not be carried forward 4593 * forever. 4594 */ 4595 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 4596 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 4597 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 4598 4599 #endif /* !__ACPI__ && !__KERNEL__ */ 4600 4601 #endif /* __CROS_EC_COMMANDS_H */ 4602