1 /* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. 2 * Use of this source code is governed by a BSD-style license that can be 3 * found in the LICENSE file. 4 */ 5 6 /* Host communication command constants for Chrome EC */ 7 8 #ifndef __CROS_EC_COMMANDS_H 9 #define __CROS_EC_COMMANDS_H 10 11 /* 12 * Protocol overview 13 * 14 * request: CMD [ P0 P1 P2 ... Pn S ] 15 * response: ERR [ P0 P1 P2 ... Pn S ] 16 * 17 * where the bytes are defined as follow : 18 * - CMD is the command code. (defined by EC_CMD_ constants) 19 * - ERR is the error code. (defined by EC_RES_ constants) 20 * - Px is the optional payload. 21 * it is not sent if the error code is not success. 22 * (defined by ec_params_ and ec_response_ structures) 23 * - S is the checksum which is the sum of all payload bytes. 24 * 25 * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD 26 * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM. 27 * On I2C, all bytes are sent serially in the same message. 28 */ 29 30 /* Current version of this protocol */ 31 #define EC_PROTO_VERSION 0x00000002 32 33 /* Command version mask */ 34 #define EC_VER_MASK(version) (1UL << (version)) 35 36 /* I/O addresses for ACPI commands */ 37 #define EC_LPC_ADDR_ACPI_DATA 0x62 38 #define EC_LPC_ADDR_ACPI_CMD 0x66 39 40 /* I/O addresses for host command */ 41 #define EC_LPC_ADDR_HOST_DATA 0x200 42 #define EC_LPC_ADDR_HOST_CMD 0x204 43 44 /* I/O addresses for host command args and params */ 45 #define EC_LPC_ADDR_HOST_ARGS 0x800 46 #define EC_LPC_ADDR_HOST_PARAM 0x804 47 #define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */ 48 49 /* I/O addresses for host command params, old interface */ 50 #define EC_LPC_ADDR_OLD_PARAM 0x880 51 #define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */ 52 53 /* EC command register bit functions */ 54 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ 55 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ 56 #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ 57 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ 58 #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ 59 #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ 60 #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ 61 62 #define EC_LPC_ADDR_MEMMAP 0x900 63 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 64 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 65 66 /* The offset address of each type of data in mapped memory. */ 67 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */ 68 #define EC_MEMMAP_FAN 0x10 /* Fan speeds */ 69 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */ 70 #define EC_MEMMAP_ID 0x20 /* 'E' 'C' */ 71 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 72 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 73 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 74 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 75 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 76 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */ 77 #define EC_MEMMAP_SWITCHES 0x30 78 #define EC_MEMMAP_HOST_EVENTS 0x34 79 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 80 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 81 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 82 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ 83 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 84 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 85 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 86 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 87 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 88 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 89 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 90 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 91 92 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 93 #define EC_TEMP_SENSOR_ENTRIES 16 94 /* 95 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 96 * 97 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 98 */ 99 #define EC_TEMP_SENSOR_B_ENTRIES 8 100 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 101 #define EC_TEMP_SENSOR_ERROR 0xfe 102 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 103 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 104 /* 105 * The offset of temperature value stored in mapped memory. This allows 106 * reporting a temperature range of 200K to 454K = -73C to 181C. 107 */ 108 #define EC_TEMP_SENSOR_OFFSET 200 109 110 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 111 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 112 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 113 114 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 115 #define EC_BATT_FLAG_AC_PRESENT 0x01 116 #define EC_BATT_FLAG_BATT_PRESENT 0x02 117 #define EC_BATT_FLAG_DISCHARGING 0x04 118 #define EC_BATT_FLAG_CHARGING 0x08 119 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 120 121 /* Switch flags at EC_MEMMAP_SWITCHES */ 122 #define EC_SWITCH_LID_OPEN 0x01 123 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 124 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 125 /* Recovery requested via keyboard */ 126 #define EC_SWITCH_KEYBOARD_RECOVERY 0x08 127 /* Recovery requested via dedicated signal (from servo board) */ 128 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 129 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 130 #define EC_SWITCH_IGNORE0 0x20 131 132 /* Host command interface flags */ 133 /* Host command interface supports LPC args (LPC interface only) */ 134 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 135 136 /* Wireless switch flags */ 137 #define EC_WIRELESS_SWITCH_WLAN 0x01 138 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 139 140 /* 141 * This header file is used in coreboot both in C and ACPI code. The ACPI code 142 * is pre-processed to handle constants but the ASL compiler is unable to 143 * handle actual C code so keep it separate. 144 */ 145 #ifndef __ACPI__ 146 147 /* 148 * Define __packed if someone hasn't beat us to it. Linux kernel style 149 * checking prefers __packed over __attribute__((packed)). 150 */ 151 #ifndef __packed 152 #define __packed __attribute__((packed)) 153 #endif 154 155 /* LPC command status byte masks */ 156 /* EC has written a byte in the data register and host hasn't read it yet */ 157 #define EC_LPC_STATUS_TO_HOST 0x01 158 /* Host has written a command/data byte and the EC hasn't read it yet */ 159 #define EC_LPC_STATUS_FROM_HOST 0x02 160 /* EC is processing a command */ 161 #define EC_LPC_STATUS_PROCESSING 0x04 162 /* Last write to EC was a command, not data */ 163 #define EC_LPC_STATUS_LAST_CMD 0x08 164 /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ 165 #define EC_LPC_STATUS_BURST_MODE 0x10 166 /* SCI event is pending (requesting SCI query) */ 167 #define EC_LPC_STATUS_SCI_PENDING 0x20 168 /* SMI event is pending (requesting SMI query) */ 169 #define EC_LPC_STATUS_SMI_PENDING 0x40 170 /* (reserved) */ 171 #define EC_LPC_STATUS_RESERVED 0x80 172 173 /* 174 * EC is busy. This covers both the EC processing a command, and the host has 175 * written a new command but the EC hasn't picked it up yet. 176 */ 177 #define EC_LPC_STATUS_BUSY_MASK \ 178 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 179 180 /* Host command response codes */ 181 enum ec_status { 182 EC_RES_SUCCESS = 0, 183 EC_RES_INVALID_COMMAND = 1, 184 EC_RES_ERROR = 2, 185 EC_RES_INVALID_PARAM = 3, 186 EC_RES_ACCESS_DENIED = 4, 187 EC_RES_INVALID_RESPONSE = 5, 188 EC_RES_INVALID_VERSION = 6, 189 EC_RES_INVALID_CHECKSUM = 7, 190 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 191 EC_RES_UNAVAILABLE = 9, /* No response available */ 192 EC_RES_TIMEOUT = 10, /* We got a timeout */ 193 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 194 }; 195 196 /* 197 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 198 * EC command uses code 0 to mean "no event pending". We explicitly specify 199 * each value in the enum listing so they won't change if we delete/insert an 200 * item or rearrange the list (it needs to be stable across platforms, not 201 * just within a single compiled instance). 202 */ 203 enum host_event_code { 204 EC_HOST_EVENT_LID_CLOSED = 1, 205 EC_HOST_EVENT_LID_OPEN = 2, 206 EC_HOST_EVENT_POWER_BUTTON = 3, 207 EC_HOST_EVENT_AC_CONNECTED = 4, 208 EC_HOST_EVENT_AC_DISCONNECTED = 5, 209 EC_HOST_EVENT_BATTERY_LOW = 6, 210 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 211 EC_HOST_EVENT_BATTERY = 8, 212 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 213 EC_HOST_EVENT_THERMAL_OVERLOAD = 10, 214 EC_HOST_EVENT_THERMAL = 11, 215 EC_HOST_EVENT_USB_CHARGER = 12, 216 EC_HOST_EVENT_KEY_PRESSED = 13, 217 /* 218 * EC has finished initializing the host interface. The host can check 219 * for this event following sending a EC_CMD_REBOOT_EC command to 220 * determine when the EC is ready to accept subsequent commands. 221 */ 222 EC_HOST_EVENT_INTERFACE_READY = 14, 223 /* Keyboard recovery combo has been pressed */ 224 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 225 226 /* Shutdown due to thermal overload */ 227 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 228 /* Shutdown due to battery level too low */ 229 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 230 231 /* 232 * The high bit of the event mask is not used as a host event code. If 233 * it reads back as set, then the entire event mask should be 234 * considered invalid by the host. This can happen when reading the 235 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 236 * not initialized on the EC, or improperly configured on the host. 237 */ 238 EC_HOST_EVENT_INVALID = 32 239 }; 240 /* Host event mask */ 241 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) 242 243 /* Arguments at EC_LPC_ADDR_HOST_ARGS */ 244 struct ec_lpc_host_args { 245 uint8_t flags; 246 uint8_t command_version; 247 uint8_t data_size; 248 /* 249 * Checksum; sum of command + flags + command_version + data_size + 250 * all params/response data bytes. 251 */ 252 uint8_t checksum; 253 } __packed; 254 255 /* Flags for ec_lpc_host_args.flags */ 256 /* 257 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 258 * params. 259 * 260 * If EC gets a command and this flag is not set, this is an old-style command. 261 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 262 * unknown length. EC must respond with an old-style response (that is, 263 * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). 264 */ 265 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 266 /* 267 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 268 * 269 * If EC responds to a command and this flag is not set, this is an old-style 270 * response. Command version is 0 and response data from EC is at 271 * EC_LPC_ADDR_OLD_PARAM with unknown length. 272 */ 273 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 274 275 /* 276 * Notes on commands: 277 * 278 * Each command is an 8-byte command value. Commands which take params or 279 * return response data specify structs for that data. If no struct is 280 * specified, the command does not input or output data, respectively. 281 * Parameter/response length is implicit in the structs. Some underlying 282 * communication protocols (I2C, SPI) may add length or checksum headers, but 283 * those are implementation-dependent and not defined here. 284 */ 285 286 /*****************************************************************************/ 287 /* General / test commands */ 288 289 /* 290 * Get protocol version, used to deal with non-backward compatible protocol 291 * changes. 292 */ 293 #define EC_CMD_PROTO_VERSION 0x00 294 295 struct ec_response_proto_version { 296 uint32_t version; 297 } __packed; 298 299 /* 300 * Hello. This is a simple command to test the EC is responsive to 301 * commands. 302 */ 303 #define EC_CMD_HELLO 0x01 304 305 struct ec_params_hello { 306 uint32_t in_data; /* Pass anything here */ 307 } __packed; 308 309 struct ec_response_hello { 310 uint32_t out_data; /* Output will be in_data + 0x01020304 */ 311 } __packed; 312 313 /* Get version number */ 314 #define EC_CMD_GET_VERSION 0x02 315 316 enum ec_current_image { 317 EC_IMAGE_UNKNOWN = 0, 318 EC_IMAGE_RO, 319 EC_IMAGE_RW 320 }; 321 322 struct ec_response_get_version { 323 /* Null-terminated version strings for RO, RW */ 324 char version_string_ro[32]; 325 char version_string_rw[32]; 326 char reserved[32]; /* Was previously RW-B string */ 327 uint32_t current_image; /* One of ec_current_image */ 328 } __packed; 329 330 /* Read test */ 331 #define EC_CMD_READ_TEST 0x03 332 333 struct ec_params_read_test { 334 uint32_t offset; /* Starting value for read buffer */ 335 uint32_t size; /* Size to read in bytes */ 336 } __packed; 337 338 struct ec_response_read_test { 339 uint32_t data[32]; 340 } __packed; 341 342 /* 343 * Get build information 344 * 345 * Response is null-terminated string. 346 */ 347 #define EC_CMD_GET_BUILD_INFO 0x04 348 349 /* Get chip info */ 350 #define EC_CMD_GET_CHIP_INFO 0x05 351 352 struct ec_response_get_chip_info { 353 /* Null-terminated strings */ 354 char vendor[32]; 355 char name[32]; 356 char revision[32]; /* Mask version */ 357 } __packed; 358 359 /* Get board HW version */ 360 #define EC_CMD_GET_BOARD_VERSION 0x06 361 362 struct ec_response_board_version { 363 uint16_t board_version; /* A monotonously incrementing number. */ 364 } __packed; 365 366 /* 367 * Read memory-mapped data. 368 * 369 * This is an alternate interface to memory-mapped data for bus protocols 370 * which don't support direct-mapped memory - I2C, SPI, etc. 371 * 372 * Response is params.size bytes of data. 373 */ 374 #define EC_CMD_READ_MEMMAP 0x07 375 376 struct ec_params_read_memmap { 377 uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ 378 uint8_t size; /* Size to read in bytes */ 379 } __packed; 380 381 /* Read versions supported for a command */ 382 #define EC_CMD_GET_CMD_VERSIONS 0x08 383 384 struct ec_params_get_cmd_versions { 385 uint8_t cmd; /* Command to check */ 386 } __packed; 387 388 struct ec_response_get_cmd_versions { 389 /* 390 * Mask of supported versions; use EC_VER_MASK() to compare with a 391 * desired version. 392 */ 393 uint32_t version_mask; 394 } __packed; 395 396 /* 397 * Check EC communcations status (busy). This is needed on i2c/spi but not 398 * on lpc since it has its own out-of-band busy indicator. 399 * 400 * lpc must read the status from the command register. Attempting this on 401 * lpc will overwrite the args/parameter space and corrupt its data. 402 */ 403 #define EC_CMD_GET_COMMS_STATUS 0x09 404 405 /* Avoid using ec_status which is for return values */ 406 enum ec_comms_status { 407 EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ 408 }; 409 410 struct ec_response_get_comms_status { 411 uint32_t flags; /* Mask of enum ec_comms_status */ 412 } __packed; 413 414 415 /*****************************************************************************/ 416 /* Flash commands */ 417 418 /* Get flash info */ 419 #define EC_CMD_FLASH_INFO 0x10 420 421 struct ec_response_flash_info { 422 /* Usable flash size, in bytes */ 423 uint32_t flash_size; 424 /* 425 * Write block size. Write offset and size must be a multiple 426 * of this. 427 */ 428 uint32_t write_block_size; 429 /* 430 * Erase block size. Erase offset and size must be a multiple 431 * of this. 432 */ 433 uint32_t erase_block_size; 434 /* 435 * Protection block size. Protection offset and size must be a 436 * multiple of this. 437 */ 438 uint32_t protect_block_size; 439 } __packed; 440 441 /* 442 * Read flash 443 * 444 * Response is params.size bytes of data. 445 */ 446 #define EC_CMD_FLASH_READ 0x11 447 448 struct ec_params_flash_read { 449 uint32_t offset; /* Byte offset to read */ 450 uint32_t size; /* Size to read in bytes */ 451 } __packed; 452 453 /* Write flash */ 454 #define EC_CMD_FLASH_WRITE 0x12 455 456 struct ec_params_flash_write { 457 uint32_t offset; /* Byte offset to write */ 458 uint32_t size; /* Size to write in bytes */ 459 /* 460 * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to 461 * use a power of 2 so writes stay aligned. 462 */ 463 uint8_t data[64]; 464 } __packed; 465 466 /* Erase flash */ 467 #define EC_CMD_FLASH_ERASE 0x13 468 469 struct ec_params_flash_erase { 470 uint32_t offset; /* Byte offset to erase */ 471 uint32_t size; /* Size to erase in bytes */ 472 } __packed; 473 474 /* 475 * Get/set flash protection. 476 * 477 * If mask!=0, sets/clear the requested bits of flags. Depending on the 478 * firmware write protect GPIO, not all flags will take effect immediately; 479 * some flags require a subsequent hard reset to take effect. Check the 480 * returned flags bits to see what actually happened. 481 * 482 * If mask=0, simply returns the current flags state. 483 */ 484 #define EC_CMD_FLASH_PROTECT 0x15 485 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 486 487 /* Flags for flash protection */ 488 /* RO flash code protected when the EC boots */ 489 #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) 490 /* 491 * RO flash code protected now. If this bit is set, at-boot status cannot 492 * be changed. 493 */ 494 #define EC_FLASH_PROTECT_RO_NOW (1 << 1) 495 /* Entire flash code protected now, until reboot. */ 496 #define EC_FLASH_PROTECT_ALL_NOW (1 << 2) 497 /* Flash write protect GPIO is asserted now */ 498 #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) 499 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 500 #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) 501 /* 502 * Error - flash protection is in inconsistent state. At least one bank of 503 * flash which should be protected is not protected. Usually fixed by 504 * re-requesting the desired flags, or by a hard reset if that fails. 505 */ 506 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) 507 /* Entile flash code protected when the EC boots */ 508 #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) 509 510 struct ec_params_flash_protect { 511 uint32_t mask; /* Bits in flags to apply */ 512 uint32_t flags; /* New flags to apply */ 513 } __packed; 514 515 struct ec_response_flash_protect { 516 /* Current value of flash protect flags */ 517 uint32_t flags; 518 /* 519 * Flags which are valid on this platform. This allows the caller 520 * to distinguish between flags which aren't set vs. flags which can't 521 * be set on this platform. 522 */ 523 uint32_t valid_flags; 524 /* Flags which can be changed given the current protection state */ 525 uint32_t writable_flags; 526 } __packed; 527 528 /* 529 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 530 * write protect. These commands may be reused with version > 0. 531 */ 532 533 /* Get the region offset/size */ 534 #define EC_CMD_FLASH_REGION_INFO 0x16 535 #define EC_VER_FLASH_REGION_INFO 1 536 537 enum ec_flash_region { 538 /* Region which holds read-only EC image */ 539 EC_FLASH_REGION_RO, 540 /* Region which holds rewritable EC image */ 541 EC_FLASH_REGION_RW, 542 /* 543 * Region which should be write-protected in the factory (a superset of 544 * EC_FLASH_REGION_RO) 545 */ 546 EC_FLASH_REGION_WP_RO, 547 }; 548 549 struct ec_params_flash_region_info { 550 uint32_t region; /* enum ec_flash_region */ 551 } __packed; 552 553 struct ec_response_flash_region_info { 554 uint32_t offset; 555 uint32_t size; 556 } __packed; 557 558 /* Read/write VbNvContext */ 559 #define EC_CMD_VBNV_CONTEXT 0x17 560 #define EC_VER_VBNV_CONTEXT 1 561 #define EC_VBNV_BLOCK_SIZE 16 562 563 enum ec_vbnvcontext_op { 564 EC_VBNV_CONTEXT_OP_READ, 565 EC_VBNV_CONTEXT_OP_WRITE, 566 }; 567 568 struct ec_params_vbnvcontext { 569 uint32_t op; 570 uint8_t block[EC_VBNV_BLOCK_SIZE]; 571 } __packed; 572 573 struct ec_response_vbnvcontext { 574 uint8_t block[EC_VBNV_BLOCK_SIZE]; 575 } __packed; 576 577 /*****************************************************************************/ 578 /* PWM commands */ 579 580 /* Get fan target RPM */ 581 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 582 583 struct ec_response_pwm_get_fan_rpm { 584 uint32_t rpm; 585 } __packed; 586 587 /* Set target fan RPM */ 588 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 589 590 struct ec_params_pwm_set_fan_target_rpm { 591 uint32_t rpm; 592 } __packed; 593 594 /* Get keyboard backlight */ 595 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 596 597 struct ec_response_pwm_get_keyboard_backlight { 598 uint8_t percent; 599 uint8_t enabled; 600 } __packed; 601 602 /* Set keyboard backlight */ 603 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 604 605 struct ec_params_pwm_set_keyboard_backlight { 606 uint8_t percent; 607 } __packed; 608 609 /* Set target fan PWM duty cycle */ 610 #define EC_CMD_PWM_SET_FAN_DUTY 0x24 611 612 struct ec_params_pwm_set_fan_duty { 613 uint32_t percent; 614 } __packed; 615 616 /*****************************************************************************/ 617 /* 618 * Lightbar commands. This looks worse than it is. Since we only use one HOST 619 * command to say "talk to the lightbar", we put the "and tell it to do X" part 620 * into a subcommand. We'll make separate structs for subcommands with 621 * different input args, so that we know how much to expect. 622 */ 623 #define EC_CMD_LIGHTBAR_CMD 0x28 624 625 struct rgb_s { 626 uint8_t r, g, b; 627 }; 628 629 #define LB_BATTERY_LEVELS 4 630 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a 631 * host command, but the alignment is the same regardless. Keep it that way. 632 */ 633 struct lightbar_params { 634 /* Timing */ 635 int google_ramp_up; 636 int google_ramp_down; 637 int s3s0_ramp_up; 638 int s0_tick_delay[2]; /* AC=0/1 */ 639 int s0a_tick_delay[2]; /* AC=0/1 */ 640 int s0s3_ramp_down; 641 int s3_sleep_for; 642 int s3_ramp_up; 643 int s3_ramp_down; 644 645 /* Oscillation */ 646 uint8_t new_s0; 647 uint8_t osc_min[2]; /* AC=0/1 */ 648 uint8_t osc_max[2]; /* AC=0/1 */ 649 uint8_t w_ofs[2]; /* AC=0/1 */ 650 651 /* Brightness limits based on the backlight and AC. */ 652 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 653 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 654 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 655 656 /* Battery level thresholds */ 657 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 658 659 /* Map [AC][battery_level] to color index */ 660 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 661 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 662 663 /* Color palette */ 664 struct rgb_s color[8]; /* 0-3 are Google colors */ 665 } __packed; 666 667 struct ec_params_lightbar { 668 uint8_t cmd; /* Command (see enum lightbar_command) */ 669 union { 670 struct { 671 /* no args */ 672 } dump, off, on, init, get_seq, get_params; 673 674 struct num { 675 uint8_t num; 676 } brightness, seq, demo; 677 678 struct reg { 679 uint8_t ctrl, reg, value; 680 } reg; 681 682 struct rgb { 683 uint8_t led, red, green, blue; 684 } rgb; 685 686 struct lightbar_params set_params; 687 }; 688 } __packed; 689 690 struct ec_response_lightbar { 691 union { 692 struct dump { 693 struct { 694 uint8_t reg; 695 uint8_t ic0; 696 uint8_t ic1; 697 } vals[23]; 698 } dump; 699 700 struct get_seq { 701 uint8_t num; 702 } get_seq; 703 704 struct lightbar_params get_params; 705 706 struct { 707 /* no return params */ 708 } off, on, init, brightness, seq, reg, rgb, demo, set_params; 709 }; 710 } __packed; 711 712 /* Lightbar commands */ 713 enum lightbar_command { 714 LIGHTBAR_CMD_DUMP = 0, 715 LIGHTBAR_CMD_OFF = 1, 716 LIGHTBAR_CMD_ON = 2, 717 LIGHTBAR_CMD_INIT = 3, 718 LIGHTBAR_CMD_BRIGHTNESS = 4, 719 LIGHTBAR_CMD_SEQ = 5, 720 LIGHTBAR_CMD_REG = 6, 721 LIGHTBAR_CMD_RGB = 7, 722 LIGHTBAR_CMD_GET_SEQ = 8, 723 LIGHTBAR_CMD_DEMO = 9, 724 LIGHTBAR_CMD_GET_PARAMS = 10, 725 LIGHTBAR_CMD_SET_PARAMS = 11, 726 LIGHTBAR_NUM_CMDS 727 }; 728 729 /*****************************************************************************/ 730 /* Verified boot commands */ 731 732 /* 733 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 734 * reused for other purposes with version > 0. 735 */ 736 737 /* Verified boot hash command */ 738 #define EC_CMD_VBOOT_HASH 0x2A 739 740 struct ec_params_vboot_hash { 741 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 742 uint8_t hash_type; /* enum ec_vboot_hash_type */ 743 uint8_t nonce_size; /* Nonce size; may be 0 */ 744 uint8_t reserved0; /* Reserved; set 0 */ 745 uint32_t offset; /* Offset in flash to hash */ 746 uint32_t size; /* Number of bytes to hash */ 747 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 748 } __packed; 749 750 struct ec_response_vboot_hash { 751 uint8_t status; /* enum ec_vboot_hash_status */ 752 uint8_t hash_type; /* enum ec_vboot_hash_type */ 753 uint8_t digest_size; /* Size of hash digest in bytes */ 754 uint8_t reserved0; /* Ignore; will be 0 */ 755 uint32_t offset; /* Offset in flash which was hashed */ 756 uint32_t size; /* Number of bytes hashed */ 757 uint8_t hash_digest[64]; /* Hash digest data */ 758 } __packed; 759 760 enum ec_vboot_hash_cmd { 761 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 762 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 763 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 764 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 765 }; 766 767 enum ec_vboot_hash_type { 768 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 769 }; 770 771 enum ec_vboot_hash_status { 772 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 773 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 774 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 775 }; 776 777 /* 778 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 779 * If one of these is specified, the EC will automatically update offset and 780 * size to the correct values for the specified image (RO or RW). 781 */ 782 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 783 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd 784 785 /*****************************************************************************/ 786 /* USB charging control commands */ 787 788 /* Set USB port charging mode */ 789 #define EC_CMD_USB_CHARGE_SET_MODE 0x30 790 791 struct ec_params_usb_charge_set_mode { 792 uint8_t usb_port_id; 793 uint8_t mode; 794 } __packed; 795 796 /*****************************************************************************/ 797 /* Persistent storage for host */ 798 799 /* Maximum bytes that can be read/written in a single command */ 800 #define EC_PSTORE_SIZE_MAX 64 801 802 /* Get persistent storage info */ 803 #define EC_CMD_PSTORE_INFO 0x40 804 805 struct ec_response_pstore_info { 806 /* Persistent storage size, in bytes */ 807 uint32_t pstore_size; 808 /* Access size; read/write offset and size must be a multiple of this */ 809 uint32_t access_size; 810 } __packed; 811 812 /* 813 * Read persistent storage 814 * 815 * Response is params.size bytes of data. 816 */ 817 #define EC_CMD_PSTORE_READ 0x41 818 819 struct ec_params_pstore_read { 820 uint32_t offset; /* Byte offset to read */ 821 uint32_t size; /* Size to read in bytes */ 822 } __packed; 823 824 /* Write persistent storage */ 825 #define EC_CMD_PSTORE_WRITE 0x42 826 827 struct ec_params_pstore_write { 828 uint32_t offset; /* Byte offset to write */ 829 uint32_t size; /* Size to write in bytes */ 830 uint8_t data[EC_PSTORE_SIZE_MAX]; 831 } __packed; 832 833 /*****************************************************************************/ 834 /* Real-time clock */ 835 836 /* RTC params and response structures */ 837 struct ec_params_rtc { 838 uint32_t time; 839 } __packed; 840 841 struct ec_response_rtc { 842 uint32_t time; 843 } __packed; 844 845 /* These use ec_response_rtc */ 846 #define EC_CMD_RTC_GET_VALUE 0x44 847 #define EC_CMD_RTC_GET_ALARM 0x45 848 849 /* These all use ec_params_rtc */ 850 #define EC_CMD_RTC_SET_VALUE 0x46 851 #define EC_CMD_RTC_SET_ALARM 0x47 852 853 /*****************************************************************************/ 854 /* Port80 log access */ 855 856 /* Get last port80 code from previous boot */ 857 #define EC_CMD_PORT80_LAST_BOOT 0x48 858 859 struct ec_response_port80_last_boot { 860 uint16_t code; 861 } __packed; 862 863 /*****************************************************************************/ 864 /* Thermal engine commands */ 865 866 /* Set thershold value */ 867 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50 868 869 struct ec_params_thermal_set_threshold { 870 uint8_t sensor_type; 871 uint8_t threshold_id; 872 uint16_t value; 873 } __packed; 874 875 /* Get threshold value */ 876 #define EC_CMD_THERMAL_GET_THRESHOLD 0x51 877 878 struct ec_params_thermal_get_threshold { 879 uint8_t sensor_type; 880 uint8_t threshold_id; 881 } __packed; 882 883 struct ec_response_thermal_get_threshold { 884 uint16_t value; 885 } __packed; 886 887 /* Toggle automatic fan control */ 888 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 889 890 /* Get TMP006 calibration data */ 891 #define EC_CMD_TMP006_GET_CALIBRATION 0x53 892 893 struct ec_params_tmp006_get_calibration { 894 uint8_t index; 895 } __packed; 896 897 struct ec_response_tmp006_get_calibration { 898 float s0; 899 float b0; 900 float b1; 901 float b2; 902 } __packed; 903 904 /* Set TMP006 calibration data */ 905 #define EC_CMD_TMP006_SET_CALIBRATION 0x54 906 907 struct ec_params_tmp006_set_calibration { 908 uint8_t index; 909 uint8_t reserved[3]; /* Reserved; set 0 */ 910 float s0; 911 float b0; 912 float b1; 913 float b2; 914 } __packed; 915 916 /*****************************************************************************/ 917 /* CROS_EC - Matrix KeyBoard Protocol */ 918 919 /* 920 * Read key state 921 * 922 * Returns raw data for keyboard cols; see ec_response_cros_ec_info.cols for 923 * expected response size. 924 */ 925 #define EC_CMD_CROS_EC_STATE 0x60 926 927 /* Provide information about the matrix : number of rows and columns */ 928 #define EC_CMD_CROS_EC_INFO 0x61 929 930 struct ec_response_cros_ec_info { 931 uint32_t rows; 932 uint32_t cols; 933 uint8_t switches; 934 } __packed; 935 936 /* Simulate key press */ 937 #define EC_CMD_CROS_EC_SIMULATE_KEY 0x62 938 939 struct ec_params_cros_ec_simulate_key { 940 uint8_t col; 941 uint8_t row; 942 uint8_t pressed; 943 } __packed; 944 945 /* Configure keyboard scanning */ 946 #define EC_CMD_CROS_EC_SET_CONFIG 0x64 947 #define EC_CMD_CROS_EC_GET_CONFIG 0x65 948 949 /* flags */ 950 enum cros_ec_config_flags { 951 EC_CROS_EC_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 952 }; 953 954 enum cros_ec_config_valid { 955 EC_CROS_EC_VALID_SCAN_PERIOD = 1 << 0, 956 EC_CROS_EC_VALID_POLL_TIMEOUT = 1 << 1, 957 EC_CROS_EC_VALID_MIN_POST_SCAN_DELAY = 1 << 3, 958 EC_CROS_EC_VALID_OUTPUT_SETTLE = 1 << 4, 959 EC_CROS_EC_VALID_DEBOUNCE_DOWN = 1 << 5, 960 EC_CROS_EC_VALID_DEBOUNCE_UP = 1 << 6, 961 EC_CROS_EC_VALID_FIFO_MAX_DEPTH = 1 << 7, 962 }; 963 964 /* Configuration for our key scanning algorithm */ 965 struct ec_cros_ec_config { 966 uint32_t valid_mask; /* valid fields */ 967 uint8_t flags; /* some flags (enum cros_ec_config_flags) */ 968 uint8_t valid_flags; /* which flags are valid */ 969 uint16_t scan_period_us; /* period between start of scans */ 970 /* revert to interrupt mode after no activity for this long */ 971 uint32_t poll_timeout_us; 972 /* 973 * minimum post-scan relax time. Once we finish a scan we check 974 * the time until we are due to start the next one. If this time is 975 * shorter this field, we use this instead. 976 */ 977 uint16_t min_post_scan_delay_us; 978 /* delay between setting up output and waiting for it to settle */ 979 uint16_t output_settle_us; 980 uint16_t debounce_down_us; /* time for debounce on key down */ 981 uint16_t debounce_up_us; /* time for debounce on key up */ 982 /* maximum depth to allow for fifo (0 = no keyscan output) */ 983 uint8_t fifo_max_depth; 984 } __packed; 985 986 struct ec_params_cros_ec_set_config { 987 struct ec_cros_ec_config config; 988 } __packed; 989 990 struct ec_response_cros_ec_get_config { 991 struct ec_cros_ec_config config; 992 } __packed; 993 994 /* Run the key scan emulation */ 995 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 996 997 enum ec_keyscan_seq_cmd { 998 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 999 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 1000 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 1001 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 1002 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 1003 }; 1004 1005 enum ec_collect_flags { 1006 /* 1007 * Indicates this scan was processed by the EC. Due to timing, some 1008 * scans may be skipped. 1009 */ 1010 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, 1011 }; 1012 1013 struct ec_collect_item { 1014 uint8_t flags; /* some flags (enum ec_collect_flags) */ 1015 }; 1016 1017 struct ec_params_keyscan_seq_ctrl { 1018 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 1019 union { 1020 struct { 1021 uint8_t active; /* still active */ 1022 uint8_t num_items; /* number of items */ 1023 /* Current item being presented */ 1024 uint8_t cur_item; 1025 } status; 1026 struct { 1027 /* 1028 * Absolute time for this scan, measured from the 1029 * start of the sequence. 1030 */ 1031 uint32_t time_us; 1032 uint8_t scan[0]; /* keyscan data */ 1033 } add; 1034 struct { 1035 uint8_t start_item; /* First item to return */ 1036 uint8_t num_items; /* Number of items to return */ 1037 } collect; 1038 }; 1039 } __packed; 1040 1041 struct ec_result_keyscan_seq_ctrl { 1042 union { 1043 struct { 1044 uint8_t num_items; /* Number of items */ 1045 /* Data for each item */ 1046 struct ec_collect_item item[0]; 1047 } collect; 1048 }; 1049 } __packed; 1050 1051 /*****************************************************************************/ 1052 /* Temperature sensor commands */ 1053 1054 /* Read temperature sensor info */ 1055 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 1056 1057 struct ec_params_temp_sensor_get_info { 1058 uint8_t id; 1059 } __packed; 1060 1061 struct ec_response_temp_sensor_get_info { 1062 char sensor_name[32]; 1063 uint8_t sensor_type; 1064 } __packed; 1065 1066 /*****************************************************************************/ 1067 1068 /* 1069 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 1070 * commands accidentally sent to the wrong interface. See the ACPI section 1071 * below. 1072 */ 1073 1074 /*****************************************************************************/ 1075 /* Host event commands */ 1076 1077 /* 1078 * Host event mask params and response structures, shared by all of the host 1079 * event commands below. 1080 */ 1081 struct ec_params_host_event_mask { 1082 uint32_t mask; 1083 } __packed; 1084 1085 struct ec_response_host_event_mask { 1086 uint32_t mask; 1087 } __packed; 1088 1089 /* These all use ec_response_host_event_mask */ 1090 #define EC_CMD_HOST_EVENT_GET_B 0x87 1091 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 1092 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 1093 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d 1094 1095 /* These all use ec_params_host_event_mask */ 1096 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a 1097 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b 1098 #define EC_CMD_HOST_EVENT_CLEAR 0x8c 1099 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e 1100 #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f 1101 1102 /*****************************************************************************/ 1103 /* Switch commands */ 1104 1105 /* Enable/disable LCD backlight */ 1106 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 1107 1108 struct ec_params_switch_enable_backlight { 1109 uint8_t enabled; 1110 } __packed; 1111 1112 /* Enable/disable WLAN/Bluetooth */ 1113 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 1114 1115 struct ec_params_switch_enable_wireless { 1116 uint8_t enabled; 1117 } __packed; 1118 1119 /*****************************************************************************/ 1120 /* GPIO commands. Only available on EC if write protect has been disabled. */ 1121 1122 /* Set GPIO output value */ 1123 #define EC_CMD_GPIO_SET 0x92 1124 1125 struct ec_params_gpio_set { 1126 char name[32]; 1127 uint8_t val; 1128 } __packed; 1129 1130 /* Get GPIO value */ 1131 #define EC_CMD_GPIO_GET 0x93 1132 1133 struct ec_params_gpio_get { 1134 char name[32]; 1135 } __packed; 1136 struct ec_response_gpio_get { 1137 uint8_t val; 1138 } __packed; 1139 1140 /*****************************************************************************/ 1141 /* I2C commands. Only available when flash write protect is unlocked. */ 1142 1143 /* Read I2C bus */ 1144 #define EC_CMD_I2C_READ 0x94 1145 1146 struct ec_params_i2c_read { 1147 uint16_t addr; 1148 uint8_t read_size; /* Either 8 or 16. */ 1149 uint8_t port; 1150 uint8_t offset; 1151 } __packed; 1152 struct ec_response_i2c_read { 1153 uint16_t data; 1154 } __packed; 1155 1156 /* Write I2C bus */ 1157 #define EC_CMD_I2C_WRITE 0x95 1158 1159 struct ec_params_i2c_write { 1160 uint16_t data; 1161 uint16_t addr; 1162 uint8_t write_size; /* Either 8 or 16. */ 1163 uint8_t port; 1164 uint8_t offset; 1165 } __packed; 1166 1167 /*****************************************************************************/ 1168 /* Charge state commands. Only available when flash write protect unlocked. */ 1169 1170 /* Force charge state machine to stop in idle mode */ 1171 #define EC_CMD_CHARGE_FORCE_IDLE 0x96 1172 1173 struct ec_params_force_idle { 1174 uint8_t enabled; 1175 } __packed; 1176 1177 /*****************************************************************************/ 1178 /* Console commands. Only available when flash write protect is unlocked. */ 1179 1180 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 1181 #define EC_CMD_CONSOLE_SNAPSHOT 0x97 1182 1183 /* 1184 * Read next chunk of data from saved snapshot. 1185 * 1186 * Response is null-terminated string. Empty string, if there is no more 1187 * remaining output. 1188 */ 1189 #define EC_CMD_CONSOLE_READ 0x98 1190 1191 /*****************************************************************************/ 1192 1193 /* 1194 * Cut off battery power output if the battery supports. 1195 * 1196 * For unsupported battery, just don't implement this command and lets EC 1197 * return EC_RES_INVALID_COMMAND. 1198 */ 1199 #define EC_CMD_BATTERY_CUT_OFF 0x99 1200 1201 /*****************************************************************************/ 1202 /* USB port mux control. */ 1203 1204 /* 1205 * Switch USB mux or return to automatic switching. 1206 */ 1207 #define EC_CMD_USB_MUX 0x9a 1208 1209 struct ec_params_usb_mux { 1210 uint8_t mux; 1211 } __packed; 1212 1213 /*****************************************************************************/ 1214 /* LDOs / FETs control. */ 1215 1216 enum ec_ldo_state { 1217 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 1218 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 1219 }; 1220 1221 /* 1222 * Switch on/off a LDO. 1223 */ 1224 #define EC_CMD_LDO_SET 0x9b 1225 1226 struct ec_params_ldo_set { 1227 uint8_t index; 1228 uint8_t state; 1229 } __packed; 1230 1231 /* 1232 * Get LDO state. 1233 */ 1234 #define EC_CMD_LDO_GET 0x9c 1235 1236 struct ec_params_ldo_get { 1237 uint8_t index; 1238 } __packed; 1239 1240 struct ec_response_ldo_get { 1241 uint8_t state; 1242 } __packed; 1243 1244 /*****************************************************************************/ 1245 /* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ 1246 1247 /* 1248 * Dump charge state machine context. 1249 * 1250 * Response is a binary dump of charge state machine context. 1251 */ 1252 #define EC_CMD_CHARGE_DUMP 0xa0 1253 1254 /* 1255 * Set maximum battery charging current. 1256 */ 1257 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 1258 1259 struct ec_params_current_limit { 1260 uint32_t limit; 1261 } __packed; 1262 1263 /*****************************************************************************/ 1264 /* Smart battery pass-through */ 1265 1266 /* Get / Set 16-bit smart battery registers */ 1267 #define EC_CMD_SB_READ_WORD 0xb0 1268 #define EC_CMD_SB_WRITE_WORD 0xb1 1269 1270 /* Get / Set string smart battery parameters 1271 * formatted as SMBUS "block". 1272 */ 1273 #define EC_CMD_SB_READ_BLOCK 0xb2 1274 #define EC_CMD_SB_WRITE_BLOCK 0xb3 1275 1276 struct ec_params_sb_rd { 1277 uint8_t reg; 1278 } __packed; 1279 1280 struct ec_response_sb_rd_word { 1281 uint16_t value; 1282 } __packed; 1283 1284 struct ec_params_sb_wr_word { 1285 uint8_t reg; 1286 uint16_t value; 1287 } __packed; 1288 1289 struct ec_response_sb_rd_block { 1290 uint8_t data[32]; 1291 } __packed; 1292 1293 struct ec_params_sb_wr_block { 1294 uint8_t reg; 1295 uint16_t data[32]; 1296 } __packed; 1297 1298 /*****************************************************************************/ 1299 /* System commands */ 1300 1301 /* 1302 * TODO: this is a confusing name, since it doesn't necessarily reboot the EC. 1303 * Rename to "set image" or something similar. 1304 */ 1305 #define EC_CMD_REBOOT_EC 0xd2 1306 1307 /* Command */ 1308 enum ec_reboot_cmd { 1309 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 1310 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 1311 EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ 1312 /* (command 3 was jump to RW-B) */ 1313 EC_REBOOT_COLD = 4, /* Cold-reboot */ 1314 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 1315 EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ 1316 }; 1317 1318 /* Flags for ec_params_reboot_ec.reboot_flags */ 1319 #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ 1320 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ 1321 1322 struct ec_params_reboot_ec { 1323 uint8_t cmd; /* enum ec_reboot_cmd */ 1324 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 1325 } __packed; 1326 1327 /* 1328 * Get information on last EC panic. 1329 * 1330 * Returns variable-length platform-dependent panic information. See panic.h 1331 * for details. 1332 */ 1333 #define EC_CMD_GET_PANIC_INFO 0xd3 1334 1335 /*****************************************************************************/ 1336 /* 1337 * ACPI commands 1338 * 1339 * These are valid ONLY on the ACPI command/data port. 1340 */ 1341 1342 /* 1343 * ACPI Read Embedded Controller 1344 * 1345 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 1346 * 1347 * Use the following sequence: 1348 * 1349 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 1350 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1351 * - Write address to EC_LPC_ADDR_ACPI_DATA 1352 * - Wait for EC_LPC_CMDR_DATA bit to set 1353 * - Read value from EC_LPC_ADDR_ACPI_DATA 1354 */ 1355 #define EC_CMD_ACPI_READ 0x80 1356 1357 /* 1358 * ACPI Write Embedded Controller 1359 * 1360 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 1361 * 1362 * Use the following sequence: 1363 * 1364 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 1365 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1366 * - Write address to EC_LPC_ADDR_ACPI_DATA 1367 * - Wait for EC_LPC_CMDR_PENDING bit to clear 1368 * - Write value to EC_LPC_ADDR_ACPI_DATA 1369 */ 1370 #define EC_CMD_ACPI_WRITE 0x81 1371 1372 /* 1373 * ACPI Query Embedded Controller 1374 * 1375 * This clears the lowest-order bit in the currently pending host events, and 1376 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 1377 * event 0x80000000 = 32), or 0 if no event was pending. 1378 */ 1379 #define EC_CMD_ACPI_QUERY_EVENT 0x84 1380 1381 /* Valid addresses in ACPI memory space, for read/write commands */ 1382 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 1383 #define EC_ACPI_MEM_VERSION 0x00 1384 /* 1385 * Test location; writing value here updates test compliment byte to (0xff - 1386 * value). 1387 */ 1388 #define EC_ACPI_MEM_TEST 0x01 1389 /* Test compliment; writes here are ignored. */ 1390 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 1391 /* Keyboard backlight brightness percent (0 - 100) */ 1392 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 1393 1394 /* Current version of ACPI memory address space */ 1395 #define EC_ACPI_MEM_VERSION_CURRENT 1 1396 1397 1398 /*****************************************************************************/ 1399 /* 1400 * Special commands 1401 * 1402 * These do not follow the normal rules for commands. See each command for 1403 * details. 1404 */ 1405 1406 /* 1407 * Reboot NOW 1408 * 1409 * This command will work even when the EC LPC interface is busy, because the 1410 * reboot command is processed at interrupt level. Note that when the EC 1411 * reboots, the host will reboot too, so there is no response to this command. 1412 * 1413 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 1414 */ 1415 #define EC_CMD_REBOOT 0xd1 /* Think "die" */ 1416 1417 /* 1418 * Resend last response (not supported on LPC). 1419 * 1420 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 1421 * there was no previous command, or the previous command's response was too 1422 * big to save. 1423 */ 1424 #define EC_CMD_RESEND_RESPONSE 0xdb 1425 1426 /* 1427 * This header byte on a command indicate version 0. Any header byte less 1428 * than this means that we are talking to an old EC which doesn't support 1429 * versioning. In that case, we assume version 0. 1430 * 1431 * Header bytes greater than this indicate a later version. For example, 1432 * EC_CMD_VERSION0 + 1 means we are using version 1. 1433 * 1434 * The old EC interface must not use commands 0dc or higher. 1435 */ 1436 #define EC_CMD_VERSION0 0xdc 1437 1438 #endif /* !__ACPI__ */ 1439 1440 #endif /* __CROS_EC_COMMANDS_H */ 1441