1*cc232a9dSJernej Skrabec /* 2*cc232a9dSJernej Skrabec * Copyright (c) 2015 Google, Inc 3*cc232a9dSJernej Skrabec * Copyright 2014 Rockchip Inc. 4*cc232a9dSJernej Skrabec * Copyright (C) 2011 Freescale Semiconductor, Inc. 5*cc232a9dSJernej Skrabec * (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net> 6*cc232a9dSJernej Skrabec * 7*cc232a9dSJernej Skrabec * SPDX-License-Identifier: GPL-2.0+ 8*cc232a9dSJernej Skrabec */ 9*cc232a9dSJernej Skrabec 10*cc232a9dSJernej Skrabec #ifndef _DW_HDMI_H 11*cc232a9dSJernej Skrabec #define _DW_HDMI_H 12*cc232a9dSJernej Skrabec 13*cc232a9dSJernej Skrabec #include <edid.h> 14*cc232a9dSJernej Skrabec 15*cc232a9dSJernej Skrabec #define HDMI_EDID_BLOCK_SIZE 128 16*cc232a9dSJernej Skrabec 17*cc232a9dSJernej Skrabec /* Identification Registers */ 18*cc232a9dSJernej Skrabec #define HDMI_DESIGN_ID 0x0000 19*cc232a9dSJernej Skrabec #define HDMI_REVISION_ID 0x0001 20*cc232a9dSJernej Skrabec #define HDMI_PRODUCT_ID0 0x0002 21*cc232a9dSJernej Skrabec #define HDMI_PRODUCT_ID1 0x0003 22*cc232a9dSJernej Skrabec #define HDMI_CONFIG0_ID 0x0004 23*cc232a9dSJernej Skrabec #define HDMI_CONFIG1_ID 0x0005 24*cc232a9dSJernej Skrabec #define HDMI_CONFIG2_ID 0x0006 25*cc232a9dSJernej Skrabec #define HDMI_CONFIG3_ID 0x0007 26*cc232a9dSJernej Skrabec 27*cc232a9dSJernej Skrabec /* Interrupt Registers */ 28*cc232a9dSJernej Skrabec #define HDMI_IH_FC_STAT0 0x0100 29*cc232a9dSJernej Skrabec #define HDMI_IH_FC_STAT1 0x0101 30*cc232a9dSJernej Skrabec #define HDMI_IH_FC_STAT2 0x0102 31*cc232a9dSJernej Skrabec #define HDMI_IH_AS_STAT0 0x0103 32*cc232a9dSJernej Skrabec #define HDMI_IH_PHY_STAT0 0x0104 33*cc232a9dSJernej Skrabec #define HDMI_IH_I2CM_STAT0 0x0105 34*cc232a9dSJernej Skrabec #define HDMI_IH_CEC_STAT0 0x0106 35*cc232a9dSJernej Skrabec #define HDMI_IH_VP_STAT0 0x0107 36*cc232a9dSJernej Skrabec #define HDMI_IH_I2CMPHY_STAT0 0x0108 37*cc232a9dSJernej Skrabec #define HDMI_IH_AHBDMAAUD_STAT0 0x0109 38*cc232a9dSJernej Skrabec 39*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_FC_STAT0 0x0180 40*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_FC_STAT1 0x0181 41*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_FC_STAT2 0x0182 42*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_AS_STAT0 0x0183 43*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_PHY_STAT0 0x0184 44*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_I2CM_STAT0 0x0185 45*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_CEC_STAT0 0x0186 46*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_VP_STAT0 0x0187 47*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_I2CMPHY_STAT0 0x0188 48*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE_AHBDMAAUD_STAT0 0x0189 49*cc232a9dSJernej Skrabec #define HDMI_IH_MUTE 0x01FF 50*cc232a9dSJernej Skrabec 51*cc232a9dSJernej Skrabec /* Video Sample Registers */ 52*cc232a9dSJernej Skrabec #define HDMI_TX_INVID0 0x0200 53*cc232a9dSJernej Skrabec #define HDMI_TX_INSTUFFING 0x0201 54*cc232a9dSJernej Skrabec #define HDMI_TX_GYDATA0 0x0202 55*cc232a9dSJernej Skrabec #define HDMI_TX_GYDATA1 0x0203 56*cc232a9dSJernej Skrabec #define HDMI_TX_RCRDATA0 0x0204 57*cc232a9dSJernej Skrabec #define HDMI_TX_RCRDATA1 0x0205 58*cc232a9dSJernej Skrabec #define HDMI_TX_BCBDATA0 0x0206 59*cc232a9dSJernej Skrabec #define HDMI_TX_BCBDATA1 0x0207 60*cc232a9dSJernej Skrabec 61*cc232a9dSJernej Skrabec /* Video Packetizer Registers */ 62*cc232a9dSJernej Skrabec #define HDMI_VP_STATUS 0x0800 63*cc232a9dSJernej Skrabec #define HDMI_VP_PR_CD 0x0801 64*cc232a9dSJernej Skrabec #define HDMI_VP_STUFF 0x0802 65*cc232a9dSJernej Skrabec #define HDMI_VP_REMAP 0x0803 66*cc232a9dSJernej Skrabec #define HDMI_VP_CONF 0x0804 67*cc232a9dSJernej Skrabec #define HDMI_VP_STAT 0x0805 68*cc232a9dSJernej Skrabec #define HDMI_VP_INT 0x0806 69*cc232a9dSJernej Skrabec #define HDMI_VP_MASK 0x0807 70*cc232a9dSJernej Skrabec #define HDMI_VP_POL 0x0808 71*cc232a9dSJernej Skrabec 72*cc232a9dSJernej Skrabec /* Frame Composer Registers */ 73*cc232a9dSJernej Skrabec #define HDMI_FC_INVIDCONF 0x1000 74*cc232a9dSJernej Skrabec #define HDMI_FC_INHACTV0 0x1001 75*cc232a9dSJernej Skrabec #define HDMI_FC_INHACTV1 0x1002 76*cc232a9dSJernej Skrabec #define HDMI_FC_INHBLANK0 0x1003 77*cc232a9dSJernej Skrabec #define HDMI_FC_INHBLANK1 0x1004 78*cc232a9dSJernej Skrabec #define HDMI_FC_INVACTV0 0x1005 79*cc232a9dSJernej Skrabec #define HDMI_FC_INVACTV1 0x1006 80*cc232a9dSJernej Skrabec #define HDMI_FC_INVBLANK 0x1007 81*cc232a9dSJernej Skrabec #define HDMI_FC_HSYNCINDELAY0 0x1008 82*cc232a9dSJernej Skrabec #define HDMI_FC_HSYNCINDELAY1 0x1009 83*cc232a9dSJernej Skrabec #define HDMI_FC_HSYNCINWIDTH0 0x100A 84*cc232a9dSJernej Skrabec #define HDMI_FC_HSYNCINWIDTH1 0x100B 85*cc232a9dSJernej Skrabec #define HDMI_FC_VSYNCINDELAY 0x100C 86*cc232a9dSJernej Skrabec #define HDMI_FC_VSYNCINWIDTH 0x100D 87*cc232a9dSJernej Skrabec #define HDMI_FC_INFREQ0 0x100E 88*cc232a9dSJernej Skrabec #define HDMI_FC_INFREQ1 0x100F 89*cc232a9dSJernej Skrabec #define HDMI_FC_INFREQ2 0x1010 90*cc232a9dSJernej Skrabec #define HDMI_FC_CTRLDUR 0x1011 91*cc232a9dSJernej Skrabec #define HDMI_FC_EXCTRLDUR 0x1012 92*cc232a9dSJernej Skrabec #define HDMI_FC_EXCTRLSPAC 0x1013 93*cc232a9dSJernej Skrabec #define HDMI_FC_CH0PREAM 0x1014 94*cc232a9dSJernej Skrabec #define HDMI_FC_CH1PREAM 0x1015 95*cc232a9dSJernej Skrabec #define HDMI_FC_CH2PREAM 0x1016 96*cc232a9dSJernej Skrabec #define HDMI_FC_AVICONF3 0x1017 97*cc232a9dSJernej Skrabec #define HDMI_FC_GCP 0x1018 98*cc232a9dSJernej Skrabec #define HDMI_FC_AVICONF0 0x1019 99*cc232a9dSJernej Skrabec #define HDMI_FC_AVICONF1 0x101A 100*cc232a9dSJernej Skrabec #define HDMI_FC_AVICONF2 0x101B 101*cc232a9dSJernej Skrabec #define HDMI_FC_AVIVID 0x101C 102*cc232a9dSJernej Skrabec #define HDMI_FC_AVIETB0 0x101D 103*cc232a9dSJernej Skrabec #define HDMI_FC_AVIETB1 0x101E 104*cc232a9dSJernej Skrabec #define HDMI_FC_AVISBB0 0x101F 105*cc232a9dSJernej Skrabec #define HDMI_FC_AVISBB1 0x1020 106*cc232a9dSJernej Skrabec #define HDMI_FC_AVIELB0 0x1021 107*cc232a9dSJernej Skrabec #define HDMI_FC_AVIELB1 0x1022 108*cc232a9dSJernej Skrabec #define HDMI_FC_AVISRB0 0x1023 109*cc232a9dSJernej Skrabec #define HDMI_FC_AVISRB1 0x1024 110*cc232a9dSJernej Skrabec #define HDMI_FC_AUDICONF0 0x1025 111*cc232a9dSJernej Skrabec #define HDMI_FC_AUDICONF1 0x1026 112*cc232a9dSJernej Skrabec #define HDMI_FC_AUDICONF2 0x1027 113*cc232a9dSJernej Skrabec #define HDMI_FC_AUDICONF3 0x1028 114*cc232a9dSJernej Skrabec #define HDMI_FC_VSDIEEEID0 0x1029 115*cc232a9dSJernej Skrabec #define HDMI_FC_VSDSIZE 0x102A 116*cc232a9dSJernej Skrabec 117*cc232a9dSJernej Skrabec /* HDMI Source PHY Registers */ 118*cc232a9dSJernej Skrabec #define HDMI_PHY_CONF0 0x3000 119*cc232a9dSJernej Skrabec #define HDMI_PHY_TST0 0x3001 120*cc232a9dSJernej Skrabec #define HDMI_PHY_TST1 0x3002 121*cc232a9dSJernej Skrabec #define HDMI_PHY_TST2 0x3003 122*cc232a9dSJernej Skrabec #define HDMI_PHY_STAT0 0x3004 123*cc232a9dSJernej Skrabec #define HDMI_PHY_INT0 0x3005 124*cc232a9dSJernej Skrabec #define HDMI_PHY_MASK0 0x3006 125*cc232a9dSJernej Skrabec #define HDMI_PHY_POL0 0x3007 126*cc232a9dSJernej Skrabec 127*cc232a9dSJernej Skrabec /* HDMI Master PHY Registers */ 128*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SLAVE_ADDR 0x3020 129*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_ADDRESS_ADDR 0x3021 130*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_DATAO_1_ADDR 0x3022 131*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_DATAO_0_ADDR 0x3023 132*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_DATAI_1_ADDR 0x3024 133*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_DATAI_0_ADDR 0x3025 134*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_OPERATION_ADDR 0x3026 135*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_INT_ADDR 0x3027 136*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_CTLINT_ADDR 0x3028 137*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_DIV_ADDR 0x3029 138*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SOFTRSTZ_ADDR 0x302a 139*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR 0x302b 140*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR 0x302c 141*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR 0x302d 142*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR 0x302e 143*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR 0x302f 144*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR 0x3030 145*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR 0x3031 146*cc232a9dSJernej Skrabec #define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR 0x3032 147*cc232a9dSJernej Skrabec 148*cc232a9dSJernej Skrabec /* Audio Sampler Registers */ 149*cc232a9dSJernej Skrabec #define HDMI_AUD_CONF0 0x3100 150*cc232a9dSJernej Skrabec #define HDMI_AUD_CONF1 0x3101 151*cc232a9dSJernej Skrabec #define HDMI_AUD_INT 0x3102 152*cc232a9dSJernej Skrabec #define HDMI_AUD_CONF2 0x3103 153*cc232a9dSJernej Skrabec #define HDMI_AUD_INT1 0x3104 154*cc232a9dSJernej Skrabec #define HDMI_AUD_N1 0x3200 155*cc232a9dSJernej Skrabec #define HDMI_AUD_N2 0x3201 156*cc232a9dSJernej Skrabec #define HDMI_AUD_N3 0x3202 157*cc232a9dSJernej Skrabec #define HDMI_AUD_CTS1 0x3203 158*cc232a9dSJernej Skrabec #define HDMI_AUD_CTS2 0x3204 159*cc232a9dSJernej Skrabec #define HDMI_AUD_CTS3 0x3205 160*cc232a9dSJernej Skrabec #define HDMI_AUD_INPUTCLKFS 0x3206 161*cc232a9dSJernej Skrabec #define HDMI_AUD_SPDIFINT 0x3302 162*cc232a9dSJernej Skrabec #define HDMI_AUD_CONF0_HBR 0x3400 163*cc232a9dSJernej Skrabec #define HDMI_AUD_HBR_STATUS 0x3401 164*cc232a9dSJernej Skrabec #define HDMI_AUD_HBR_INT 0x3402 165*cc232a9dSJernej Skrabec #define HDMI_AUD_HBR_POL 0x3403 166*cc232a9dSJernej Skrabec #define HDMI_AUD_HBR_MASK 0x3404 167*cc232a9dSJernej Skrabec 168*cc232a9dSJernej Skrabec /* Main Controller Registers */ 169*cc232a9dSJernej Skrabec #define HDMI_MC_SFRDIV 0x4000 170*cc232a9dSJernej Skrabec #define HDMI_MC_CLKDIS 0x4001 171*cc232a9dSJernej Skrabec #define HDMI_MC_SWRSTZ 0x4002 172*cc232a9dSJernej Skrabec #define HDMI_MC_OPCTRL 0x4003 173*cc232a9dSJernej Skrabec #define HDMI_MC_FLOWCTRL 0x4004 174*cc232a9dSJernej Skrabec #define HDMI_MC_PHYRSTZ 0x4005 175*cc232a9dSJernej Skrabec #define HDMI_MC_LOCKONCLOCK 0x4006 176*cc232a9dSJernej Skrabec #define HDMI_MC_HEACPHY_RST 0x4007 177*cc232a9dSJernej Skrabec 178*cc232a9dSJernej Skrabec /* I2C Master Registers (E-DDC) */ 179*cc232a9dSJernej Skrabec #define HDMI_I2CM_SLAVE 0x7E00 180*cc232a9dSJernej Skrabec #define HDMI_I2CM_ADDRESS 0x7E01 181*cc232a9dSJernej Skrabec #define HDMI_I2CM_DATAO 0x7E02 182*cc232a9dSJernej Skrabec #define HDMI_I2CM_DATAI 0x7E03 183*cc232a9dSJernej Skrabec #define HDMI_I2CM_OPERATION 0x7E04 184*cc232a9dSJernej Skrabec #define HDMI_I2CM_INT 0x7E05 185*cc232a9dSJernej Skrabec #define HDMI_I2CM_CTLINT 0x7E06 186*cc232a9dSJernej Skrabec #define HDMI_I2CM_DIV 0x7E07 187*cc232a9dSJernej Skrabec #define HDMI_I2CM_SEGADDR 0x7E08 188*cc232a9dSJernej Skrabec #define HDMI_I2CM_SOFTRSTZ 0x7E09 189*cc232a9dSJernej Skrabec #define HDMI_I2CM_SEGPTR 0x7E0A 190*cc232a9dSJernej Skrabec #define HDMI_I2CM_SS_SCL_HCNT_1_ADDR 0x7E0B 191*cc232a9dSJernej Skrabec #define HDMI_I2CM_SS_SCL_HCNT_0_ADDR 0x7E0C 192*cc232a9dSJernej Skrabec #define HDMI_I2CM_SS_SCL_LCNT_1_ADDR 0x7E0D 193*cc232a9dSJernej Skrabec #define HDMI_I2CM_SS_SCL_LCNT_0_ADDR 0x7E0E 194*cc232a9dSJernej Skrabec #define HDMI_I2CM_FS_SCL_HCNT_1_ADDR 0x7E0F 195*cc232a9dSJernej Skrabec #define HDMI_I2CM_FS_SCL_HCNT_0_ADDR 0x7E10 196*cc232a9dSJernej Skrabec #define HDMI_I2CM_FS_SCL_LCNT_1_ADDR 0x7E11 197*cc232a9dSJernej Skrabec #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR 0x7E12 198*cc232a9dSJernej Skrabec #define HDMI_I2CM_BUF0 0x7E20 199*cc232a9dSJernej Skrabec 200*cc232a9dSJernej Skrabec enum { 201*cc232a9dSJernej Skrabec /* HDMI PHY registers define */ 202*cc232a9dSJernej Skrabec PHY_OPMODE_PLLCFG = 0x06, 203*cc232a9dSJernej Skrabec PHY_CKCALCTRL = 0x05, 204*cc232a9dSJernej Skrabec PHY_CKSYMTXCTRL = 0x09, 205*cc232a9dSJernej Skrabec PHY_VLEVCTRL = 0x0e, 206*cc232a9dSJernej Skrabec PHY_PLLCURRCTRL = 0x10, 207*cc232a9dSJernej Skrabec PHY_PLLPHBYCTRL = 0x13, 208*cc232a9dSJernej Skrabec PHY_PLLGMPCTRL = 0x15, 209*cc232a9dSJernej Skrabec PHY_PLLCLKBISTPHASE = 0x17, 210*cc232a9dSJernej Skrabec PHY_TXTERM = 0x19, 211*cc232a9dSJernej Skrabec 212*cc232a9dSJernej Skrabec /* ih_phy_stat0 field values */ 213*cc232a9dSJernej Skrabec HDMI_IH_PHY_STAT0_HPD = 0x1, 214*cc232a9dSJernej Skrabec 215*cc232a9dSJernej Skrabec /* ih_mute field values */ 216*cc232a9dSJernej Skrabec HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2, 217*cc232a9dSJernej Skrabec HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1, 218*cc232a9dSJernej Skrabec 219*cc232a9dSJernej Skrabec /* tx_invid0 field values */ 220*cc232a9dSJernej Skrabec HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00, 221*cc232a9dSJernej Skrabec HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1f, 222*cc232a9dSJernej Skrabec HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0, 223*cc232a9dSJernej Skrabec 224*cc232a9dSJernej Skrabec /* tx_instuffing field values */ 225*cc232a9dSJernej Skrabec HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4, 226*cc232a9dSJernej Skrabec HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2, 227*cc232a9dSJernej Skrabec HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1, 228*cc232a9dSJernej Skrabec 229*cc232a9dSJernej Skrabec /* vp_pr_cd field values */ 230*cc232a9dSJernej Skrabec HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xf0, 231*cc232a9dSJernej Skrabec HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4, 232*cc232a9dSJernej Skrabec HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0f, 233*cc232a9dSJernej Skrabec HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0, 234*cc232a9dSJernej Skrabec 235*cc232a9dSJernej Skrabec /* vp_stuff field values */ 236*cc232a9dSJernej Skrabec HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20, 237*cc232a9dSJernej Skrabec HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5, 238*cc232a9dSJernej Skrabec HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4, 239*cc232a9dSJernej Skrabec HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4, 240*cc232a9dSJernej Skrabec HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2, 241*cc232a9dSJernej Skrabec HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2, 242*cc232a9dSJernej Skrabec HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1, 243*cc232a9dSJernej Skrabec HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1, 244*cc232a9dSJernej Skrabec 245*cc232a9dSJernej Skrabec /* vp_conf field values */ 246*cc232a9dSJernej Skrabec HDMI_VP_CONF_BYPASS_EN_MASK = 0x40, 247*cc232a9dSJernej Skrabec HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40, 248*cc232a9dSJernej Skrabec HDMI_VP_CONF_PP_EN_ENMASK = 0x20, 249*cc232a9dSJernej Skrabec HDMI_VP_CONF_PP_EN_DISABLE = 0x00, 250*cc232a9dSJernej Skrabec HDMI_VP_CONF_PR_EN_MASK = 0x10, 251*cc232a9dSJernej Skrabec HDMI_VP_CONF_PR_EN_DISABLE = 0x00, 252*cc232a9dSJernej Skrabec HDMI_VP_CONF_YCC422_EN_MASK = 0x8, 253*cc232a9dSJernej Skrabec HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0, 254*cc232a9dSJernej Skrabec HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4, 255*cc232a9dSJernej Skrabec HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4, 256*cc232a9dSJernej Skrabec HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3, 257*cc232a9dSJernej Skrabec HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3, 258*cc232a9dSJernej Skrabec 259*cc232a9dSJernej Skrabec /* vp_remap field values */ 260*cc232a9dSJernej Skrabec HDMI_VP_REMAP_YCC422_16BIT = 0x0, 261*cc232a9dSJernej Skrabec 262*cc232a9dSJernej Skrabec /* fc_invidconf field values */ 263*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80, 264*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80, 265*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00, 266*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40, 267*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40, 268*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00, 269*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20, 270*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20, 271*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00, 272*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10, 273*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10, 274*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00, 275*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8, 276*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8, 277*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0, 278*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2, 279*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2, 280*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0, 281*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1, 282*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1, 283*cc232a9dSJernej Skrabec HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0, 284*cc232a9dSJernej Skrabec 285*cc232a9dSJernej Skrabec 286*cc232a9dSJernej Skrabec /* fc_aviconf0-fc_aviconf3 field values */ 287*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03, 288*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00, 289*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01, 290*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02, 291*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40, 292*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40, 293*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00, 294*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0c, 295*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00, 296*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04, 297*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08, 298*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0c, 299*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30, 300*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10, 301*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20, 302*cc232a9dSJernej Skrabec HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00, 303*cc232a9dSJernej Skrabec 304*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0f, 305*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08, 306*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09, 307*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0a, 308*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0b, 309*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30, 310*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00, 311*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10, 312*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20, 313*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xc0, 314*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00, 315*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40, 316*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80, 317*cc232a9dSJernej Skrabec HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xc0, 318*cc232a9dSJernej Skrabec 319*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_SCALING_MASK = 0x03, 320*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_SCALING_NONE = 0x00, 321*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01, 322*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_SCALING_VERT = 0x02, 323*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_SCALING_HORIZ_vert = 0x03, 324*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0c, 325*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00, 326*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04, 327*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08, 328*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70, 329*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00, 330*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10, 331*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20, 332*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30, 333*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40, 334*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80, 335*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00, 336*cc232a9dSJernej Skrabec HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80, 337*cc232a9dSJernej Skrabec 338*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03, 339*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00, 340*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01, 341*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02, 342*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03, 343*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0c, 344*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00, 345*cc232a9dSJernej Skrabec HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04, 346*cc232a9dSJernej Skrabec 347*cc232a9dSJernej Skrabec /* fc_gcp field values*/ 348*cc232a9dSJernej Skrabec HDMI_FC_GCP_SET_AVMUTE = 0x02, 349*cc232a9dSJernej Skrabec HDMI_FC_GCP_CLEAR_AVMUTE = 0x01, 350*cc232a9dSJernej Skrabec 351*cc232a9dSJernej Skrabec /* phy_conf0 field values */ 352*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_PDZ_MASK = 0x80, 353*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_PDZ_OFFSET = 7, 354*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_ENTMDS_MASK = 0x40, 355*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_ENTMDS_OFFSET = 6, 356*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20, 357*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5, 358*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10, 359*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4, 360*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8, 361*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3, 362*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2, 363*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1, 364*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1, 365*cc232a9dSJernej Skrabec HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0, 366*cc232a9dSJernej Skrabec 367*cc232a9dSJernej Skrabec /* phy_tst0 field values */ 368*cc232a9dSJernej Skrabec HDMI_PHY_TST0_TSTCLR_MASK = 0x20, 369*cc232a9dSJernej Skrabec HDMI_PHY_TST0_TSTCLR_OFFSET = 5, 370*cc232a9dSJernej Skrabec 371*cc232a9dSJernej Skrabec /* phy_stat0 field values */ 372*cc232a9dSJernej Skrabec HDMI_PHY_HPD = 0x02, 373*cc232a9dSJernej Skrabec HDMI_PHY_TX_PHY_LOCK = 0x01, 374*cc232a9dSJernej Skrabec 375*cc232a9dSJernej Skrabec /* phy_i2cm_slave_addr field values */ 376*cc232a9dSJernej Skrabec HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69, 377*cc232a9dSJernej Skrabec 378*cc232a9dSJernej Skrabec /* phy_i2cm_operation_addr field values */ 379*cc232a9dSJernej Skrabec HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10, 380*cc232a9dSJernej Skrabec 381*cc232a9dSJernej Skrabec /* hdmi_phy_i2cm_int_addr */ 382*cc232a9dSJernej Skrabec HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08, 383*cc232a9dSJernej Skrabec 384*cc232a9dSJernej Skrabec /* hdmi_phy_i2cm_ctlint_addr */ 385*cc232a9dSJernej Skrabec HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80, 386*cc232a9dSJernej Skrabec HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08, 387*cc232a9dSJernej Skrabec 388*cc232a9dSJernej Skrabec /* aud_conf0 field values */ 389*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_SW_AUDIO_FIFO_RST = 0x80, 390*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_I2S_SELECT = 0x20, 391*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_I2S_IN_EN_0 = 0x01, 392*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_I2S_IN_EN_1 = 0x02, 393*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_I2S_IN_EN_2 = 0x04, 394*cc232a9dSJernej Skrabec HDMI_AUD_CONF0_I2S_IN_EN_3 = 0x08, 395*cc232a9dSJernej Skrabec 396*cc232a9dSJernej Skrabec /* aud_conf0 field values */ 397*cc232a9dSJernej Skrabec HDMI_AUD_CONF1_I2S_MODE_STANDARD_MODE = 0x0, 398*cc232a9dSJernej Skrabec HDMI_AUD_CONF1_I2S_WIDTH_16BIT = 0x10, 399*cc232a9dSJernej Skrabec 400*cc232a9dSJernej Skrabec /* aud_n3 field values */ 401*cc232a9dSJernej Skrabec HDMI_AUD_N3_NCTS_ATOMIC_WRITE = 0x80, 402*cc232a9dSJernej Skrabec HDMI_AUD_N3_AUDN19_16_MASK = 0x0f, 403*cc232a9dSJernej Skrabec 404*cc232a9dSJernej Skrabec /* aud_cts3 field values */ 405*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5, 406*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0, 407*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_1 = 0, 408*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_16 = 0x20, 409*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_32 = 0x40, 410*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_64 = 0x60, 411*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_128 = 0x80, 412*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0, 413*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_CTS_MANUAL = 0x10, 414*cc232a9dSJernej Skrabec HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f, 415*cc232a9dSJernej Skrabec 416*cc232a9dSJernej Skrabec /* aud_inputclkfs filed values */ 417*cc232a9dSJernej Skrabec HDMI_AUD_INPUTCLKFS_128 = 0x0, 418*cc232a9dSJernej Skrabec 419*cc232a9dSJernej Skrabec /* mc_clkdis field values */ 420*cc232a9dSJernej Skrabec HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8, 421*cc232a9dSJernej Skrabec HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2, 422*cc232a9dSJernej Skrabec HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1, 423*cc232a9dSJernej Skrabec 424*cc232a9dSJernej Skrabec /* mc_swrstz field values */ 425*cc232a9dSJernej Skrabec HDMI_MC_SWRSTZ_II2SSWRST_REQ = 0x08, 426*cc232a9dSJernej Skrabec HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02, 427*cc232a9dSJernej Skrabec 428*cc232a9dSJernej Skrabec /* mc_flowctrl field values */ 429*cc232a9dSJernej Skrabec HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1, 430*cc232a9dSJernej Skrabec HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0, 431*cc232a9dSJernej Skrabec 432*cc232a9dSJernej Skrabec /* mc_phyrstz field values */ 433*cc232a9dSJernej Skrabec HDMI_MC_PHYRSTZ_ASSERT = 0x0, 434*cc232a9dSJernej Skrabec HDMI_MC_PHYRSTZ_DEASSERT = 0x1, 435*cc232a9dSJernej Skrabec 436*cc232a9dSJernej Skrabec /* mc_heacphy_rst field values */ 437*cc232a9dSJernej Skrabec HDMI_MC_HEACPHY_RST_ASSERT = 0x1, 438*cc232a9dSJernej Skrabec 439*cc232a9dSJernej Skrabec /* i2cm filed values */ 440*cc232a9dSJernej Skrabec HDMI_I2CM_SLAVE_DDC_ADDR = 0x50, 441*cc232a9dSJernej Skrabec HDMI_I2CM_SEGADDR_DDC = 0x30, 442*cc232a9dSJernej Skrabec HDMI_I2CM_OP_RD8_EXT = 0x2, 443*cc232a9dSJernej Skrabec HDMI_I2CM_OP_RD8 = 0x1, 444*cc232a9dSJernej Skrabec HDMI_I2CM_DIV_FAST_STD_MODE = 0x8, 445*cc232a9dSJernej Skrabec HDMI_I2CM_DIV_FAST_MODE = 0x8, 446*cc232a9dSJernej Skrabec HDMI_I2CM_DIV_STD_MODE = 0x0, 447*cc232a9dSJernej Skrabec HDMI_I2CM_SOFTRSTZ_MASK = 0x1, 448*cc232a9dSJernej Skrabec }; 449*cc232a9dSJernej Skrabec 450*cc232a9dSJernej Skrabec struct hdmi_mpll_config { 451*cc232a9dSJernej Skrabec u64 mpixelclock; 452*cc232a9dSJernej Skrabec /* Mode of Operation and PLL Dividers Control Register */ 453*cc232a9dSJernej Skrabec u32 cpce; 454*cc232a9dSJernej Skrabec /* PLL Gmp Control Register */ 455*cc232a9dSJernej Skrabec u32 gmp; 456*cc232a9dSJernej Skrabec /* PLL Current Control Register */ 457*cc232a9dSJernej Skrabec u32 curr; 458*cc232a9dSJernej Skrabec }; 459*cc232a9dSJernej Skrabec 460*cc232a9dSJernej Skrabec struct hdmi_phy_config { 461*cc232a9dSJernej Skrabec u64 mpixelclock; 462*cc232a9dSJernej Skrabec u32 sym_ctr; /* clock symbol and transmitter control */ 463*cc232a9dSJernej Skrabec u32 term; /* transmission termination value */ 464*cc232a9dSJernej Skrabec u32 vlev_ctr; /* voltage level control */ 465*cc232a9dSJernej Skrabec }; 466*cc232a9dSJernej Skrabec 467*cc232a9dSJernej Skrabec struct dw_hdmi { 468*cc232a9dSJernej Skrabec ulong ioaddr; 469*cc232a9dSJernej Skrabec const struct hdmi_mpll_config *mpll_cfg; 470*cc232a9dSJernej Skrabec const struct hdmi_phy_config *phy_cfg; 471*cc232a9dSJernej Skrabec u8 i2c_clk_high; 472*cc232a9dSJernej Skrabec u8 i2c_clk_low; 473*cc232a9dSJernej Skrabec u8 reg_io_width; 474*cc232a9dSJernej Skrabec 475*cc232a9dSJernej Skrabec int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock); 476*cc232a9dSJernej Skrabec }; 477*cc232a9dSJernej Skrabec 478*cc232a9dSJernej Skrabec int dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock); 479*cc232a9dSJernej Skrabec int dw_hdmi_phy_wait_for_hpd(struct dw_hdmi *hdmi); 480*cc232a9dSJernej Skrabec void dw_hdmi_phy_init(struct dw_hdmi *hdmi); 481*cc232a9dSJernej Skrabec 482*cc232a9dSJernej Skrabec int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid); 483*cc232a9dSJernej Skrabec int dw_hdmi_read_edid(struct dw_hdmi *hdmi, u8 *buf, int buf_size); 484*cc232a9dSJernej Skrabec void dw_hdmi_init(struct dw_hdmi *hdmi); 485*cc232a9dSJernej Skrabec 486*cc232a9dSJernej Skrabec #endif 487