1*16b6e4aaSMarek Vasut /* 2*16b6e4aaSMarek Vasut * Copyright (C) 2016 Glider bvba 3*16b6e4aaSMarek Vasut * 4*16b6e4aaSMarek Vasut * This program is free software; you can redistribute it and/or modify 5*16b6e4aaSMarek Vasut * it under the terms of the GNU General Public License as published by 6*16b6e4aaSMarek Vasut * the Free Software Foundation; version 2 of the License. 7*16b6e4aaSMarek Vasut */ 8*16b6e4aaSMarek Vasut #ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__ 9*16b6e4aaSMarek Vasut #define __DT_BINDINGS_POWER_R8A7790_SYSC_H__ 10*16b6e4aaSMarek Vasut 11*16b6e4aaSMarek Vasut /* 12*16b6e4aaSMarek Vasut * These power domain indices match the numbers of the interrupt bits 13*16b6e4aaSMarek Vasut * representing the power areas in the various Interrupt Registers 14*16b6e4aaSMarek Vasut * (e.g. SYSCISR, Interrupt Status Register) 15*16b6e4aaSMarek Vasut */ 16*16b6e4aaSMarek Vasut 17*16b6e4aaSMarek Vasut #define R8A7790_PD_CA15_CPU0 0 18*16b6e4aaSMarek Vasut #define R8A7790_PD_CA15_CPU1 1 19*16b6e4aaSMarek Vasut #define R8A7790_PD_CA15_CPU2 2 20*16b6e4aaSMarek Vasut #define R8A7790_PD_CA15_CPU3 3 21*16b6e4aaSMarek Vasut #define R8A7790_PD_CA7_CPU0 5 22*16b6e4aaSMarek Vasut #define R8A7790_PD_CA7_CPU1 6 23*16b6e4aaSMarek Vasut #define R8A7790_PD_CA7_CPU2 7 24*16b6e4aaSMarek Vasut #define R8A7790_PD_CA7_CPU3 8 25*16b6e4aaSMarek Vasut #define R8A7790_PD_CA15_SCU 12 26*16b6e4aaSMarek Vasut #define R8A7790_PD_SH_4A 16 27*16b6e4aaSMarek Vasut #define R8A7790_PD_RGX 20 28*16b6e4aaSMarek Vasut #define R8A7790_PD_CA7_SCU 21 29*16b6e4aaSMarek Vasut #define R8A7790_PD_IMP 24 30*16b6e4aaSMarek Vasut 31*16b6e4aaSMarek Vasut /* Always-on power area */ 32*16b6e4aaSMarek Vasut #define R8A7790_PD_ALWAYS_ON 32 33*16b6e4aaSMarek Vasut 34*16b6e4aaSMarek Vasut #endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */ 35