1 #ifndef _DT_BINDINGS_STM32F746_PINFUNC_H
2 #define _DT_BINDINGS_STM32F746_PINFUNC_H
3 
4 #define STM32F746_PA0_FUNC_GPIO 0x0
5 #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6 #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
7 #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
8 #define STM32F746_PA0_FUNC_USART2_CTS 0x8
9 #define STM32F746_PA0_FUNC_UART4_TX 0x9
10 #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
11 #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
12 #define STM32F746_PA0_FUNC_EVENTOUT 0x10
13 #define STM32F746_PA0_FUNC_ANALOG 0x11
14 
15 #define STM32F746_PA1_FUNC_GPIO 0x100
16 #define STM32F746_PA1_FUNC_TIM2_CH2 0x102
17 #define STM32F746_PA1_FUNC_TIM5_CH2 0x103
18 #define STM32F746_PA1_FUNC_USART2_RTS 0x108
19 #define STM32F746_PA1_FUNC_UART4_RX 0x109
20 #define STM32F746_PA1_FUNC_QUADSPI_BK1_IO3 0x10a
21 #define STM32F746_PA1_FUNC_SAI2_MCLK_B 0x10b
22 #define STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c
23 #define STM32F746_PA1_FUNC_LCD_R2 0x10f
24 #define STM32F746_PA1_FUNC_EVENTOUT 0x110
25 #define STM32F746_PA1_FUNC_ANALOG 0x111
26 
27 #define STM32F746_PA2_FUNC_GPIO 0x200
28 #define STM32F746_PA2_FUNC_TIM2_CH3 0x202
29 #define STM32F746_PA2_FUNC_TIM5_CH3 0x203
30 #define STM32F746_PA2_FUNC_TIM9_CH1 0x204
31 #define STM32F746_PA2_FUNC_USART2_TX 0x208
32 #define STM32F746_PA2_FUNC_SAI2_SCK_B 0x209
33 #define STM32F746_PA2_FUNC_ETH_MDIO 0x20c
34 #define STM32F746_PA2_FUNC_LCD_R1 0x20f
35 #define STM32F746_PA2_FUNC_EVENTOUT 0x210
36 #define STM32F746_PA2_FUNC_ANALOG 0x211
37 
38 #define STM32F746_PA3_FUNC_GPIO 0x300
39 #define STM32F746_PA3_FUNC_TIM2_CH4 0x302
40 #define STM32F746_PA3_FUNC_TIM5_CH4 0x303
41 #define STM32F746_PA3_FUNC_TIM9_CH2 0x304
42 #define STM32F746_PA3_FUNC_USART2_RX 0x308
43 #define STM32F746_PA3_FUNC_OTG_HS_ULPI_D0 0x30b
44 #define STM32F746_PA3_FUNC_ETH_MII_COL 0x30c
45 #define STM32F746_PA3_FUNC_LCD_B5 0x30f
46 #define STM32F746_PA3_FUNC_EVENTOUT 0x310
47 #define STM32F746_PA3_FUNC_ANALOG 0x311
48 
49 #define STM32F746_PA4_FUNC_GPIO 0x400
50 #define STM32F746_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406
51 #define STM32F746_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407
52 #define STM32F746_PA4_FUNC_USART2_CK 0x408
53 #define STM32F746_PA4_FUNC_OTG_HS_SOF 0x40d
54 #define STM32F746_PA4_FUNC_DCMI_HSYNC 0x40e
55 #define STM32F746_PA4_FUNC_LCD_VSYNC 0x40f
56 #define STM32F746_PA4_FUNC_EVENTOUT 0x410
57 #define STM32F746_PA4_FUNC_ANALOG 0x411
58 
59 #define STM32F746_PA5_FUNC_GPIO 0x500
60 #define STM32F746_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502
61 #define STM32F746_PA5_FUNC_TIM8_CH1N 0x504
62 #define STM32F746_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506
63 #define STM32F746_PA5_FUNC_OTG_HS_ULPI_CK 0x50b
64 #define STM32F746_PA5_FUNC_LCD_R4 0x50f
65 #define STM32F746_PA5_FUNC_EVENTOUT 0x510
66 #define STM32F746_PA5_FUNC_ANALOG 0x511
67 
68 #define STM32F746_PA6_FUNC_GPIO 0x600
69 #define STM32F746_PA6_FUNC_TIM1_BKIN 0x602
70 #define STM32F746_PA6_FUNC_TIM3_CH1 0x603
71 #define STM32F746_PA6_FUNC_TIM8_BKIN 0x604
72 #define STM32F746_PA6_FUNC_SPI1_MISO 0x606
73 #define STM32F746_PA6_FUNC_TIM13_CH1 0x60a
74 #define STM32F746_PA6_FUNC_DCMI_PIXCLK 0x60e
75 #define STM32F746_PA6_FUNC_LCD_G2 0x60f
76 #define STM32F746_PA6_FUNC_EVENTOUT 0x610
77 #define STM32F746_PA6_FUNC_ANALOG 0x611
78 
79 #define STM32F746_PA7_FUNC_GPIO 0x700
80 #define STM32F746_PA7_FUNC_TIM1_CH1N 0x702
81 #define STM32F746_PA7_FUNC_TIM3_CH2 0x703
82 #define STM32F746_PA7_FUNC_TIM8_CH1N 0x704
83 #define STM32F746_PA7_FUNC_SPI1_MOSI_I2S1_SD 0x706
84 #define STM32F746_PA7_FUNC_TIM14_CH1 0x70a
85 #define STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c
86 #define STM32F746_PA7_FUNC_FMC_SDNWE 0x70d
87 #define STM32F746_PA7_FUNC_EVENTOUT 0x710
88 #define STM32F746_PA7_FUNC_ANALOG 0x711
89 
90 #define STM32F746_PA8_FUNC_GPIO 0x800
91 #define STM32F746_PA8_FUNC_MCO1 0x801
92 #define STM32F746_PA8_FUNC_TIM1_CH1 0x802
93 #define STM32F746_PA8_FUNC_TIM8_BKIN2 0x804
94 #define STM32F746_PA8_FUNC_I2C3_SCL 0x805
95 #define STM32F746_PA8_FUNC_USART1_CK 0x808
96 #define STM32F746_PA8_FUNC_OTG_FS_SOF 0x80b
97 #define STM32F746_PA8_FUNC_LCD_R6 0x80f
98 #define STM32F746_PA8_FUNC_EVENTOUT 0x810
99 #define STM32F746_PA8_FUNC_ANALOG 0x811
100 
101 #define STM32F746_PA9_FUNC_GPIO 0x900
102 #define STM32F746_PA9_FUNC_TIM1_CH2 0x902
103 #define STM32F746_PA9_FUNC_I2C3_SMBA 0x905
104 #define STM32F746_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906
105 #define STM32F746_PA9_FUNC_USART1_TX 0x908
106 #define STM32F746_PA9_FUNC_DCMI_D0 0x90e
107 #define STM32F746_PA9_FUNC_EVENTOUT 0x910
108 #define STM32F746_PA9_FUNC_ANALOG 0x911
109 
110 #define STM32F746_PA10_FUNC_GPIO 0xa00
111 #define STM32F746_PA10_FUNC_TIM1_CH3 0xa02
112 #define STM32F746_PA10_FUNC_USART1_RX 0xa08
113 #define STM32F746_PA10_FUNC_OTG_FS_ID 0xa0b
114 #define STM32F746_PA10_FUNC_DCMI_D1 0xa0e
115 #define STM32F746_PA10_FUNC_EVENTOUT 0xa10
116 #define STM32F746_PA10_FUNC_ANALOG 0xa11
117 
118 #define STM32F746_PA11_FUNC_GPIO 0xb00
119 #define STM32F746_PA11_FUNC_TIM1_CH4 0xb02
120 #define STM32F746_PA11_FUNC_USART1_CTS 0xb08
121 #define STM32F746_PA11_FUNC_CAN1_RX 0xb0a
122 #define STM32F746_PA11_FUNC_OTG_FS_DM 0xb0b
123 #define STM32F746_PA11_FUNC_LCD_R4 0xb0f
124 #define STM32F746_PA11_FUNC_EVENTOUT 0xb10
125 #define STM32F746_PA11_FUNC_ANALOG 0xb11
126 
127 #define STM32F746_PA12_FUNC_GPIO 0xc00
128 #define STM32F746_PA12_FUNC_TIM1_ETR 0xc02
129 #define STM32F746_PA12_FUNC_USART1_RTS 0xc08
130 #define STM32F746_PA12_FUNC_SAI2_FS_B 0xc09
131 #define STM32F746_PA12_FUNC_CAN1_TX 0xc0a
132 #define STM32F746_PA12_FUNC_OTG_FS_DP 0xc0b
133 #define STM32F746_PA12_FUNC_LCD_R5 0xc0f
134 #define STM32F746_PA12_FUNC_EVENTOUT 0xc10
135 #define STM32F746_PA12_FUNC_ANALOG 0xc11
136 
137 #define STM32F746_PA13_FUNC_GPIO 0xd00
138 #define STM32F746_PA13_FUNC_JTMS_SWDIO 0xd01
139 #define STM32F746_PA13_FUNC_EVENTOUT 0xd10
140 #define STM32F746_PA13_FUNC_ANALOG 0xd11
141 
142 #define STM32F746_PA14_FUNC_GPIO 0xe00
143 #define STM32F746_PA14_FUNC_JTCK_SWCLK 0xe01
144 #define STM32F746_PA14_FUNC_EVENTOUT 0xe10
145 #define STM32F746_PA14_FUNC_ANALOG 0xe11
146 
147 #define STM32F746_PA15_FUNC_GPIO 0xf00
148 #define STM32F746_PA15_FUNC_JTDI 0xf01
149 #define STM32F746_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02
150 #define STM32F746_PA15_FUNC_HDMI_CEC 0xf05
151 #define STM32F746_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06
152 #define STM32F746_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07
153 #define STM32F746_PA15_FUNC_UART4_RTS 0xf09
154 #define STM32F746_PA15_FUNC_EVENTOUT 0xf10
155 #define STM32F746_PA15_FUNC_ANALOG 0xf11
156 
157 
158 #define STM32F746_PB0_FUNC_GPIO 0x1000
159 #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002
160 #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003
161 #define STM32F746_PB0_FUNC_TIM8_CH2N 0x1004
162 #define STM32F746_PB0_FUNC_UART4_CTS 0x1009
163 #define STM32F746_PB0_FUNC_LCD_R3 0x100a
164 #define STM32F746_PB0_FUNC_OTG_HS_ULPI_D1 0x100b
165 #define STM32F746_PB0_FUNC_ETH_MII_RXD2 0x100c
166 #define STM32F746_PB0_FUNC_EVENTOUT 0x1010
167 #define STM32F746_PB0_FUNC_ANALOG 0x1011
168 
169 #define STM32F746_PB1_FUNC_GPIO 0x1100
170 #define STM32F746_PB1_FUNC_TIM1_CH3N 0x1102
171 #define STM32F746_PB1_FUNC_TIM3_CH4 0x1103
172 #define STM32F746_PB1_FUNC_TIM8_CH3N 0x1104
173 #define STM32F746_PB1_FUNC_LCD_R6 0x110a
174 #define STM32F746_PB1_FUNC_OTG_HS_ULPI_D2 0x110b
175 #define STM32F746_PB1_FUNC_ETH_MII_RXD3 0x110c
176 #define STM32F746_PB1_FUNC_EVENTOUT 0x1110
177 #define STM32F746_PB1_FUNC_ANALOG 0x1111
178 
179 #define STM32F746_PB2_FUNC_GPIO 0x1200
180 #define STM32F746_PB2_FUNC_SAI1_SD_A 0x1207
181 #define STM32F746_PB2_FUNC_SPI3_MOSI_I2S3_SD 0x1208
182 #define STM32F746_PB2_FUNC_QUADSPI_CLK 0x120a
183 #define STM32F746_PB2_FUNC_EVENTOUT 0x1210
184 #define STM32F746_PB2_FUNC_ANALOG 0x1211
185 
186 #define STM32F746_PB3_FUNC_GPIO 0x1300
187 #define STM32F746_PB3_FUNC_JTDO_TRACESWO 0x1301
188 #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302
189 #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306
190 #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307
191 #define STM32F746_PB3_FUNC_EVENTOUT 0x1310
192 #define STM32F746_PB3_FUNC_ANALOG 0x1311
193 
194 #define STM32F746_PB4_FUNC_GPIO 0x1400
195 #define STM32F746_PB4_FUNC_NJTRST 0x1401
196 #define STM32F746_PB4_FUNC_TIM3_CH1 0x1403
197 #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406
198 #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407
199 #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408
200 #define STM32F746_PB4_FUNC_EVENTOUT 0x1410
201 #define STM32F746_PB4_FUNC_ANALOG 0x1411
202 
203 #define STM32F746_PB5_FUNC_GPIO 0x1500
204 #define STM32F746_PB5_FUNC_TIM3_CH2 0x1503
205 #define STM32F746_PB5_FUNC_I2C1_SMBA 0x1505
206 #define STM32F746_PB5_FUNC_SPI1_MOSI_I2S1_SD 0x1506
207 #define STM32F746_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507
208 #define STM32F746_PB5_FUNC_CAN2_RX 0x150a
209 #define STM32F746_PB5_FUNC_OTG_HS_ULPI_D7 0x150b
210 #define STM32F746_PB5_FUNC_ETH_PPS_OUT 0x150c
211 #define STM32F746_PB5_FUNC_FMC_SDCKE1 0x150d
212 #define STM32F746_PB5_FUNC_DCMI_D10 0x150e
213 #define STM32F746_PB5_FUNC_EVENTOUT 0x1510
214 #define STM32F746_PB5_FUNC_ANALOG 0x1511
215 
216 #define STM32F746_PB6_FUNC_GPIO 0x1600
217 #define STM32F746_PB6_FUNC_TIM4_CH1 0x1603
218 #define STM32F746_PB6_FUNC_HDMI_CEC 0x1604
219 #define STM32F746_PB6_FUNC_I2C1_SCL 0x1605
220 #define STM32F746_PB6_FUNC_USART1_TX 0x1608
221 #define STM32F746_PB6_FUNC_CAN2_TX 0x160a
222 #define STM32F746_PB6_FUNC_QUADSPI_BK1_NCS 0x160b
223 #define STM32F746_PB6_FUNC_FMC_SDNE1 0x160d
224 #define STM32F746_PB6_FUNC_DCMI_D5 0x160e
225 #define STM32F746_PB6_FUNC_EVENTOUT 0x1610
226 #define STM32F746_PB6_FUNC_ANALOG 0x1611
227 
228 #define STM32F746_PB7_FUNC_GPIO 0x1700
229 #define STM32F746_PB7_FUNC_TIM4_CH2 0x1703
230 #define STM32F746_PB7_FUNC_I2C1_SDA 0x1705
231 #define STM32F746_PB7_FUNC_USART1_RX 0x1708
232 #define STM32F746_PB7_FUNC_FMC_NL 0x170d
233 #define STM32F746_PB7_FUNC_DCMI_VSYNC 0x170e
234 #define STM32F746_PB7_FUNC_EVENTOUT 0x1710
235 #define STM32F746_PB7_FUNC_ANALOG 0x1711
236 
237 #define STM32F746_PB8_FUNC_GPIO 0x1800
238 #define STM32F746_PB8_FUNC_TIM4_CH3 0x1803
239 #define STM32F746_PB8_FUNC_TIM10_CH1 0x1804
240 #define STM32F746_PB8_FUNC_I2C1_SCL 0x1805
241 #define STM32F746_PB8_FUNC_CAN1_RX 0x180a
242 #define STM32F746_PB8_FUNC_ETH_MII_TXD3 0x180c
243 #define STM32F746_PB8_FUNC_SDMMC1_D4 0x180d
244 #define STM32F746_PB8_FUNC_DCMI_D6 0x180e
245 #define STM32F746_PB8_FUNC_LCD_B6 0x180f
246 #define STM32F746_PB8_FUNC_EVENTOUT 0x1810
247 #define STM32F746_PB8_FUNC_ANALOG 0x1811
248 
249 #define STM32F746_PB9_FUNC_GPIO 0x1900
250 #define STM32F746_PB9_FUNC_TIM4_CH4 0x1903
251 #define STM32F746_PB9_FUNC_TIM11_CH1 0x1904
252 #define STM32F746_PB9_FUNC_I2C1_SDA 0x1905
253 #define STM32F746_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906
254 #define STM32F746_PB9_FUNC_CAN1_TX 0x190a
255 #define STM32F746_PB9_FUNC_SDMMC1_D5 0x190d
256 #define STM32F746_PB9_FUNC_DCMI_D7 0x190e
257 #define STM32F746_PB9_FUNC_LCD_B7 0x190f
258 #define STM32F746_PB9_FUNC_EVENTOUT 0x1910
259 #define STM32F746_PB9_FUNC_ANALOG 0x1911
260 
261 #define STM32F746_PB10_FUNC_GPIO 0x1a00
262 #define STM32F746_PB10_FUNC_TIM2_CH3 0x1a02
263 #define STM32F746_PB10_FUNC_I2C2_SCL 0x1a05
264 #define STM32F746_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06
265 #define STM32F746_PB10_FUNC_USART3_TX 0x1a08
266 #define STM32F746_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b
267 #define STM32F746_PB10_FUNC_ETH_MII_RX_ER 0x1a0c
268 #define STM32F746_PB10_FUNC_LCD_G4 0x1a0f
269 #define STM32F746_PB10_FUNC_EVENTOUT 0x1a10
270 #define STM32F746_PB10_FUNC_ANALOG 0x1a11
271 
272 #define STM32F746_PB11_FUNC_GPIO 0x1b00
273 #define STM32F746_PB11_FUNC_TIM2_CH4 0x1b02
274 #define STM32F746_PB11_FUNC_I2C2_SDA 0x1b05
275 #define STM32F746_PB11_FUNC_USART3_RX 0x1b08
276 #define STM32F746_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b
277 #define STM32F746_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c
278 #define STM32F746_PB11_FUNC_LCD_G5 0x1b0f
279 #define STM32F746_PB11_FUNC_EVENTOUT 0x1b10
280 #define STM32F746_PB11_FUNC_ANALOG 0x1b11
281 
282 #define STM32F746_PB12_FUNC_GPIO 0x1c00
283 #define STM32F746_PB12_FUNC_TIM1_BKIN 0x1c02
284 #define STM32F746_PB12_FUNC_I2C2_SMBA 0x1c05
285 #define STM32F746_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06
286 #define STM32F746_PB12_FUNC_USART3_CK 0x1c08
287 #define STM32F746_PB12_FUNC_CAN2_RX 0x1c0a
288 #define STM32F746_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b
289 #define STM32F746_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c
290 #define STM32F746_PB12_FUNC_OTG_HS_ID 0x1c0d
291 #define STM32F746_PB12_FUNC_EVENTOUT 0x1c10
292 #define STM32F746_PB12_FUNC_ANALOG 0x1c11
293 
294 #define STM32F746_PB13_FUNC_GPIO 0x1d00
295 #define STM32F746_PB13_FUNC_TIM1_CH1N 0x1d02
296 #define STM32F746_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06
297 #define STM32F746_PB13_FUNC_USART3_CTS 0x1d08
298 #define STM32F746_PB13_FUNC_CAN2_TX 0x1d0a
299 #define STM32F746_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b
300 #define STM32F746_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c
301 #define STM32F746_PB13_FUNC_EVENTOUT 0x1d10
302 #define STM32F746_PB13_FUNC_ANALOG 0x1d11
303 
304 #define STM32F746_PB14_FUNC_GPIO 0x1e00
305 #define STM32F746_PB14_FUNC_TIM1_CH2N 0x1e02
306 #define STM32F746_PB14_FUNC_TIM8_CH2N 0x1e04
307 #define STM32F746_PB14_FUNC_SPI2_MISO 0x1e06
308 #define STM32F746_PB14_FUNC_USART3_RTS 0x1e08
309 #define STM32F746_PB14_FUNC_TIM12_CH1 0x1e0a
310 #define STM32F746_PB14_FUNC_OTG_HS_DM 0x1e0d
311 #define STM32F746_PB14_FUNC_EVENTOUT 0x1e10
312 #define STM32F746_PB14_FUNC_ANALOG 0x1e11
313 
314 #define STM32F746_PB15_FUNC_GPIO 0x1f00
315 #define STM32F746_PB15_FUNC_RTC_REFIN 0x1f01
316 #define STM32F746_PB15_FUNC_TIM1_CH3N 0x1f02
317 #define STM32F746_PB15_FUNC_TIM8_CH3N 0x1f04
318 #define STM32F746_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06
319 #define STM32F746_PB15_FUNC_TIM12_CH2 0x1f0a
320 #define STM32F746_PB15_FUNC_OTG_HS_DP 0x1f0d
321 #define STM32F746_PB15_FUNC_EVENTOUT 0x1f10
322 #define STM32F746_PB15_FUNC_ANALOG 0x1f11
323 
324 
325 #define STM32F746_PC0_FUNC_GPIO 0x2000
326 #define STM32F746_PC0_FUNC_SAI2_FS_B 0x2009
327 #define STM32F746_PC0_FUNC_OTG_HS_ULPI_STP 0x200b
328 #define STM32F746_PC0_FUNC_FMC_SDNWE 0x200d
329 #define STM32F746_PC0_FUNC_LCD_R5 0x200f
330 #define STM32F746_PC0_FUNC_EVENTOUT 0x2010
331 #define STM32F746_PC0_FUNC_ANALOG 0x2011
332 
333 #define STM32F746_PC1_FUNC_GPIO 0x2100
334 #define STM32F746_PC1_FUNC_TRACED0 0x2101
335 #define STM32F746_PC1_FUNC_SPI2_MOSI_I2S2_SD 0x2106
336 #define STM32F746_PC1_FUNC_SAI1_SD_A 0x2107
337 #define STM32F746_PC1_FUNC_ETH_MDC 0x210c
338 #define STM32F746_PC1_FUNC_EVENTOUT 0x2110
339 #define STM32F746_PC1_FUNC_ANALOG 0x2111
340 
341 #define STM32F746_PC2_FUNC_GPIO 0x2200
342 #define STM32F746_PC2_FUNC_SPI2_MISO 0x2206
343 #define STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b
344 #define STM32F746_PC2_FUNC_ETH_MII_TXD2 0x220c
345 #define STM32F746_PC2_FUNC_FMC_SDNE0 0x220d
346 #define STM32F746_PC2_FUNC_EVENTOUT 0x2210
347 #define STM32F746_PC2_FUNC_ANALOG 0x2211
348 
349 #define STM32F746_PC3_FUNC_GPIO 0x2300
350 #define STM32F746_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306
351 #define STM32F746_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b
352 #define STM32F746_PC3_FUNC_ETH_MII_TX_CLK 0x230c
353 #define STM32F746_PC3_FUNC_FMC_SDCKE0 0x230d
354 #define STM32F746_PC3_FUNC_EVENTOUT 0x2310
355 #define STM32F746_PC3_FUNC_ANALOG 0x2311
356 
357 #define STM32F746_PC4_FUNC_GPIO 0x2400
358 #define STM32F746_PC4_FUNC_I2S1_MCK 0x2406
359 #define STM32F746_PC4_FUNC_SPDIFRX_IN2 0x2409
360 #define STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c
361 #define STM32F746_PC4_FUNC_FMC_SDNE0 0x240d
362 #define STM32F746_PC4_FUNC_EVENTOUT 0x2410
363 #define STM32F746_PC4_FUNC_ANALOG 0x2411
364 
365 #define STM32F746_PC5_FUNC_GPIO 0x2500
366 #define STM32F746_PC5_FUNC_SPDIFRX_IN3 0x2509
367 #define STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c
368 #define STM32F746_PC5_FUNC_FMC_SDCKE0 0x250d
369 #define STM32F746_PC5_FUNC_EVENTOUT 0x2510
370 #define STM32F746_PC5_FUNC_ANALOG 0x2511
371 
372 #define STM32F746_PC6_FUNC_GPIO 0x2600
373 #define STM32F746_PC6_FUNC_TIM3_CH1 0x2603
374 #define STM32F746_PC6_FUNC_TIM8_CH1 0x2604
375 #define STM32F746_PC6_FUNC_I2S2_MCK 0x2606
376 #define STM32F746_PC6_FUNC_USART6_TX 0x2609
377 #define STM32F746_PC6_FUNC_SDMMC1_D6 0x260d
378 #define STM32F746_PC6_FUNC_DCMI_D0 0x260e
379 #define STM32F746_PC6_FUNC_LCD_HSYNC 0x260f
380 #define STM32F746_PC6_FUNC_EVENTOUT 0x2610
381 #define STM32F746_PC6_FUNC_ANALOG 0x2611
382 
383 #define STM32F746_PC7_FUNC_GPIO 0x2700
384 #define STM32F746_PC7_FUNC_TIM3_CH2 0x2703
385 #define STM32F746_PC7_FUNC_TIM8_CH2 0x2704
386 #define STM32F746_PC7_FUNC_I2S3_MCK 0x2707
387 #define STM32F746_PC7_FUNC_USART6_RX 0x2709
388 #define STM32F746_PC7_FUNC_SDMMC1_D7 0x270d
389 #define STM32F746_PC7_FUNC_DCMI_D1 0x270e
390 #define STM32F746_PC7_FUNC_LCD_G6 0x270f
391 #define STM32F746_PC7_FUNC_EVENTOUT 0x2710
392 #define STM32F746_PC7_FUNC_ANALOG 0x2711
393 
394 #define STM32F746_PC8_FUNC_GPIO 0x2800
395 #define STM32F746_PC8_FUNC_TRACED1 0x2801
396 #define STM32F746_PC8_FUNC_TIM3_CH3 0x2803
397 #define STM32F746_PC8_FUNC_TIM8_CH3 0x2804
398 #define STM32F746_PC8_FUNC_UART5_RTS 0x2808
399 #define STM32F746_PC8_FUNC_USART6_CK 0x2809
400 #define STM32F746_PC8_FUNC_SDMMC1_D0 0x280d
401 #define STM32F746_PC8_FUNC_DCMI_D2 0x280e
402 #define STM32F746_PC8_FUNC_EVENTOUT 0x2810
403 #define STM32F746_PC8_FUNC_ANALOG 0x2811
404 
405 #define STM32F746_PC9_FUNC_GPIO 0x2900
406 #define STM32F746_PC9_FUNC_MCO2 0x2901
407 #define STM32F746_PC9_FUNC_TIM3_CH4 0x2903
408 #define STM32F746_PC9_FUNC_TIM8_CH4 0x2904
409 #define STM32F746_PC9_FUNC_I2C3_SDA 0x2905
410 #define STM32F746_PC9_FUNC_I2S_CKIN 0x2906
411 #define STM32F746_PC9_FUNC_UART5_CTS 0x2908
412 #define STM32F746_PC9_FUNC_QUADSPI_BK1_IO0 0x290a
413 #define STM32F746_PC9_FUNC_SDMMC1_D1 0x290d
414 #define STM32F746_PC9_FUNC_DCMI_D3 0x290e
415 #define STM32F746_PC9_FUNC_EVENTOUT 0x2910
416 #define STM32F746_PC9_FUNC_ANALOG 0x2911
417 
418 #define STM32F746_PC10_FUNC_GPIO 0x2a00
419 #define STM32F746_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07
420 #define STM32F746_PC10_FUNC_USART3_TX 0x2a08
421 #define STM32F746_PC10_FUNC_UART4_TX 0x2a09
422 #define STM32F746_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a
423 #define STM32F746_PC10_FUNC_SDMMC1_D2 0x2a0d
424 #define STM32F746_PC10_FUNC_DCMI_D8 0x2a0e
425 #define STM32F746_PC10_FUNC_LCD_R2 0x2a0f
426 #define STM32F746_PC10_FUNC_EVENTOUT 0x2a10
427 #define STM32F746_PC10_FUNC_ANALOG 0x2a11
428 
429 #define STM32F746_PC11_FUNC_GPIO 0x2b00
430 #define STM32F746_PC11_FUNC_SPI3_MISO 0x2b07
431 #define STM32F746_PC11_FUNC_USART3_RX 0x2b08
432 #define STM32F746_PC11_FUNC_UART4_RX 0x2b09
433 #define STM32F746_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a
434 #define STM32F746_PC11_FUNC_SDMMC1_D3 0x2b0d
435 #define STM32F746_PC11_FUNC_DCMI_D4 0x2b0e
436 #define STM32F746_PC11_FUNC_EVENTOUT 0x2b10
437 #define STM32F746_PC11_FUNC_ANALOG 0x2b11
438 
439 #define STM32F746_PC12_FUNC_GPIO 0x2c00
440 #define STM32F746_PC12_FUNC_TRACED3 0x2c01
441 #define STM32F746_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07
442 #define STM32F746_PC12_FUNC_USART3_CK 0x2c08
443 #define STM32F746_PC12_FUNC_UART5_TX 0x2c09
444 #define STM32F746_PC12_FUNC_SDMMC1_CK 0x2c0d
445 #define STM32F746_PC12_FUNC_DCMI_D9 0x2c0e
446 #define STM32F746_PC12_FUNC_EVENTOUT 0x2c10
447 #define STM32F746_PC12_FUNC_ANALOG 0x2c11
448 
449 #define STM32F746_PC13_FUNC_GPIO 0x2d00
450 #define STM32F746_PC13_FUNC_EVENTOUT 0x2d10
451 #define STM32F746_PC13_FUNC_ANALOG 0x2d11
452 
453 #define STM32F746_PC14_FUNC_GPIO 0x2e00
454 #define STM32F746_PC14_FUNC_EVENTOUT 0x2e10
455 #define STM32F746_PC14_FUNC_ANALOG 0x2e11
456 
457 #define STM32F746_PC15_FUNC_GPIO 0x2f00
458 #define STM32F746_PC15_FUNC_EVENTOUT 0x2f10
459 #define STM32F746_PC15_FUNC_ANALOG 0x2f11
460 
461 
462 #define STM32F746_PD0_FUNC_GPIO 0x3000
463 #define STM32F746_PD0_FUNC_CAN1_RX 0x300a
464 #define STM32F746_PD0_FUNC_FMC_D2 0x300d
465 #define STM32F746_PD0_FUNC_EVENTOUT 0x3010
466 #define STM32F746_PD0_FUNC_ANALOG 0x3011
467 
468 #define STM32F746_PD1_FUNC_GPIO 0x3100
469 #define STM32F746_PD1_FUNC_CAN1_TX 0x310a
470 #define STM32F746_PD1_FUNC_FMC_D3 0x310d
471 #define STM32F746_PD1_FUNC_EVENTOUT 0x3110
472 #define STM32F746_PD1_FUNC_ANALOG 0x3111
473 
474 #define STM32F746_PD2_FUNC_GPIO 0x3200
475 #define STM32F746_PD2_FUNC_TRACED2 0x3201
476 #define STM32F746_PD2_FUNC_TIM3_ETR 0x3203
477 #define STM32F746_PD2_FUNC_UART5_RX 0x3209
478 #define STM32F746_PD2_FUNC_SDMMC1_CMD 0x320d
479 #define STM32F746_PD2_FUNC_DCMI_D11 0x320e
480 #define STM32F746_PD2_FUNC_EVENTOUT 0x3210
481 #define STM32F746_PD2_FUNC_ANALOG 0x3211
482 
483 #define STM32F746_PD3_FUNC_GPIO 0x3300
484 #define STM32F746_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306
485 #define STM32F746_PD3_FUNC_USART2_CTS 0x3308
486 #define STM32F746_PD3_FUNC_FMC_CLK 0x330d
487 #define STM32F746_PD3_FUNC_DCMI_D5 0x330e
488 #define STM32F746_PD3_FUNC_LCD_G7 0x330f
489 #define STM32F746_PD3_FUNC_EVENTOUT 0x3310
490 #define STM32F746_PD3_FUNC_ANALOG 0x3311
491 
492 #define STM32F746_PD4_FUNC_GPIO 0x3400
493 #define STM32F746_PD4_FUNC_USART2_RTS 0x3408
494 #define STM32F746_PD4_FUNC_FMC_NOE 0x340d
495 #define STM32F746_PD4_FUNC_EVENTOUT 0x3410
496 #define STM32F746_PD4_FUNC_ANALOG 0x3411
497 
498 #define STM32F746_PD5_FUNC_GPIO 0x3500
499 #define STM32F746_PD5_FUNC_USART2_TX 0x3508
500 #define STM32F746_PD5_FUNC_FMC_NWE 0x350d
501 #define STM32F746_PD5_FUNC_EVENTOUT 0x3510
502 #define STM32F746_PD5_FUNC_ANALOG 0x3511
503 
504 #define STM32F746_PD6_FUNC_GPIO 0x3600
505 #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606
506 #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607
507 #define STM32F746_PD6_FUNC_USART2_RX 0x3608
508 #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d
509 #define STM32F746_PD6_FUNC_DCMI_D10 0x360e
510 #define STM32F746_PD6_FUNC_LCD_B2 0x360f
511 #define STM32F746_PD6_FUNC_EVENTOUT 0x3610
512 #define STM32F746_PD6_FUNC_ANALOG 0x3611
513 
514 #define STM32F746_PD7_FUNC_GPIO 0x3700
515 #define STM32F746_PD7_FUNC_USART2_CK 0x3708
516 #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709
517 #define STM32F746_PD7_FUNC_FMC_NE1 0x370d
518 #define STM32F746_PD7_FUNC_EVENTOUT 0x3710
519 #define STM32F746_PD7_FUNC_ANALOG 0x3711
520 
521 #define STM32F746_PD8_FUNC_GPIO 0x3800
522 #define STM32F746_PD8_FUNC_USART3_TX 0x3808
523 #define STM32F746_PD8_FUNC_SPDIFRX_IN1 0x3809
524 #define STM32F746_PD8_FUNC_FMC_D13 0x380d
525 #define STM32F746_PD8_FUNC_EVENTOUT 0x3810
526 #define STM32F746_PD8_FUNC_ANALOG 0x3811
527 
528 #define STM32F746_PD9_FUNC_GPIO 0x3900
529 #define STM32F746_PD9_FUNC_USART3_RX 0x3908
530 #define STM32F746_PD9_FUNC_FMC_D14 0x390d
531 #define STM32F746_PD9_FUNC_EVENTOUT 0x3910
532 #define STM32F746_PD9_FUNC_ANALOG 0x3911
533 
534 #define STM32F746_PD10_FUNC_GPIO 0x3a00
535 #define STM32F746_PD10_FUNC_USART3_CK 0x3a08
536 #define STM32F746_PD10_FUNC_FMC_D15 0x3a0d
537 #define STM32F746_PD10_FUNC_LCD_B3 0x3a0f
538 #define STM32F746_PD10_FUNC_EVENTOUT 0x3a10
539 #define STM32F746_PD10_FUNC_ANALOG 0x3a11
540 
541 #define STM32F746_PD11_FUNC_GPIO 0x3b00
542 #define STM32F746_PD11_FUNC_I2C4_SMBA 0x3b05
543 #define STM32F746_PD11_FUNC_USART3_CTS 0x3b08
544 #define STM32F746_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a
545 #define STM32F746_PD11_FUNC_SAI2_SD_A 0x3b0b
546 #define STM32F746_PD11_FUNC_FMC_A16_FMC_CLE 0x3b0d
547 #define STM32F746_PD11_FUNC_EVENTOUT 0x3b10
548 #define STM32F746_PD11_FUNC_ANALOG 0x3b11
549 
550 #define STM32F746_PD12_FUNC_GPIO 0x3c00
551 #define STM32F746_PD12_FUNC_TIM4_CH1 0x3c03
552 #define STM32F746_PD12_FUNC_LPTIM1_IN1 0x3c04
553 #define STM32F746_PD12_FUNC_I2C4_SCL 0x3c05
554 #define STM32F746_PD12_FUNC_USART3_RTS 0x3c08
555 #define STM32F746_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a
556 #define STM32F746_PD12_FUNC_SAI2_FS_A 0x3c0b
557 #define STM32F746_PD12_FUNC_FMC_A17_FMC_ALE 0x3c0d
558 #define STM32F746_PD12_FUNC_EVENTOUT 0x3c10
559 #define STM32F746_PD12_FUNC_ANALOG 0x3c11
560 
561 #define STM32F746_PD13_FUNC_GPIO 0x3d00
562 #define STM32F746_PD13_FUNC_TIM4_CH2 0x3d03
563 #define STM32F746_PD13_FUNC_LPTIM1_OUT 0x3d04
564 #define STM32F746_PD13_FUNC_I2C4_SDA 0x3d05
565 #define STM32F746_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a
566 #define STM32F746_PD13_FUNC_SAI2_SCK_A 0x3d0b
567 #define STM32F746_PD13_FUNC_FMC_A18 0x3d0d
568 #define STM32F746_PD13_FUNC_EVENTOUT 0x3d10
569 #define STM32F746_PD13_FUNC_ANALOG 0x3d11
570 
571 #define STM32F746_PD14_FUNC_GPIO 0x3e00
572 #define STM32F746_PD14_FUNC_TIM4_CH3 0x3e03
573 #define STM32F746_PD14_FUNC_UART8_CTS 0x3e09
574 #define STM32F746_PD14_FUNC_FMC_D0 0x3e0d
575 #define STM32F746_PD14_FUNC_EVENTOUT 0x3e10
576 #define STM32F746_PD14_FUNC_ANALOG 0x3e11
577 
578 #define STM32F746_PD15_FUNC_GPIO 0x3f00
579 #define STM32F746_PD15_FUNC_TIM4_CH4 0x3f03
580 #define STM32F746_PD15_FUNC_UART8_RTS 0x3f09
581 #define STM32F746_PD15_FUNC_FMC_D1 0x3f0d
582 #define STM32F746_PD15_FUNC_EVENTOUT 0x3f10
583 #define STM32F746_PD15_FUNC_ANALOG 0x3f11
584 
585 
586 #define STM32F746_PE0_FUNC_GPIO 0x4000
587 #define STM32F746_PE0_FUNC_TIM4_ETR 0x4003
588 #define STM32F746_PE0_FUNC_LPTIM1_ETR 0x4004
589 #define STM32F746_PE0_FUNC_UART8_RX 0x4009
590 #define STM32F746_PE0_FUNC_SAI2_MCLK_A 0x400b
591 #define STM32F746_PE0_FUNC_FMC_NBL0 0x400d
592 #define STM32F746_PE0_FUNC_DCMI_D2 0x400e
593 #define STM32F746_PE0_FUNC_EVENTOUT 0x4010
594 #define STM32F746_PE0_FUNC_ANALOG 0x4011
595 
596 #define STM32F746_PE1_FUNC_GPIO 0x4100
597 #define STM32F746_PE1_FUNC_LPTIM1_IN2 0x4104
598 #define STM32F746_PE1_FUNC_UART8_TX 0x4109
599 #define STM32F746_PE1_FUNC_FMC_NBL1 0x410d
600 #define STM32F746_PE1_FUNC_DCMI_D3 0x410e
601 #define STM32F746_PE1_FUNC_EVENTOUT 0x4110
602 #define STM32F746_PE1_FUNC_ANALOG 0x4111
603 
604 #define STM32F746_PE2_FUNC_GPIO 0x4200
605 #define STM32F746_PE2_FUNC_TRACECLK 0x4201
606 #define STM32F746_PE2_FUNC_SPI4_SCK 0x4206
607 #define STM32F746_PE2_FUNC_SAI1_MCLK_A 0x4207
608 #define STM32F746_PE2_FUNC_QUADSPI_BK1_IO2 0x420a
609 #define STM32F746_PE2_FUNC_ETH_MII_TXD3 0x420c
610 #define STM32F746_PE2_FUNC_FMC_A23 0x420d
611 #define STM32F746_PE2_FUNC_EVENTOUT 0x4210
612 #define STM32F746_PE2_FUNC_ANALOG 0x4211
613 
614 #define STM32F746_PE3_FUNC_GPIO 0x4300
615 #define STM32F746_PE3_FUNC_TRACED0 0x4301
616 #define STM32F746_PE3_FUNC_SAI1_SD_B 0x4307
617 #define STM32F746_PE3_FUNC_FMC_A19 0x430d
618 #define STM32F746_PE3_FUNC_EVENTOUT 0x4310
619 #define STM32F746_PE3_FUNC_ANALOG 0x4311
620 
621 #define STM32F746_PE4_FUNC_GPIO 0x4400
622 #define STM32F746_PE4_FUNC_TRACED1 0x4401
623 #define STM32F746_PE4_FUNC_SPI4_NSS 0x4406
624 #define STM32F746_PE4_FUNC_SAI1_FS_A 0x4407
625 #define STM32F746_PE4_FUNC_FMC_A20 0x440d
626 #define STM32F746_PE4_FUNC_DCMI_D4 0x440e
627 #define STM32F746_PE4_FUNC_LCD_B0 0x440f
628 #define STM32F746_PE4_FUNC_EVENTOUT 0x4410
629 #define STM32F746_PE4_FUNC_ANALOG 0x4411
630 
631 #define STM32F746_PE5_FUNC_GPIO 0x4500
632 #define STM32F746_PE5_FUNC_TRACED2 0x4501
633 #define STM32F746_PE5_FUNC_TIM9_CH1 0x4504
634 #define STM32F746_PE5_FUNC_SPI4_MISO 0x4506
635 #define STM32F746_PE5_FUNC_SAI1_SCK_A 0x4507
636 #define STM32F746_PE5_FUNC_FMC_A21 0x450d
637 #define STM32F746_PE5_FUNC_DCMI_D6 0x450e
638 #define STM32F746_PE5_FUNC_LCD_G0 0x450f
639 #define STM32F746_PE5_FUNC_EVENTOUT 0x4510
640 #define STM32F746_PE5_FUNC_ANALOG 0x4511
641 
642 #define STM32F746_PE6_FUNC_GPIO 0x4600
643 #define STM32F746_PE6_FUNC_TRACED3 0x4601
644 #define STM32F746_PE6_FUNC_TIM1_BKIN2 0x4602
645 #define STM32F746_PE6_FUNC_TIM9_CH2 0x4604
646 #define STM32F746_PE6_FUNC_SPI4_MOSI 0x4606
647 #define STM32F746_PE6_FUNC_SAI1_SD_A 0x4607
648 #define STM32F746_PE6_FUNC_SAI2_MCLK_B 0x460b
649 #define STM32F746_PE6_FUNC_FMC_A22 0x460d
650 #define STM32F746_PE6_FUNC_DCMI_D7 0x460e
651 #define STM32F746_PE6_FUNC_LCD_G1 0x460f
652 #define STM32F746_PE6_FUNC_EVENTOUT 0x4610
653 #define STM32F746_PE6_FUNC_ANALOG 0x4611
654 
655 #define STM32F746_PE7_FUNC_GPIO 0x4700
656 #define STM32F746_PE7_FUNC_TIM1_ETR 0x4702
657 #define STM32F746_PE7_FUNC_UART7_RX 0x4709
658 #define STM32F746_PE7_FUNC_QUADSPI_BK2_IO0 0x470b
659 #define STM32F746_PE7_FUNC_FMC_D4 0x470d
660 #define STM32F746_PE7_FUNC_EVENTOUT 0x4710
661 #define STM32F746_PE7_FUNC_ANALOG 0x4711
662 
663 #define STM32F746_PE8_FUNC_GPIO 0x4800
664 #define STM32F746_PE8_FUNC_TIM1_CH1N 0x4802
665 #define STM32F746_PE8_FUNC_UART7_TX 0x4809
666 #define STM32F746_PE8_FUNC_QUADSPI_BK2_IO1 0x480b
667 #define STM32F746_PE8_FUNC_FMC_D5 0x480d
668 #define STM32F746_PE8_FUNC_EVENTOUT 0x4810
669 #define STM32F746_PE8_FUNC_ANALOG 0x4811
670 
671 #define STM32F746_PE9_FUNC_GPIO 0x4900
672 #define STM32F746_PE9_FUNC_TIM1_CH1 0x4902
673 #define STM32F746_PE9_FUNC_UART7_RTS 0x4909
674 #define STM32F746_PE9_FUNC_QUADSPI_BK2_IO2 0x490b
675 #define STM32F746_PE9_FUNC_FMC_D6 0x490d
676 #define STM32F746_PE9_FUNC_EVENTOUT 0x4910
677 #define STM32F746_PE9_FUNC_ANALOG 0x4911
678 
679 #define STM32F746_PE10_FUNC_GPIO 0x4a00
680 #define STM32F746_PE10_FUNC_TIM1_CH2N 0x4a02
681 #define STM32F746_PE10_FUNC_UART7_CTS 0x4a09
682 #define STM32F746_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b
683 #define STM32F746_PE10_FUNC_FMC_D7 0x4a0d
684 #define STM32F746_PE10_FUNC_EVENTOUT 0x4a10
685 #define STM32F746_PE10_FUNC_ANALOG 0x4a11
686 
687 #define STM32F746_PE11_FUNC_GPIO 0x4b00
688 #define STM32F746_PE11_FUNC_TIM1_CH2 0x4b02
689 #define STM32F746_PE11_FUNC_SPI4_NSS 0x4b06
690 #define STM32F746_PE11_FUNC_SAI2_SD_B 0x4b0b
691 #define STM32F746_PE11_FUNC_FMC_D8 0x4b0d
692 #define STM32F746_PE11_FUNC_LCD_G3 0x4b0f
693 #define STM32F746_PE11_FUNC_EVENTOUT 0x4b10
694 #define STM32F746_PE11_FUNC_ANALOG 0x4b11
695 
696 #define STM32F746_PE12_FUNC_GPIO 0x4c00
697 #define STM32F746_PE12_FUNC_TIM1_CH3N 0x4c02
698 #define STM32F746_PE12_FUNC_SPI4_SCK 0x4c06
699 #define STM32F746_PE12_FUNC_SAI2_SCK_B 0x4c0b
700 #define STM32F746_PE12_FUNC_FMC_D9 0x4c0d
701 #define STM32F746_PE12_FUNC_LCD_B4 0x4c0f
702 #define STM32F746_PE12_FUNC_EVENTOUT 0x4c10
703 #define STM32F746_PE12_FUNC_ANALOG 0x4c11
704 
705 #define STM32F746_PE13_FUNC_GPIO 0x4d00
706 #define STM32F746_PE13_FUNC_TIM1_CH3 0x4d02
707 #define STM32F746_PE13_FUNC_SPI4_MISO 0x4d06
708 #define STM32F746_PE13_FUNC_SAI2_FS_B 0x4d0b
709 #define STM32F746_PE13_FUNC_FMC_D10 0x4d0d
710 #define STM32F746_PE13_FUNC_LCD_DE 0x4d0f
711 #define STM32F746_PE13_FUNC_EVENTOUT 0x4d10
712 #define STM32F746_PE13_FUNC_ANALOG 0x4d11
713 
714 #define STM32F746_PE14_FUNC_GPIO 0x4e00
715 #define STM32F746_PE14_FUNC_TIM1_CH4 0x4e02
716 #define STM32F746_PE14_FUNC_SPI4_MOSI 0x4e06
717 #define STM32F746_PE14_FUNC_SAI2_MCLK_B 0x4e0b
718 #define STM32F746_PE14_FUNC_FMC_D11 0x4e0d
719 #define STM32F746_PE14_FUNC_LCD_CLK 0x4e0f
720 #define STM32F746_PE14_FUNC_EVENTOUT 0x4e10
721 #define STM32F746_PE14_FUNC_ANALOG 0x4e11
722 
723 #define STM32F746_PE15_FUNC_GPIO 0x4f00
724 #define STM32F746_PE15_FUNC_TIM1_BKIN 0x4f02
725 #define STM32F746_PE15_FUNC_FMC_D12 0x4f0d
726 #define STM32F746_PE15_FUNC_LCD_R7 0x4f0f
727 #define STM32F746_PE15_FUNC_EVENTOUT 0x4f10
728 #define STM32F746_PE15_FUNC_ANALOG 0x4f11
729 
730 
731 #define STM32F746_PF0_FUNC_GPIO 0x5000
732 #define STM32F746_PF0_FUNC_I2C2_SDA 0x5005
733 #define STM32F746_PF0_FUNC_FMC_A0 0x500d
734 #define STM32F746_PF0_FUNC_EVENTOUT 0x5010
735 #define STM32F746_PF0_FUNC_ANALOG 0x5011
736 
737 #define STM32F746_PF1_FUNC_GPIO 0x5100
738 #define STM32F746_PF1_FUNC_I2C2_SCL 0x5105
739 #define STM32F746_PF1_FUNC_FMC_A1 0x510d
740 #define STM32F746_PF1_FUNC_EVENTOUT 0x5110
741 #define STM32F746_PF1_FUNC_ANALOG 0x5111
742 
743 #define STM32F746_PF2_FUNC_GPIO 0x5200
744 #define STM32F746_PF2_FUNC_I2C2_SMBA 0x5205
745 #define STM32F746_PF2_FUNC_FMC_A2 0x520d
746 #define STM32F746_PF2_FUNC_EVENTOUT 0x5210
747 #define STM32F746_PF2_FUNC_ANALOG 0x5211
748 
749 #define STM32F746_PF3_FUNC_GPIO 0x5300
750 #define STM32F746_PF3_FUNC_FMC_A3 0x530d
751 #define STM32F746_PF3_FUNC_EVENTOUT 0x5310
752 #define STM32F746_PF3_FUNC_ANALOG 0x5311
753 
754 #define STM32F746_PF4_FUNC_GPIO 0x5400
755 #define STM32F746_PF4_FUNC_FMC_A4 0x540d
756 #define STM32F746_PF4_FUNC_EVENTOUT 0x5410
757 #define STM32F746_PF4_FUNC_ANALOG 0x5411
758 
759 #define STM32F746_PF5_FUNC_GPIO 0x5500
760 #define STM32F746_PF5_FUNC_FMC_A5 0x550d
761 #define STM32F746_PF5_FUNC_EVENTOUT 0x5510
762 #define STM32F746_PF5_FUNC_ANALOG 0x5511
763 
764 #define STM32F746_PF6_FUNC_GPIO 0x5600
765 #define STM32F746_PF6_FUNC_TIM10_CH1 0x5604
766 #define STM32F746_PF6_FUNC_SPI5_NSS 0x5606
767 #define STM32F746_PF6_FUNC_SAI1_SD_B 0x5607
768 #define STM32F746_PF6_FUNC_UART7_RX 0x5609
769 #define STM32F746_PF6_FUNC_QUADSPI_BK1_IO3 0x560a
770 #define STM32F746_PF6_FUNC_EVENTOUT 0x5610
771 #define STM32F746_PF6_FUNC_ANALOG 0x5611
772 
773 #define STM32F746_PF7_FUNC_GPIO 0x5700
774 #define STM32F746_PF7_FUNC_TIM11_CH1 0x5704
775 #define STM32F746_PF7_FUNC_SPI5_SCK 0x5706
776 #define STM32F746_PF7_FUNC_SAI1_MCLK_B 0x5707
777 #define STM32F746_PF7_FUNC_UART7_TX 0x5709
778 #define STM32F746_PF7_FUNC_QUADSPI_BK1_IO2 0x570a
779 #define STM32F746_PF7_FUNC_EVENTOUT 0x5710
780 #define STM32F746_PF7_FUNC_ANALOG 0x5711
781 
782 #define STM32F746_PF8_FUNC_GPIO 0x5800
783 #define STM32F746_PF8_FUNC_SPI5_MISO 0x5806
784 #define STM32F746_PF8_FUNC_SAI1_SCK_B 0x5807
785 #define STM32F746_PF8_FUNC_UART7_RTS 0x5809
786 #define STM32F746_PF8_FUNC_TIM13_CH1 0x580a
787 #define STM32F746_PF8_FUNC_QUADSPI_BK1_IO0 0x580b
788 #define STM32F746_PF8_FUNC_EVENTOUT 0x5810
789 #define STM32F746_PF8_FUNC_ANALOG 0x5811
790 
791 #define STM32F746_PF9_FUNC_GPIO 0x5900
792 #define STM32F746_PF9_FUNC_SPI5_MOSI 0x5906
793 #define STM32F746_PF9_FUNC_SAI1_FS_B 0x5907
794 #define STM32F746_PF9_FUNC_UART7_CTS 0x5909
795 #define STM32F746_PF9_FUNC_TIM14_CH1 0x590a
796 #define STM32F746_PF9_FUNC_QUADSPI_BK1_IO1 0x590b
797 #define STM32F746_PF9_FUNC_EVENTOUT 0x5910
798 #define STM32F746_PF9_FUNC_ANALOG 0x5911
799 
800 #define STM32F746_PF10_FUNC_GPIO 0x5a00
801 #define STM32F746_PF10_FUNC_DCMI_D11 0x5a0e
802 #define STM32F746_PF10_FUNC_LCD_DE 0x5a0f
803 #define STM32F746_PF10_FUNC_EVENTOUT 0x5a10
804 #define STM32F746_PF10_FUNC_ANALOG 0x5a11
805 
806 #define STM32F746_PF11_FUNC_GPIO 0x5b00
807 #define STM32F746_PF11_FUNC_SPI5_MOSI 0x5b06
808 #define STM32F746_PF11_FUNC_SAI2_SD_B 0x5b0b
809 #define STM32F746_PF11_FUNC_FMC_SDNRAS 0x5b0d
810 #define STM32F746_PF11_FUNC_DCMI_D12 0x5b0e
811 #define STM32F746_PF11_FUNC_EVENTOUT 0x5b10
812 #define STM32F746_PF11_FUNC_ANALOG 0x5b11
813 
814 #define STM32F746_PF12_FUNC_GPIO 0x5c00
815 #define STM32F746_PF12_FUNC_FMC_A6 0x5c0d
816 #define STM32F746_PF12_FUNC_EVENTOUT 0x5c10
817 #define STM32F746_PF12_FUNC_ANALOG 0x5c11
818 
819 #define STM32F746_PF13_FUNC_GPIO 0x5d00
820 #define STM32F746_PF13_FUNC_I2C4_SMBA 0x5d05
821 #define STM32F746_PF13_FUNC_FMC_A7 0x5d0d
822 #define STM32F746_PF13_FUNC_EVENTOUT 0x5d10
823 #define STM32F746_PF13_FUNC_ANALOG 0x5d11
824 
825 #define STM32F746_PF14_FUNC_GPIO 0x5e00
826 #define STM32F746_PF14_FUNC_I2C4_SCL 0x5e05
827 #define STM32F746_PF14_FUNC_FMC_A8 0x5e0d
828 #define STM32F746_PF14_FUNC_EVENTOUT 0x5e10
829 #define STM32F746_PF14_FUNC_ANALOG 0x5e11
830 
831 #define STM32F746_PF15_FUNC_GPIO 0x5f00
832 #define STM32F746_PF15_FUNC_I2C4_SDA 0x5f05
833 #define STM32F746_PF15_FUNC_FMC_A9 0x5f0d
834 #define STM32F746_PF15_FUNC_EVENTOUT 0x5f10
835 #define STM32F746_PF15_FUNC_ANALOG 0x5f11
836 
837 
838 #define STM32F746_PG0_FUNC_GPIO 0x6000
839 #define STM32F746_PG0_FUNC_FMC_A10 0x600d
840 #define STM32F746_PG0_FUNC_EVENTOUT 0x6010
841 #define STM32F746_PG0_FUNC_ANALOG 0x6011
842 
843 #define STM32F746_PG1_FUNC_GPIO 0x6100
844 #define STM32F746_PG1_FUNC_FMC_A11 0x610d
845 #define STM32F746_PG1_FUNC_EVENTOUT 0x6110
846 #define STM32F746_PG1_FUNC_ANALOG 0x6111
847 
848 #define STM32F746_PG2_FUNC_GPIO 0x6200
849 #define STM32F746_PG2_FUNC_FMC_A12 0x620d
850 #define STM32F746_PG2_FUNC_EVENTOUT 0x6210
851 #define STM32F746_PG2_FUNC_ANALOG 0x6211
852 
853 #define STM32F746_PG3_FUNC_GPIO 0x6300
854 #define STM32F746_PG3_FUNC_FMC_A13 0x630d
855 #define STM32F746_PG3_FUNC_EVENTOUT 0x6310
856 #define STM32F746_PG3_FUNC_ANALOG 0x6311
857 
858 #define STM32F746_PG4_FUNC_GPIO 0x6400
859 #define STM32F746_PG4_FUNC_FMC_A14_FMC_BA0 0x640d
860 #define STM32F746_PG4_FUNC_EVENTOUT 0x6410
861 #define STM32F746_PG4_FUNC_ANALOG 0x6411
862 
863 #define STM32F746_PG5_FUNC_GPIO 0x6500
864 #define STM32F746_PG5_FUNC_FMC_A15_FMC_BA1 0x650d
865 #define STM32F746_PG5_FUNC_EVENTOUT 0x6510
866 #define STM32F746_PG5_FUNC_ANALOG 0x6511
867 
868 #define STM32F746_PG6_FUNC_GPIO 0x6600
869 #define STM32F746_PG6_FUNC_DCMI_D12 0x660e
870 #define STM32F746_PG6_FUNC_LCD_R7 0x660f
871 #define STM32F746_PG6_FUNC_EVENTOUT 0x6610
872 #define STM32F746_PG6_FUNC_ANALOG 0x6611
873 
874 #define STM32F746_PG7_FUNC_GPIO 0x6700
875 #define STM32F746_PG7_FUNC_USART6_CK 0x6709
876 #define STM32F746_PG7_FUNC_FMC_INT 0x670d
877 #define STM32F746_PG7_FUNC_DCMI_D13 0x670e
878 #define STM32F746_PG7_FUNC_LCD_CLK 0x670f
879 #define STM32F746_PG7_FUNC_EVENTOUT 0x6710
880 #define STM32F746_PG7_FUNC_ANALOG 0x6711
881 
882 #define STM32F746_PG8_FUNC_GPIO 0x6800
883 #define STM32F746_PG8_FUNC_SPI6_NSS 0x6806
884 #define STM32F746_PG8_FUNC_SPDIFRX_IN2 0x6808
885 #define STM32F746_PG8_FUNC_USART6_RTS 0x6809
886 #define STM32F746_PG8_FUNC_ETH_PPS_OUT 0x680c
887 #define STM32F746_PG8_FUNC_FMC_SDCLK 0x680d
888 #define STM32F746_PG8_FUNC_EVENTOUT 0x6810
889 #define STM32F746_PG8_FUNC_ANALOG 0x6811
890 
891 #define STM32F746_PG9_FUNC_GPIO 0x6900
892 #define STM32F746_PG9_FUNC_SPDIFRX_IN3 0x6908
893 #define STM32F746_PG9_FUNC_USART6_RX 0x6909
894 #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a
895 #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b
896 #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d
897 #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e
898 #define STM32F746_PG9_FUNC_EVENTOUT 0x6910
899 #define STM32F746_PG9_FUNC_ANALOG 0x6911
900 
901 #define STM32F746_PG10_FUNC_GPIO 0x6a00
902 #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a
903 #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b
904 #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d
905 #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e
906 #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f
907 #define STM32F746_PG10_FUNC_EVENTOUT 0x6a10
908 #define STM32F746_PG10_FUNC_ANALOG 0x6a11
909 
910 #define STM32F746_PG11_FUNC_GPIO 0x6b00
911 #define STM32F746_PG11_FUNC_SPDIFRX_IN0 0x6b08
912 #define STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c
913 #define STM32F746_PG11_FUNC_DCMI_D3 0x6b0e
914 #define STM32F746_PG11_FUNC_LCD_B3 0x6b0f
915 #define STM32F746_PG11_FUNC_EVENTOUT 0x6b10
916 #define STM32F746_PG11_FUNC_ANALOG 0x6b11
917 
918 #define STM32F746_PG12_FUNC_GPIO 0x6c00
919 #define STM32F746_PG12_FUNC_LPTIM1_IN1 0x6c04
920 #define STM32F746_PG12_FUNC_SPI6_MISO 0x6c06
921 #define STM32F746_PG12_FUNC_SPDIFRX_IN1 0x6c08
922 #define STM32F746_PG12_FUNC_USART6_RTS 0x6c09
923 #define STM32F746_PG12_FUNC_LCD_B4 0x6c0a
924 #define STM32F746_PG12_FUNC_FMC_NE4 0x6c0d
925 #define STM32F746_PG12_FUNC_LCD_B1 0x6c0f
926 #define STM32F746_PG12_FUNC_EVENTOUT 0x6c10
927 #define STM32F746_PG12_FUNC_ANALOG 0x6c11
928 
929 #define STM32F746_PG13_FUNC_GPIO 0x6d00
930 #define STM32F746_PG13_FUNC_TRACED0 0x6d01
931 #define STM32F746_PG13_FUNC_LPTIM1_OUT 0x6d04
932 #define STM32F746_PG13_FUNC_SPI6_SCK 0x6d06
933 #define STM32F746_PG13_FUNC_USART6_CTS 0x6d09
934 #define STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c
935 #define STM32F746_PG13_FUNC_FMC_A24 0x6d0d
936 #define STM32F746_PG13_FUNC_LCD_R0 0x6d0f
937 #define STM32F746_PG13_FUNC_EVENTOUT 0x6d10
938 #define STM32F746_PG13_FUNC_ANALOG 0x6d11
939 
940 #define STM32F746_PG14_FUNC_GPIO 0x6e00
941 #define STM32F746_PG14_FUNC_TRACED1 0x6e01
942 #define STM32F746_PG14_FUNC_LPTIM1_ETR 0x6e04
943 #define STM32F746_PG14_FUNC_SPI6_MOSI 0x6e06
944 #define STM32F746_PG14_FUNC_USART6_TX 0x6e09
945 #define STM32F746_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a
946 #define STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c
947 #define STM32F746_PG14_FUNC_FMC_A25 0x6e0d
948 #define STM32F746_PG14_FUNC_LCD_B0 0x6e0f
949 #define STM32F746_PG14_FUNC_EVENTOUT 0x6e10
950 #define STM32F746_PG14_FUNC_ANALOG 0x6e11
951 
952 #define STM32F746_PG15_FUNC_GPIO 0x6f00
953 #define STM32F746_PG15_FUNC_USART6_CTS 0x6f09
954 #define STM32F746_PG15_FUNC_FMC_SDNCAS 0x6f0d
955 #define STM32F746_PG15_FUNC_DCMI_D13 0x6f0e
956 #define STM32F746_PG15_FUNC_EVENTOUT 0x6f10
957 #define STM32F746_PG15_FUNC_ANALOG 0x6f11
958 
959 
960 #define STM32F746_PH0_FUNC_GPIO 0x7000
961 #define STM32F746_PH0_FUNC_EVENTOUT 0x7010
962 #define STM32F746_PH0_FUNC_ANALOG 0x7011
963 
964 #define STM32F746_PH1_FUNC_GPIO 0x7100
965 #define STM32F746_PH1_FUNC_EVENTOUT 0x7110
966 #define STM32F746_PH1_FUNC_ANALOG 0x7111
967 
968 #define STM32F746_PH2_FUNC_GPIO 0x7200
969 #define STM32F746_PH2_FUNC_LPTIM1_IN2 0x7204
970 #define STM32F746_PH2_FUNC_QUADSPI_BK2_IO0 0x720a
971 #define STM32F746_PH2_FUNC_SAI2_SCK_B 0x720b
972 #define STM32F746_PH2_FUNC_ETH_MII_CRS 0x720c
973 #define STM32F746_PH2_FUNC_FMC_SDCKE0 0x720d
974 #define STM32F746_PH2_FUNC_LCD_R0 0x720f
975 #define STM32F746_PH2_FUNC_EVENTOUT 0x7210
976 #define STM32F746_PH2_FUNC_ANALOG 0x7211
977 
978 #define STM32F746_PH3_FUNC_GPIO 0x7300
979 #define STM32F746_PH3_FUNC_QUADSPI_BK2_IO1 0x730a
980 #define STM32F746_PH3_FUNC_SAI2_MCLK_B 0x730b
981 #define STM32F746_PH3_FUNC_ETH_MII_COL 0x730c
982 #define STM32F746_PH3_FUNC_FMC_SDNE0 0x730d
983 #define STM32F746_PH3_FUNC_LCD_R1 0x730f
984 #define STM32F746_PH3_FUNC_EVENTOUT 0x7310
985 #define STM32F746_PH3_FUNC_ANALOG 0x7311
986 
987 #define STM32F746_PH4_FUNC_GPIO 0x7400
988 #define STM32F746_PH4_FUNC_I2C2_SCL 0x7405
989 #define STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b
990 #define STM32F746_PH4_FUNC_EVENTOUT 0x7410
991 #define STM32F746_PH4_FUNC_ANALOG 0x7411
992 
993 #define STM32F746_PH5_FUNC_GPIO 0x7500
994 #define STM32F746_PH5_FUNC_I2C2_SDA 0x7505
995 #define STM32F746_PH5_FUNC_SPI5_NSS 0x7506
996 #define STM32F746_PH5_FUNC_FMC_SDNWE 0x750d
997 #define STM32F746_PH5_FUNC_EVENTOUT 0x7510
998 #define STM32F746_PH5_FUNC_ANALOG 0x7511
999 
1000 #define STM32F746_PH6_FUNC_GPIO 0x7600
1001 #define STM32F746_PH6_FUNC_I2C2_SMBA 0x7605
1002 #define STM32F746_PH6_FUNC_SPI5_SCK 0x7606
1003 #define STM32F746_PH6_FUNC_TIM12_CH1 0x760a
1004 #define STM32F746_PH6_FUNC_ETH_MII_RXD2 0x760c
1005 #define STM32F746_PH6_FUNC_FMC_SDNE1 0x760d
1006 #define STM32F746_PH6_FUNC_DCMI_D8 0x760e
1007 #define STM32F746_PH6_FUNC_EVENTOUT 0x7610
1008 #define STM32F746_PH6_FUNC_ANALOG 0x7611
1009 
1010 #define STM32F746_PH7_FUNC_GPIO 0x7700
1011 #define STM32F746_PH7_FUNC_I2C3_SCL 0x7705
1012 #define STM32F746_PH7_FUNC_SPI5_MISO 0x7706
1013 #define STM32F746_PH7_FUNC_ETH_MII_RXD3 0x770c
1014 #define STM32F746_PH7_FUNC_FMC_SDCKE1 0x770d
1015 #define STM32F746_PH7_FUNC_DCMI_D9 0x770e
1016 #define STM32F746_PH7_FUNC_EVENTOUT 0x7710
1017 #define STM32F746_PH7_FUNC_ANALOG 0x7711
1018 
1019 #define STM32F746_PH8_FUNC_GPIO 0x7800
1020 #define STM32F746_PH8_FUNC_I2C3_SDA 0x7805
1021 #define STM32F746_PH8_FUNC_FMC_D16 0x780d
1022 #define STM32F746_PH8_FUNC_DCMI_HSYNC 0x780e
1023 #define STM32F746_PH8_FUNC_LCD_R2 0x780f
1024 #define STM32F746_PH8_FUNC_EVENTOUT 0x7810
1025 #define STM32F746_PH8_FUNC_ANALOG 0x7811
1026 
1027 #define STM32F746_PH9_FUNC_GPIO 0x7900
1028 #define STM32F746_PH9_FUNC_I2C3_SMBA 0x7905
1029 #define STM32F746_PH9_FUNC_TIM12_CH2 0x790a
1030 #define STM32F746_PH9_FUNC_FMC_D17 0x790d
1031 #define STM32F746_PH9_FUNC_DCMI_D0 0x790e
1032 #define STM32F746_PH9_FUNC_LCD_R3 0x790f
1033 #define STM32F746_PH9_FUNC_EVENTOUT 0x7910
1034 #define STM32F746_PH9_FUNC_ANALOG 0x7911
1035 
1036 #define STM32F746_PH10_FUNC_GPIO 0x7a00
1037 #define STM32F746_PH10_FUNC_TIM5_CH1 0x7a03
1038 #define STM32F746_PH10_FUNC_I2C4_SMBA 0x7a05
1039 #define STM32F746_PH10_FUNC_FMC_D18 0x7a0d
1040 #define STM32F746_PH10_FUNC_DCMI_D1 0x7a0e
1041 #define STM32F746_PH10_FUNC_LCD_R4 0x7a0f
1042 #define STM32F746_PH10_FUNC_EVENTOUT 0x7a10
1043 #define STM32F746_PH10_FUNC_ANALOG 0x7a11
1044 
1045 #define STM32F746_PH11_FUNC_GPIO 0x7b00
1046 #define STM32F746_PH11_FUNC_TIM5_CH2 0x7b03
1047 #define STM32F746_PH11_FUNC_I2C4_SCL 0x7b05
1048 #define STM32F746_PH11_FUNC_FMC_D19 0x7b0d
1049 #define STM32F746_PH11_FUNC_DCMI_D2 0x7b0e
1050 #define STM32F746_PH11_FUNC_LCD_R5 0x7b0f
1051 #define STM32F746_PH11_FUNC_EVENTOUT 0x7b10
1052 #define STM32F746_PH11_FUNC_ANALOG 0x7b11
1053 
1054 #define STM32F746_PH12_FUNC_GPIO 0x7c00
1055 #define STM32F746_PH12_FUNC_TIM5_CH3 0x7c03
1056 #define STM32F746_PH12_FUNC_I2C4_SDA 0x7c05
1057 #define STM32F746_PH12_FUNC_FMC_D20 0x7c0d
1058 #define STM32F746_PH12_FUNC_DCMI_D3 0x7c0e
1059 #define STM32F746_PH12_FUNC_LCD_R6 0x7c0f
1060 #define STM32F746_PH12_FUNC_EVENTOUT 0x7c10
1061 #define STM32F746_PH12_FUNC_ANALOG 0x7c11
1062 
1063 #define STM32F746_PH13_FUNC_GPIO 0x7d00
1064 #define STM32F746_PH13_FUNC_TIM8_CH1N 0x7d04
1065 #define STM32F746_PH13_FUNC_CAN1_TX 0x7d0a
1066 #define STM32F746_PH13_FUNC_FMC_D21 0x7d0d
1067 #define STM32F746_PH13_FUNC_LCD_G2 0x7d0f
1068 #define STM32F746_PH13_FUNC_EVENTOUT 0x7d10
1069 #define STM32F746_PH13_FUNC_ANALOG 0x7d11
1070 
1071 #define STM32F746_PH14_FUNC_GPIO 0x7e00
1072 #define STM32F746_PH14_FUNC_TIM8_CH2N 0x7e04
1073 #define STM32F746_PH14_FUNC_FMC_D22 0x7e0d
1074 #define STM32F746_PH14_FUNC_DCMI_D4 0x7e0e
1075 #define STM32F746_PH14_FUNC_LCD_G3 0x7e0f
1076 #define STM32F746_PH14_FUNC_EVENTOUT 0x7e10
1077 #define STM32F746_PH14_FUNC_ANALOG 0x7e11
1078 
1079 #define STM32F746_PH15_FUNC_GPIO 0x7f00
1080 #define STM32F746_PH15_FUNC_TIM8_CH3N 0x7f04
1081 #define STM32F746_PH15_FUNC_FMC_D23 0x7f0d
1082 #define STM32F746_PH15_FUNC_DCMI_D11 0x7f0e
1083 #define STM32F746_PH15_FUNC_LCD_G4 0x7f0f
1084 #define STM32F746_PH15_FUNC_EVENTOUT 0x7f10
1085 #define STM32F746_PH15_FUNC_ANALOG 0x7f11
1086 
1087 
1088 #define STM32F746_PI0_FUNC_GPIO 0x8000
1089 #define STM32F746_PI0_FUNC_TIM5_CH4 0x8003
1090 #define STM32F746_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006
1091 #define STM32F746_PI0_FUNC_FMC_D24 0x800d
1092 #define STM32F746_PI0_FUNC_DCMI_D13 0x800e
1093 #define STM32F746_PI0_FUNC_LCD_G5 0x800f
1094 #define STM32F746_PI0_FUNC_EVENTOUT 0x8010
1095 #define STM32F746_PI0_FUNC_ANALOG 0x8011
1096 
1097 #define STM32F746_PI1_FUNC_GPIO 0x8100
1098 #define STM32F746_PI1_FUNC_TIM8_BKIN2 0x8104
1099 #define STM32F746_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106
1100 #define STM32F746_PI1_FUNC_FMC_D25 0x810d
1101 #define STM32F746_PI1_FUNC_DCMI_D8 0x810e
1102 #define STM32F746_PI1_FUNC_LCD_G6 0x810f
1103 #define STM32F746_PI1_FUNC_EVENTOUT 0x8110
1104 #define STM32F746_PI1_FUNC_ANALOG 0x8111
1105 
1106 #define STM32F746_PI2_FUNC_GPIO 0x8200
1107 #define STM32F746_PI2_FUNC_TIM8_CH4 0x8204
1108 #define STM32F746_PI2_FUNC_SPI2_MISO 0x8206
1109 #define STM32F746_PI2_FUNC_FMC_D26 0x820d
1110 #define STM32F746_PI2_FUNC_DCMI_D9 0x820e
1111 #define STM32F746_PI2_FUNC_LCD_G7 0x820f
1112 #define STM32F746_PI2_FUNC_EVENTOUT 0x8210
1113 #define STM32F746_PI2_FUNC_ANALOG 0x8211
1114 
1115 #define STM32F746_PI3_FUNC_GPIO 0x8300
1116 #define STM32F746_PI3_FUNC_TIM8_ETR 0x8304
1117 #define STM32F746_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306
1118 #define STM32F746_PI3_FUNC_FMC_D27 0x830d
1119 #define STM32F746_PI3_FUNC_DCMI_D10 0x830e
1120 #define STM32F746_PI3_FUNC_EVENTOUT 0x8310
1121 #define STM32F746_PI3_FUNC_ANALOG 0x8311
1122 
1123 #define STM32F746_PI4_FUNC_GPIO 0x8400
1124 #define STM32F746_PI4_FUNC_TIM8_BKIN 0x8404
1125 #define STM32F746_PI4_FUNC_SAI2_MCLK_A 0x840b
1126 #define STM32F746_PI4_FUNC_FMC_NBL2 0x840d
1127 #define STM32F746_PI4_FUNC_DCMI_D5 0x840e
1128 #define STM32F746_PI4_FUNC_LCD_B4 0x840f
1129 #define STM32F746_PI4_FUNC_EVENTOUT 0x8410
1130 #define STM32F746_PI4_FUNC_ANALOG 0x8411
1131 
1132 #define STM32F746_PI5_FUNC_GPIO 0x8500
1133 #define STM32F746_PI5_FUNC_TIM8_CH1 0x8504
1134 #define STM32F746_PI5_FUNC_SAI2_SCK_A 0x850b
1135 #define STM32F746_PI5_FUNC_FMC_NBL3 0x850d
1136 #define STM32F746_PI5_FUNC_DCMI_VSYNC 0x850e
1137 #define STM32F746_PI5_FUNC_LCD_B5 0x850f
1138 #define STM32F746_PI5_FUNC_EVENTOUT 0x8510
1139 #define STM32F746_PI5_FUNC_ANALOG 0x8511
1140 
1141 #define STM32F746_PI6_FUNC_GPIO 0x8600
1142 #define STM32F746_PI6_FUNC_TIM8_CH2 0x8604
1143 #define STM32F746_PI6_FUNC_SAI2_SD_A 0x860b
1144 #define STM32F746_PI6_FUNC_FMC_D28 0x860d
1145 #define STM32F746_PI6_FUNC_DCMI_D6 0x860e
1146 #define STM32F746_PI6_FUNC_LCD_B6 0x860f
1147 #define STM32F746_PI6_FUNC_EVENTOUT 0x8610
1148 #define STM32F746_PI6_FUNC_ANALOG 0x8611
1149 
1150 #define STM32F746_PI7_FUNC_GPIO 0x8700
1151 #define STM32F746_PI7_FUNC_TIM8_CH3 0x8704
1152 #define STM32F746_PI7_FUNC_SAI2_FS_A 0x870b
1153 #define STM32F746_PI7_FUNC_FMC_D29 0x870d
1154 #define STM32F746_PI7_FUNC_DCMI_D7 0x870e
1155 #define STM32F746_PI7_FUNC_LCD_B7 0x870f
1156 #define STM32F746_PI7_FUNC_EVENTOUT 0x8710
1157 #define STM32F746_PI7_FUNC_ANALOG 0x8711
1158 
1159 #define STM32F746_PI8_FUNC_GPIO 0x8800
1160 #define STM32F746_PI8_FUNC_EVENTOUT 0x8810
1161 #define STM32F746_PI8_FUNC_ANALOG 0x8811
1162 
1163 #define STM32F746_PI9_FUNC_GPIO 0x8900
1164 #define STM32F746_PI9_FUNC_CAN1_RX 0x890a
1165 #define STM32F746_PI9_FUNC_FMC_D30 0x890d
1166 #define STM32F746_PI9_FUNC_LCD_VSYNC 0x890f
1167 #define STM32F746_PI9_FUNC_EVENTOUT 0x8910
1168 #define STM32F746_PI9_FUNC_ANALOG 0x8911
1169 
1170 #define STM32F746_PI10_FUNC_GPIO 0x8a00
1171 #define STM32F746_PI10_FUNC_ETH_MII_RX_ER 0x8a0c
1172 #define STM32F746_PI10_FUNC_FMC_D31 0x8a0d
1173 #define STM32F746_PI10_FUNC_LCD_HSYNC 0x8a0f
1174 #define STM32F746_PI10_FUNC_EVENTOUT 0x8a10
1175 #define STM32F746_PI10_FUNC_ANALOG 0x8a11
1176 
1177 #define STM32F746_PI11_FUNC_GPIO 0x8b00
1178 #define STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b
1179 #define STM32F746_PI11_FUNC_EVENTOUT 0x8b10
1180 #define STM32F746_PI11_FUNC_ANALOG 0x8b11
1181 
1182 #define STM32F746_PI12_FUNC_GPIO 0x8c00
1183 #define STM32F746_PI12_FUNC_LCD_HSYNC 0x8c0f
1184 #define STM32F746_PI12_FUNC_EVENTOUT 0x8c10
1185 #define STM32F746_PI12_FUNC_ANALOG 0x8c11
1186 
1187 #define STM32F746_PI13_FUNC_GPIO 0x8d00
1188 #define STM32F746_PI13_FUNC_LCD_VSYNC 0x8d0f
1189 #define STM32F746_PI13_FUNC_EVENTOUT 0x8d10
1190 #define STM32F746_PI13_FUNC_ANALOG 0x8d11
1191 
1192 #define STM32F746_PI14_FUNC_GPIO 0x8e00
1193 #define STM32F746_PI14_FUNC_LCD_CLK 0x8e0f
1194 #define STM32F746_PI14_FUNC_EVENTOUT 0x8e10
1195 #define STM32F746_PI14_FUNC_ANALOG 0x8e11
1196 
1197 #define STM32F746_PI15_FUNC_GPIO 0x8f00
1198 #define STM32F746_PI15_FUNC_LCD_R0 0x8f0f
1199 #define STM32F746_PI15_FUNC_EVENTOUT 0x8f10
1200 #define STM32F746_PI15_FUNC_ANALOG 0x8f11
1201 
1202 
1203 #define STM32F746_PJ0_FUNC_GPIO 0x9000
1204 #define STM32F746_PJ0_FUNC_LCD_R1 0x900f
1205 #define STM32F746_PJ0_FUNC_EVENTOUT 0x9010
1206 #define STM32F746_PJ0_FUNC_ANALOG 0x9011
1207 
1208 #define STM32F746_PJ1_FUNC_GPIO 0x9100
1209 #define STM32F746_PJ1_FUNC_LCD_R2 0x910f
1210 #define STM32F746_PJ1_FUNC_EVENTOUT 0x9110
1211 #define STM32F746_PJ1_FUNC_ANALOG 0x9111
1212 
1213 #define STM32F746_PJ2_FUNC_GPIO 0x9200
1214 #define STM32F746_PJ2_FUNC_LCD_R3 0x920f
1215 #define STM32F746_PJ2_FUNC_EVENTOUT 0x9210
1216 #define STM32F746_PJ2_FUNC_ANALOG 0x9211
1217 
1218 #define STM32F746_PJ3_FUNC_GPIO 0x9300
1219 #define STM32F746_PJ3_FUNC_LCD_R4 0x930f
1220 #define STM32F746_PJ3_FUNC_EVENTOUT 0x9310
1221 #define STM32F746_PJ3_FUNC_ANALOG 0x9311
1222 
1223 #define STM32F746_PJ4_FUNC_GPIO 0x9400
1224 #define STM32F746_PJ4_FUNC_LCD_R5 0x940f
1225 #define STM32F746_PJ4_FUNC_EVENTOUT 0x9410
1226 #define STM32F746_PJ4_FUNC_ANALOG 0x9411
1227 
1228 #define STM32F746_PJ5_FUNC_GPIO 0x9500
1229 #define STM32F746_PJ5_FUNC_LCD_R6 0x950f
1230 #define STM32F746_PJ5_FUNC_EVENTOUT 0x9510
1231 #define STM32F746_PJ5_FUNC_ANALOG 0x9511
1232 
1233 #define STM32F746_PJ6_FUNC_GPIO 0x9600
1234 #define STM32F746_PJ6_FUNC_LCD_R7 0x960f
1235 #define STM32F746_PJ6_FUNC_EVENTOUT 0x9610
1236 #define STM32F746_PJ6_FUNC_ANALOG 0x9611
1237 
1238 #define STM32F746_PJ7_FUNC_GPIO 0x9700
1239 #define STM32F746_PJ7_FUNC_LCD_G0 0x970f
1240 #define STM32F746_PJ7_FUNC_EVENTOUT 0x9710
1241 #define STM32F746_PJ7_FUNC_ANALOG 0x9711
1242 
1243 #define STM32F746_PJ8_FUNC_GPIO 0x9800
1244 #define STM32F746_PJ8_FUNC_LCD_G1 0x980f
1245 #define STM32F746_PJ8_FUNC_EVENTOUT 0x9810
1246 #define STM32F746_PJ8_FUNC_ANALOG 0x9811
1247 
1248 #define STM32F746_PJ9_FUNC_GPIO 0x9900
1249 #define STM32F746_PJ9_FUNC_LCD_G2 0x990f
1250 #define STM32F746_PJ9_FUNC_EVENTOUT 0x9910
1251 #define STM32F746_PJ9_FUNC_ANALOG 0x9911
1252 
1253 #define STM32F746_PJ10_FUNC_GPIO 0x9a00
1254 #define STM32F746_PJ10_FUNC_LCD_G3 0x9a0f
1255 #define STM32F746_PJ10_FUNC_EVENTOUT 0x9a10
1256 #define STM32F746_PJ10_FUNC_ANALOG 0x9a11
1257 
1258 #define STM32F746_PJ11_FUNC_GPIO 0x9b00
1259 #define STM32F746_PJ11_FUNC_LCD_G4 0x9b0f
1260 #define STM32F746_PJ11_FUNC_EVENTOUT 0x9b10
1261 #define STM32F746_PJ11_FUNC_ANALOG 0x9b11
1262 
1263 #define STM32F746_PJ12_FUNC_GPIO 0x9c00
1264 #define STM32F746_PJ12_FUNC_LCD_B0 0x9c0f
1265 #define STM32F746_PJ12_FUNC_EVENTOUT 0x9c10
1266 #define STM32F746_PJ12_FUNC_ANALOG 0x9c11
1267 
1268 #define STM32F746_PJ13_FUNC_GPIO 0x9d00
1269 #define STM32F746_PJ13_FUNC_LCD_B1 0x9d0f
1270 #define STM32F746_PJ13_FUNC_EVENTOUT 0x9d10
1271 #define STM32F746_PJ13_FUNC_ANALOG 0x9d11
1272 
1273 #define STM32F746_PJ14_FUNC_GPIO 0x9e00
1274 #define STM32F746_PJ14_FUNC_LCD_B2 0x9e0f
1275 #define STM32F746_PJ14_FUNC_EVENTOUT 0x9e10
1276 #define STM32F746_PJ14_FUNC_ANALOG 0x9e11
1277 
1278 #define STM32F746_PJ15_FUNC_GPIO 0x9f00
1279 #define STM32F746_PJ15_FUNC_LCD_B3 0x9f0f
1280 #define STM32F746_PJ15_FUNC_EVENTOUT 0x9f10
1281 #define STM32F746_PJ15_FUNC_ANALOG 0x9f11
1282 
1283 
1284 #define STM32F746_PK0_FUNC_GPIO 0xa000
1285 #define STM32F746_PK0_FUNC_LCD_G5 0xa00f
1286 #define STM32F746_PK0_FUNC_EVENTOUT 0xa010
1287 #define STM32F746_PK0_FUNC_ANALOG 0xa011
1288 
1289 #define STM32F746_PK1_FUNC_GPIO 0xa100
1290 #define STM32F746_PK1_FUNC_LCD_G6 0xa10f
1291 #define STM32F746_PK1_FUNC_EVENTOUT 0xa110
1292 #define STM32F746_PK1_FUNC_ANALOG 0xa111
1293 
1294 #define STM32F746_PK2_FUNC_GPIO 0xa200
1295 #define STM32F746_PK2_FUNC_LCD_G7 0xa20f
1296 #define STM32F746_PK2_FUNC_EVENTOUT 0xa210
1297 #define STM32F746_PK2_FUNC_ANALOG 0xa211
1298 
1299 #define STM32F746_PK3_FUNC_GPIO 0xa300
1300 #define STM32F746_PK3_FUNC_LCD_B4 0xa30f
1301 #define STM32F746_PK3_FUNC_EVENTOUT 0xa310
1302 #define STM32F746_PK3_FUNC_ANALOG 0xa311
1303 
1304 #define STM32F746_PK4_FUNC_GPIO 0xa400
1305 #define STM32F746_PK4_FUNC_LCD_B5 0xa40f
1306 #define STM32F746_PK4_FUNC_EVENTOUT 0xa410
1307 #define STM32F746_PK4_FUNC_ANALOG 0xa411
1308 
1309 #define STM32F746_PK5_FUNC_GPIO 0xa500
1310 #define STM32F746_PK5_FUNC_LCD_B6 0xa50f
1311 #define STM32F746_PK5_FUNC_EVENTOUT 0xa510
1312 #define STM32F746_PK5_FUNC_ANALOG 0xa511
1313 
1314 #define STM32F746_PK6_FUNC_GPIO 0xa600
1315 #define STM32F746_PK6_FUNC_LCD_B7 0xa60f
1316 #define STM32F746_PK6_FUNC_EVENTOUT 0xa610
1317 #define STM32F746_PK6_FUNC_ANALOG 0xa611
1318 
1319 #define STM32F746_PK7_FUNC_GPIO 0xa700
1320 #define STM32F746_PK7_FUNC_LCD_DE 0xa70f
1321 #define STM32F746_PK7_FUNC_EVENTOUT 0xa710
1322 #define STM32F746_PK7_FUNC_ANALOG 0xa711
1323 
1324 #endif /* _DT_BINDINGS_STM32F746_PINFUNC_H */
1325