1 #ifndef _DT_BINDINGS_STM32F746_PINFUNC_H
2 #define _DT_BINDINGS_STM32F746_PINFUNC_H
3 
4 #define STM32F746_PA0_FUNC_GPIO 0x0
5 #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6 #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
7 #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
8 #define STM32F746_PA0_FUNC_USART2_CTS 0x8
9 #define STM32F746_PA0_FUNC_UART4_TX 0x9
10 #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
11 #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
12 #define STM32F746_PA0_FUNC_EVENTOUT 0x10
13 #define STM32F746_PA0_FUNC_ANALOG 0x11
14 
15 #define STM32F746_PA1_FUNC_GPIO 0x100
16 #define STM32F746_PA1_FUNC_TIM2_CH2 0x102
17 #define STM32F746_PA1_FUNC_TIM5_CH2 0x103
18 #define STM32F746_PA1_FUNC_USART2_RTS 0x108
19 #define STM32F746_PA1_FUNC_UART4_RX 0x109
20 #define STM32F746_PA1_FUNC_QUADSPI_BK1_IO3 0x10a
21 #define STM32F746_PA1_FUNC_SAI2_MCLK_B 0x10b
22 #define STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c
23 #define STM32F746_PA1_FUNC_LCD_R2 0x10f
24 #define STM32F746_PA1_FUNC_EVENTOUT 0x110
25 #define STM32F746_PA1_FUNC_ANALOG 0x111
26 
27 #define STM32F746_PA2_FUNC_GPIO 0x200
28 #define STM32F746_PA2_FUNC_TIM2_CH3 0x202
29 #define STM32F746_PA2_FUNC_TIM5_CH3 0x203
30 #define STM32F746_PA2_FUNC_TIM9_CH1 0x204
31 #define STM32F746_PA2_FUNC_USART2_TX 0x208
32 #define STM32F746_PA2_FUNC_SAI2_SCK_B 0x209
33 #define STM32F746_PA2_FUNC_ETH_MDIO 0x20c
34 #define STM32F746_PA2_FUNC_LCD_R1 0x20f
35 #define STM32F746_PA2_FUNC_EVENTOUT 0x210
36 #define STM32F746_PA2_FUNC_ANALOG 0x211
37 
38 #define STM32F746_PA3_FUNC_GPIO 0x300
39 #define STM32F746_PA3_FUNC_TIM2_CH4 0x302
40 #define STM32F746_PA3_FUNC_TIM5_CH4 0x303
41 #define STM32F746_PA3_FUNC_TIM9_CH2 0x304
42 #define STM32F746_PA3_FUNC_USART2_RX 0x308
43 #define STM32F746_PA3_FUNC_OTG_HS_ULPI_D0 0x30b
44 #define STM32F746_PA3_FUNC_ETH_MII_COL 0x30c
45 #define STM32F746_PA3_FUNC_LCD_B5 0x30f
46 #define STM32F746_PA3_FUNC_EVENTOUT 0x310
47 #define STM32F746_PA3_FUNC_ANALOG 0x311
48 
49 #define STM32F746_PA4_FUNC_GPIO 0x400
50 #define STM32F746_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406
51 #define STM32F746_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407
52 #define STM32F746_PA4_FUNC_USART2_CK 0x408
53 #define STM32F746_PA4_FUNC_OTG_HS_SOF 0x40d
54 #define STM32F746_PA4_FUNC_DCMI_HSYNC 0x40e
55 #define STM32F746_PA4_FUNC_LCD_VSYNC 0x40f
56 #define STM32F746_PA4_FUNC_EVENTOUT 0x410
57 #define STM32F746_PA4_FUNC_ANALOG 0x411
58 
59 #define STM32F746_PA5_FUNC_GPIO 0x500
60 #define STM32F746_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502
61 #define STM32F746_PA5_FUNC_TIM8_CH1N 0x504
62 #define STM32F746_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506
63 #define STM32F746_PA5_FUNC_OTG_HS_ULPI_CK 0x50b
64 #define STM32F746_PA5_FUNC_LCD_R4 0x50f
65 #define STM32F746_PA5_FUNC_EVENTOUT 0x510
66 #define STM32F746_PA5_FUNC_ANALOG 0x511
67 
68 #define STM32F746_PA6_FUNC_GPIO 0x600
69 #define STM32F746_PA6_FUNC_TIM1_BKIN 0x602
70 #define STM32F746_PA6_FUNC_TIM3_CH1 0x603
71 #define STM32F746_PA6_FUNC_TIM8_BKIN 0x604
72 #define STM32F746_PA6_FUNC_SPI1_MISO 0x606
73 #define STM32F746_PA6_FUNC_TIM13_CH1 0x60a
74 #define STM32F746_PA6_FUNC_DCMI_PIXCLK 0x60e
75 #define STM32F746_PA6_FUNC_LCD_G2 0x60f
76 #define STM32F746_PA6_FUNC_EVENTOUT 0x610
77 #define STM32F746_PA6_FUNC_ANALOG 0x611
78 
79 #define STM32F746_PA7_FUNC_GPIO 0x700
80 #define STM32F746_PA7_FUNC_TIM1_CH1N 0x702
81 #define STM32F746_PA7_FUNC_TIM3_CH2 0x703
82 #define STM32F746_PA7_FUNC_TIM8_CH1N 0x704
83 #define STM32F746_PA7_FUNC_SPI1_MOSI_I2S1_SD 0x706
84 #define STM32F746_PA7_FUNC_TIM14_CH1 0x70a
85 #define STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c
86 #define STM32F746_PA7_FUNC_FMC_SDNWE 0x70d
87 #define STM32F746_PA7_FUNC_EVENTOUT 0x710
88 #define STM32F746_PA7_FUNC_ANALOG 0x711
89 
90 #define STM32F746_PA8_FUNC_GPIO 0x800
91 #define STM32F746_PA8_FUNC_MCO1 0x801
92 #define STM32F746_PA8_FUNC_TIM1_CH1 0x802
93 #define STM32F746_PA8_FUNC_TIM8_BKIN2 0x804
94 #define STM32F746_PA8_FUNC_I2C3_SCL 0x805
95 #define STM32F746_PA8_FUNC_USART1_CK 0x808
96 #define STM32F746_PA8_FUNC_OTG_FS_SOF 0x80b
97 #define STM32F746_PA8_FUNC_LCD_R6 0x80f
98 #define STM32F746_PA8_FUNC_EVENTOUT 0x810
99 #define STM32F746_PA8_FUNC_ANALOG 0x811
100 
101 #define STM32F746_PA9_FUNC_GPIO 0x900
102 #define STM32F746_PA9_FUNC_TIM1_CH2 0x902
103 #define STM32F746_PA9_FUNC_I2C3_SMBA 0x905
104 #define STM32F746_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906
105 #define STM32F746_PA9_FUNC_USART1_TX 0x908
106 #define STM32F746_PA9_FUNC_DCMI_D0 0x90e
107 #define STM32F746_PA9_FUNC_EVENTOUT 0x910
108 #define STM32F746_PA9_FUNC_ANALOG 0x911
109 
110 #define STM32F746_PA10_FUNC_GPIO 0xa00
111 #define STM32F746_PA10_FUNC_TIM1_CH3 0xa02
112 #define STM32F746_PA10_FUNC_USART1_RX 0xa08
113 #define STM32F746_PA10_FUNC_OTG_FS_ID 0xa0b
114 #define STM32F746_PA10_FUNC_DCMI_D1 0xa0e
115 #define STM32F746_PA10_FUNC_EVENTOUT 0xa10
116 #define STM32F746_PA10_FUNC_ANALOG 0xa11
117 
118 #define STM32F746_PA11_FUNC_GPIO 0xb00
119 #define STM32F746_PA11_FUNC_TIM1_CH4 0xb02
120 #define STM32F746_PA11_FUNC_USART1_CTS 0xb08
121 #define STM32F746_PA11_FUNC_CAN1_RX 0xb0a
122 #define STM32F746_PA11_FUNC_OTG_FS_DM 0xb0b
123 #define STM32F746_PA11_FUNC_LCD_R4 0xb0f
124 #define STM32F746_PA11_FUNC_EVENTOUT 0xb10
125 #define STM32F746_PA11_FUNC_ANALOG 0xb11
126 
127 #define STM32F746_PA12_FUNC_GPIO 0xc00
128 #define STM32F746_PA12_FUNC_TIM1_ETR 0xc02
129 #define STM32F746_PA12_FUNC_USART1_RTS 0xc08
130 #define STM32F746_PA12_FUNC_SAI2_FS_B 0xc09
131 #define STM32F746_PA12_FUNC_CAN1_TX 0xc0a
132 #define STM32F746_PA12_FUNC_OTG_FS_DP 0xc0b
133 #define STM32F746_PA12_FUNC_LCD_R5 0xc0f
134 #define STM32F746_PA12_FUNC_EVENTOUT 0xc10
135 #define STM32F746_PA12_FUNC_ANALOG 0xc11
136 
137 #define STM32F746_PA13_FUNC_GPIO 0xd00
138 #define STM32F746_PA13_FUNC_JTMS_SWDIO 0xd01
139 #define STM32F746_PA13_FUNC_EVENTOUT 0xd10
140 #define STM32F746_PA13_FUNC_ANALOG 0xd11
141 
142 #define STM32F746_PA14_FUNC_GPIO 0xe00
143 #define STM32F746_PA14_FUNC_JTCK_SWCLK 0xe01
144 #define STM32F746_PA14_FUNC_EVENTOUT 0xe10
145 #define STM32F746_PA14_FUNC_ANALOG 0xe11
146 
147 #define STM32F746_PA15_FUNC_GPIO 0xf00
148 #define STM32F746_PA15_FUNC_JTDI 0xf01
149 #define STM32F746_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02
150 #define STM32F746_PA15_FUNC_HDMI_CEC 0xf05
151 #define STM32F746_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06
152 #define STM32F746_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07
153 #define STM32F746_PA15_FUNC_UART4_RTS 0xf09
154 #define STM32F746_PA15_FUNC_EVENTOUT 0xf10
155 #define STM32F746_PA15_FUNC_ANALOG 0xf11
156 
157 #define STM32F746_PB0_FUNC_GPIO 0x1000
158 #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002
159 #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003
160 #define STM32F746_PB0_FUNC_TIM8_CH2N 0x1004
161 #define STM32F746_PB0_FUNC_UART4_CTS 0x1009
162 #define STM32F746_PB0_FUNC_LCD_R3 0x100a
163 #define STM32F746_PB0_FUNC_OTG_HS_ULPI_D1 0x100b
164 #define STM32F746_PB0_FUNC_ETH_MII_RXD2 0x100c
165 #define STM32F746_PB0_FUNC_EVENTOUT 0x1010
166 #define STM32F746_PB0_FUNC_ANALOG 0x1011
167 
168 #define STM32F746_PB1_FUNC_GPIO 0x1100
169 #define STM32F746_PB1_FUNC_TIM1_CH3N 0x1102
170 #define STM32F746_PB1_FUNC_TIM3_CH4 0x1103
171 #define STM32F746_PB1_FUNC_TIM8_CH3N 0x1104
172 #define STM32F746_PB1_FUNC_LCD_R6 0x110a
173 #define STM32F746_PB1_FUNC_OTG_HS_ULPI_D2 0x110b
174 #define STM32F746_PB1_FUNC_ETH_MII_RXD3 0x110c
175 #define STM32F746_PB1_FUNC_EVENTOUT 0x1110
176 #define STM32F746_PB1_FUNC_ANALOG 0x1111
177 
178 #define STM32F746_PB2_FUNC_GPIO 0x1200
179 #define STM32F746_PB2_FUNC_SAI1_SD_A 0x1207
180 #define STM32F746_PB2_FUNC_SPI3_MOSI_I2S3_SD 0x1208
181 #define STM32F746_PB2_FUNC_QUADSPI_CLK 0x120a
182 #define STM32F746_PB2_FUNC_EVENTOUT 0x1210
183 #define STM32F746_PB2_FUNC_ANALOG 0x1211
184 
185 #define STM32F746_PB3_FUNC_GPIO 0x1300
186 #define STM32F746_PB3_FUNC_JTDO_TRACESWO 0x1301
187 #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302
188 #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306
189 #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307
190 
191 #define STM32F769_PB3_FUNC_SDMMC2_D2 0x130b
192 
193 #define STM32F746_PB3_FUNC_EVENTOUT 0x1310
194 #define STM32F746_PB3_FUNC_ANALOG 0x1311
195 
196 #define STM32F746_PB4_FUNC_GPIO 0x1400
197 #define STM32F746_PB4_FUNC_NJTRST 0x1401
198 #define STM32F746_PB4_FUNC_TIM3_CH1 0x1403
199 #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406
200 #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407
201 #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408
202 
203 #define STM32F769_PB4_FUNC_SDMMC2_D3 0x140b
204 
205 #define STM32F746_PB4_FUNC_EVENTOUT 0x1410
206 #define STM32F746_PB4_FUNC_ANALOG 0x1411
207 
208 #define STM32F746_PB5_FUNC_GPIO 0x1500
209 #define STM32F746_PB5_FUNC_TIM3_CH2 0x1503
210 #define STM32F746_PB5_FUNC_I2C1_SMBA 0x1505
211 #define STM32F746_PB5_FUNC_SPI1_MOSI_I2S1_SD 0x1506
212 #define STM32F746_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507
213 #define STM32F746_PB5_FUNC_CAN2_RX 0x150a
214 #define STM32F746_PB5_FUNC_OTG_HS_ULPI_D7 0x150b
215 #define STM32F746_PB5_FUNC_ETH_PPS_OUT 0x150c
216 #define STM32F746_PB5_FUNC_FMC_SDCKE1 0x150d
217 #define STM32F746_PB5_FUNC_DCMI_D10 0x150e
218 #define STM32F746_PB5_FUNC_EVENTOUT 0x1510
219 #define STM32F746_PB5_FUNC_ANALOG 0x1511
220 
221 #define STM32F746_PB6_FUNC_GPIO 0x1600
222 #define STM32F746_PB6_FUNC_TIM4_CH1 0x1603
223 #define STM32F746_PB6_FUNC_HDMI_CEC 0x1604
224 #define STM32F746_PB6_FUNC_I2C1_SCL 0x1605
225 #define STM32F746_PB6_FUNC_USART1_TX 0x1608
226 #define STM32F746_PB6_FUNC_CAN2_TX 0x160a
227 #define STM32F746_PB6_FUNC_QUADSPI_BK1_NCS 0x160b
228 #define STM32F746_PB6_FUNC_FMC_SDNE1 0x160d
229 #define STM32F746_PB6_FUNC_DCMI_D5 0x160e
230 #define STM32F746_PB6_FUNC_EVENTOUT 0x1610
231 #define STM32F746_PB6_FUNC_ANALOG 0x1611
232 
233 #define STM32F746_PB7_FUNC_GPIO 0x1700
234 #define STM32F746_PB7_FUNC_TIM4_CH2 0x1703
235 #define STM32F746_PB7_FUNC_I2C1_SDA 0x1705
236 #define STM32F746_PB7_FUNC_USART1_RX 0x1708
237 #define STM32F746_PB7_FUNC_FMC_NL 0x170d
238 #define STM32F746_PB7_FUNC_DCMI_VSYNC 0x170e
239 #define STM32F746_PB7_FUNC_EVENTOUT 0x1710
240 #define STM32F746_PB7_FUNC_ANALOG 0x1711
241 
242 #define STM32F746_PB8_FUNC_GPIO 0x1800
243 #define STM32F746_PB8_FUNC_TIM4_CH3 0x1803
244 #define STM32F746_PB8_FUNC_TIM10_CH1 0x1804
245 #define STM32F746_PB8_FUNC_I2C1_SCL 0x1805
246 #define STM32F746_PB8_FUNC_CAN1_RX 0x180a
247 #define STM32F746_PB8_FUNC_ETH_MII_TXD3 0x180c
248 #define STM32F746_PB8_FUNC_SDMMC1_D4 0x180d
249 #define STM32F746_PB8_FUNC_DCMI_D6 0x180e
250 #define STM32F746_PB8_FUNC_LCD_B6 0x180f
251 #define STM32F746_PB8_FUNC_EVENTOUT 0x1810
252 #define STM32F746_PB8_FUNC_ANALOG 0x1811
253 
254 #define STM32F746_PB9_FUNC_GPIO 0x1900
255 #define STM32F746_PB9_FUNC_TIM4_CH4 0x1903
256 #define STM32F746_PB9_FUNC_TIM11_CH1 0x1904
257 #define STM32F746_PB9_FUNC_I2C1_SDA 0x1905
258 #define STM32F746_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906
259 #define STM32F746_PB9_FUNC_CAN1_TX 0x190a
260 #define STM32F746_PB9_FUNC_SDMMC1_D5 0x190d
261 #define STM32F746_PB9_FUNC_DCMI_D7 0x190e
262 #define STM32F746_PB9_FUNC_LCD_B7 0x190f
263 #define STM32F746_PB9_FUNC_EVENTOUT 0x1910
264 #define STM32F746_PB9_FUNC_ANALOG 0x1911
265 
266 #define STM32F746_PB10_FUNC_GPIO 0x1a00
267 #define STM32F746_PB10_FUNC_TIM2_CH3 0x1a02
268 #define STM32F746_PB10_FUNC_I2C2_SCL 0x1a05
269 #define STM32F746_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06
270 #define STM32F746_PB10_FUNC_USART3_TX 0x1a08
271 #define STM32F746_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b
272 #define STM32F746_PB10_FUNC_ETH_MII_RX_ER 0x1a0c
273 #define STM32F746_PB10_FUNC_LCD_G4 0x1a0f
274 #define STM32F746_PB10_FUNC_EVENTOUT 0x1a10
275 #define STM32F746_PB10_FUNC_ANALOG 0x1a11
276 
277 #define STM32F746_PB11_FUNC_GPIO 0x1b00
278 #define STM32F746_PB11_FUNC_TIM2_CH4 0x1b02
279 #define STM32F746_PB11_FUNC_I2C2_SDA 0x1b05
280 #define STM32F746_PB11_FUNC_USART3_RX 0x1b08
281 #define STM32F746_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b
282 #define STM32F746_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c
283 #define STM32F746_PB11_FUNC_LCD_G5 0x1b0f
284 #define STM32F746_PB11_FUNC_EVENTOUT 0x1b10
285 #define STM32F746_PB11_FUNC_ANALOG 0x1b11
286 
287 #define STM32F746_PB12_FUNC_GPIO 0x1c00
288 #define STM32F746_PB12_FUNC_TIM1_BKIN 0x1c02
289 #define STM32F746_PB12_FUNC_I2C2_SMBA 0x1c05
290 #define STM32F746_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06
291 #define STM32F746_PB12_FUNC_USART3_CK 0x1c08
292 #define STM32F746_PB12_FUNC_CAN2_RX 0x1c0a
293 #define STM32F746_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b
294 #define STM32F746_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c
295 #define STM32F746_PB12_FUNC_OTG_HS_ID 0x1c0d
296 #define STM32F746_PB12_FUNC_EVENTOUT 0x1c10
297 #define STM32F746_PB12_FUNC_ANALOG 0x1c11
298 
299 #define STM32F746_PB13_FUNC_GPIO 0x1d00
300 #define STM32F746_PB13_FUNC_TIM1_CH1N 0x1d02
301 #define STM32F746_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06
302 #define STM32F746_PB13_FUNC_USART3_CTS 0x1d08
303 #define STM32F746_PB13_FUNC_CAN2_TX 0x1d0a
304 #define STM32F746_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b
305 #define STM32F746_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c
306 #define STM32F746_PB13_FUNC_EVENTOUT 0x1d10
307 #define STM32F746_PB13_FUNC_ANALOG 0x1d11
308 
309 #define STM32F746_PB14_FUNC_GPIO 0x1e00
310 #define STM32F746_PB14_FUNC_TIM1_CH2N 0x1e02
311 #define STM32F746_PB14_FUNC_TIM8_CH2N 0x1e04
312 #define STM32F746_PB14_FUNC_SPI2_MISO 0x1e06
313 #define STM32F746_PB14_FUNC_USART3_RTS 0x1e08
314 #define STM32F746_PB14_FUNC_TIM12_CH1 0x1e0a
315 #define STM32F746_PB14_FUNC_OTG_HS_DM 0x1e0d
316 #define STM32F746_PB14_FUNC_EVENTOUT 0x1e10
317 #define STM32F746_PB14_FUNC_ANALOG 0x1e11
318 
319 #define STM32F746_PB15_FUNC_GPIO 0x1f00
320 #define STM32F746_PB15_FUNC_RTC_REFIN 0x1f01
321 #define STM32F746_PB15_FUNC_TIM1_CH3N 0x1f02
322 #define STM32F746_PB15_FUNC_TIM8_CH3N 0x1f04
323 #define STM32F746_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06
324 #define STM32F746_PB15_FUNC_TIM12_CH2 0x1f0a
325 #define STM32F746_PB15_FUNC_OTG_HS_DP 0x1f0d
326 #define STM32F746_PB15_FUNC_EVENTOUT 0x1f10
327 #define STM32F746_PB15_FUNC_ANALOG 0x1f11
328 
329 
330 #define STM32F746_PC0_FUNC_GPIO 0x2000
331 #define STM32F746_PC0_FUNC_SAI2_FS_B 0x2009
332 #define STM32F746_PC0_FUNC_OTG_HS_ULPI_STP 0x200b
333 #define STM32F746_PC0_FUNC_FMC_SDNWE 0x200d
334 #define STM32F746_PC0_FUNC_LCD_R5 0x200f
335 #define STM32F746_PC0_FUNC_EVENTOUT 0x2010
336 #define STM32F746_PC0_FUNC_ANALOG 0x2011
337 
338 #define STM32F746_PC1_FUNC_GPIO 0x2100
339 #define STM32F746_PC1_FUNC_TRACED0 0x2101
340 #define STM32F746_PC1_FUNC_SPI2_MOSI_I2S2_SD 0x2106
341 #define STM32F746_PC1_FUNC_SAI1_SD_A 0x2107
342 #define STM32F746_PC1_FUNC_ETH_MDC 0x210c
343 #define STM32F746_PC1_FUNC_EVENTOUT 0x2110
344 #define STM32F746_PC1_FUNC_ANALOG 0x2111
345 
346 #define STM32F746_PC2_FUNC_GPIO 0x2200
347 #define STM32F746_PC2_FUNC_SPI2_MISO 0x2206
348 #define STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b
349 #define STM32F746_PC2_FUNC_ETH_MII_TXD2 0x220c
350 #define STM32F746_PC2_FUNC_FMC_SDNE0 0x220d
351 #define STM32F746_PC2_FUNC_EVENTOUT 0x2210
352 #define STM32F746_PC2_FUNC_ANALOG 0x2211
353 
354 #define STM32F746_PC3_FUNC_GPIO 0x2300
355 #define STM32F746_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306
356 #define STM32F746_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b
357 #define STM32F746_PC3_FUNC_ETH_MII_TX_CLK 0x230c
358 #define STM32F746_PC3_FUNC_FMC_SDCKE0 0x230d
359 #define STM32F746_PC3_FUNC_EVENTOUT 0x2310
360 #define STM32F746_PC3_FUNC_ANALOG 0x2311
361 
362 #define STM32F746_PC4_FUNC_GPIO 0x2400
363 #define STM32F746_PC4_FUNC_I2S1_MCK 0x2406
364 #define STM32F746_PC4_FUNC_SPDIFRX_IN2 0x2409
365 #define STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c
366 #define STM32F746_PC4_FUNC_FMC_SDNE0 0x240d
367 #define STM32F746_PC4_FUNC_EVENTOUT 0x2410
368 #define STM32F746_PC4_FUNC_ANALOG 0x2411
369 
370 #define STM32F746_PC5_FUNC_GPIO 0x2500
371 #define STM32F746_PC5_FUNC_SPDIFRX_IN3 0x2509
372 #define STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c
373 #define STM32F746_PC5_FUNC_FMC_SDCKE0 0x250d
374 #define STM32F746_PC5_FUNC_EVENTOUT 0x2510
375 #define STM32F746_PC5_FUNC_ANALOG 0x2511
376 
377 #define STM32F746_PC6_FUNC_GPIO 0x2600
378 #define STM32F746_PC6_FUNC_TIM3_CH1 0x2603
379 #define STM32F746_PC6_FUNC_TIM8_CH1 0x2604
380 #define STM32F746_PC6_FUNC_I2S2_MCK 0x2606
381 #define STM32F746_PC6_FUNC_USART6_TX 0x2609
382 #define STM32F746_PC6_FUNC_SDMMC1_D6 0x260d
383 #define STM32F746_PC6_FUNC_DCMI_D0 0x260e
384 #define STM32F746_PC6_FUNC_LCD_HSYNC 0x260f
385 #define STM32F746_PC6_FUNC_EVENTOUT 0x2610
386 #define STM32F746_PC6_FUNC_ANALOG 0x2611
387 
388 #define STM32F746_PC7_FUNC_GPIO 0x2700
389 #define STM32F746_PC7_FUNC_TIM3_CH2 0x2703
390 #define STM32F746_PC7_FUNC_TIM8_CH2 0x2704
391 #define STM32F746_PC7_FUNC_I2S3_MCK 0x2707
392 #define STM32F746_PC7_FUNC_USART6_RX 0x2709
393 #define STM32F746_PC7_FUNC_SDMMC1_D7 0x270d
394 #define STM32F746_PC7_FUNC_DCMI_D1 0x270e
395 #define STM32F746_PC7_FUNC_LCD_G6 0x270f
396 #define STM32F746_PC7_FUNC_EVENTOUT 0x2710
397 #define STM32F746_PC7_FUNC_ANALOG 0x2711
398 
399 #define STM32F746_PC8_FUNC_GPIO 0x2800
400 #define STM32F746_PC8_FUNC_TRACED1 0x2801
401 #define STM32F746_PC8_FUNC_TIM3_CH3 0x2803
402 #define STM32F746_PC8_FUNC_TIM8_CH3 0x2804
403 #define STM32F746_PC8_FUNC_UART5_RTS 0x2808
404 #define STM32F746_PC8_FUNC_USART6_CK 0x2809
405 #define STM32F746_PC8_FUNC_SDMMC1_D0 0x280d
406 #define STM32F746_PC8_FUNC_DCMI_D2 0x280e
407 #define STM32F746_PC8_FUNC_EVENTOUT 0x2810
408 #define STM32F746_PC8_FUNC_ANALOG 0x2811
409 
410 #define STM32F746_PC9_FUNC_GPIO 0x2900
411 #define STM32F746_PC9_FUNC_MCO2 0x2901
412 #define STM32F746_PC9_FUNC_TIM3_CH4 0x2903
413 #define STM32F746_PC9_FUNC_TIM8_CH4 0x2904
414 #define STM32F746_PC9_FUNC_I2C3_SDA 0x2905
415 #define STM32F746_PC9_FUNC_I2S_CKIN 0x2906
416 #define STM32F746_PC9_FUNC_UART5_CTS 0x2908
417 #define STM32F746_PC9_FUNC_QUADSPI_BK1_IO0 0x290a
418 #define STM32F746_PC9_FUNC_SDMMC1_D1 0x290d
419 #define STM32F746_PC9_FUNC_DCMI_D3 0x290e
420 #define STM32F746_PC9_FUNC_EVENTOUT 0x2910
421 #define STM32F746_PC9_FUNC_ANALOG 0x2911
422 
423 #define STM32F746_PC10_FUNC_GPIO 0x2a00
424 #define STM32F746_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07
425 #define STM32F746_PC10_FUNC_USART3_TX 0x2a08
426 #define STM32F746_PC10_FUNC_UART4_TX 0x2a09
427 #define STM32F746_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a
428 #define STM32F746_PC10_FUNC_SDMMC1_D2 0x2a0d
429 #define STM32F746_PC10_FUNC_DCMI_D8 0x2a0e
430 #define STM32F746_PC10_FUNC_LCD_R2 0x2a0f
431 #define STM32F746_PC10_FUNC_EVENTOUT 0x2a10
432 #define STM32F746_PC10_FUNC_ANALOG 0x2a11
433 
434 #define STM32F746_PC11_FUNC_GPIO 0x2b00
435 #define STM32F746_PC11_FUNC_SPI3_MISO 0x2b07
436 #define STM32F746_PC11_FUNC_USART3_RX 0x2b08
437 #define STM32F746_PC11_FUNC_UART4_RX 0x2b09
438 #define STM32F746_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a
439 #define STM32F746_PC11_FUNC_SDMMC1_D3 0x2b0d
440 #define STM32F746_PC11_FUNC_DCMI_D4 0x2b0e
441 #define STM32F746_PC11_FUNC_EVENTOUT 0x2b10
442 #define STM32F746_PC11_FUNC_ANALOG 0x2b11
443 
444 #define STM32F746_PC12_FUNC_GPIO 0x2c00
445 #define STM32F746_PC12_FUNC_TRACED3 0x2c01
446 #define STM32F746_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07
447 #define STM32F746_PC12_FUNC_USART3_CK 0x2c08
448 #define STM32F746_PC12_FUNC_UART5_TX 0x2c09
449 #define STM32F746_PC12_FUNC_SDMMC1_CK 0x2c0d
450 #define STM32F746_PC12_FUNC_DCMI_D9 0x2c0e
451 #define STM32F746_PC12_FUNC_EVENTOUT 0x2c10
452 #define STM32F746_PC12_FUNC_ANALOG 0x2c11
453 
454 #define STM32F746_PC13_FUNC_GPIO 0x2d00
455 #define STM32F746_PC13_FUNC_EVENTOUT 0x2d10
456 #define STM32F746_PC13_FUNC_ANALOG 0x2d11
457 
458 #define STM32F746_PC14_FUNC_GPIO 0x2e00
459 #define STM32F746_PC14_FUNC_EVENTOUT 0x2e10
460 #define STM32F746_PC14_FUNC_ANALOG 0x2e11
461 
462 #define STM32F746_PC15_FUNC_GPIO 0x2f00
463 #define STM32F746_PC15_FUNC_EVENTOUT 0x2f10
464 #define STM32F746_PC15_FUNC_ANALOG 0x2f11
465 
466 
467 #define STM32F746_PD0_FUNC_GPIO 0x3000
468 #define STM32F746_PD0_FUNC_CAN1_RX 0x300a
469 #define STM32F746_PD0_FUNC_FMC_D2 0x300d
470 #define STM32F746_PD0_FUNC_EVENTOUT 0x3010
471 #define STM32F746_PD0_FUNC_ANALOG 0x3011
472 
473 #define STM32F746_PD1_FUNC_GPIO 0x3100
474 #define STM32F746_PD1_FUNC_CAN1_TX 0x310a
475 #define STM32F746_PD1_FUNC_FMC_D3 0x310d
476 #define STM32F746_PD1_FUNC_EVENTOUT 0x3110
477 #define STM32F746_PD1_FUNC_ANALOG 0x3111
478 
479 #define STM32F746_PD2_FUNC_GPIO 0x3200
480 #define STM32F746_PD2_FUNC_TRACED2 0x3201
481 #define STM32F746_PD2_FUNC_TIM3_ETR 0x3203
482 #define STM32F746_PD2_FUNC_UART5_RX 0x3209
483 #define STM32F746_PD2_FUNC_SDMMC1_CMD 0x320d
484 #define STM32F746_PD2_FUNC_DCMI_D11 0x320e
485 #define STM32F746_PD2_FUNC_EVENTOUT 0x3210
486 #define STM32F746_PD2_FUNC_ANALOG 0x3211
487 
488 #define STM32F746_PD3_FUNC_GPIO 0x3300
489 #define STM32F746_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306
490 #define STM32F746_PD3_FUNC_USART2_CTS 0x3308
491 #define STM32F746_PD3_FUNC_FMC_CLK 0x330d
492 #define STM32F746_PD3_FUNC_DCMI_D5 0x330e
493 #define STM32F746_PD3_FUNC_LCD_G7 0x330f
494 #define STM32F746_PD3_FUNC_EVENTOUT 0x3310
495 #define STM32F746_PD3_FUNC_ANALOG 0x3311
496 
497 #define STM32F746_PD4_FUNC_GPIO 0x3400
498 #define STM32F746_PD4_FUNC_USART2_RTS 0x3408
499 #define STM32F746_PD4_FUNC_FMC_NOE 0x340d
500 #define STM32F746_PD4_FUNC_EVENTOUT 0x3410
501 #define STM32F746_PD4_FUNC_ANALOG 0x3411
502 
503 #define STM32F746_PD5_FUNC_GPIO 0x3500
504 #define STM32F746_PD5_FUNC_USART2_TX 0x3508
505 #define STM32F746_PD5_FUNC_FMC_NWE 0x350d
506 #define STM32F746_PD5_FUNC_EVENTOUT 0x3510
507 #define STM32F746_PD5_FUNC_ANALOG 0x3511
508 
509 #define STM32F746_PD6_FUNC_GPIO 0x3600
510 #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606
511 #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607
512 #define STM32F746_PD6_FUNC_USART2_RX 0x3608
513 
514 #define STM32F769_PD6_FUNC_SDMMC2_CLK 0x360c
515 
516 #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d
517 #define STM32F746_PD6_FUNC_DCMI_D10 0x360e
518 #define STM32F746_PD6_FUNC_LCD_B2 0x360f
519 #define STM32F746_PD6_FUNC_EVENTOUT 0x3610
520 #define STM32F746_PD6_FUNC_ANALOG 0x3611
521 
522 #define STM32F746_PD7_FUNC_GPIO 0x3700
523 #define STM32F746_PD7_FUNC_USART2_CK 0x3708
524 #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709
525 
526 #define STM32F769_PD7_FUNC_SDMMC2_CMD 0x370c
527 
528 #define STM32F746_PD7_FUNC_FMC_NE1 0x370d
529 #define STM32F746_PD7_FUNC_EVENTOUT 0x3710
530 #define STM32F746_PD7_FUNC_ANALOG 0x3711
531 
532 #define STM32F746_PD8_FUNC_GPIO 0x3800
533 #define STM32F746_PD8_FUNC_USART3_TX 0x3808
534 #define STM32F746_PD8_FUNC_SPDIFRX_IN1 0x3809
535 #define STM32F746_PD8_FUNC_FMC_D13 0x380d
536 #define STM32F746_PD8_FUNC_EVENTOUT 0x3810
537 #define STM32F746_PD8_FUNC_ANALOG 0x3811
538 
539 #define STM32F746_PD9_FUNC_GPIO 0x3900
540 #define STM32F746_PD9_FUNC_USART3_RX 0x3908
541 #define STM32F746_PD9_FUNC_FMC_D14 0x390d
542 #define STM32F746_PD9_FUNC_EVENTOUT 0x3910
543 #define STM32F746_PD9_FUNC_ANALOG 0x3911
544 
545 #define STM32F746_PD10_FUNC_GPIO 0x3a00
546 #define STM32F746_PD10_FUNC_USART3_CK 0x3a08
547 #define STM32F746_PD10_FUNC_FMC_D15 0x3a0d
548 #define STM32F746_PD10_FUNC_LCD_B3 0x3a0f
549 #define STM32F746_PD10_FUNC_EVENTOUT 0x3a10
550 #define STM32F746_PD10_FUNC_ANALOG 0x3a11
551 
552 #define STM32F746_PD11_FUNC_GPIO 0x3b00
553 #define STM32F746_PD11_FUNC_I2C4_SMBA 0x3b05
554 #define STM32F746_PD11_FUNC_USART3_CTS 0x3b08
555 #define STM32F746_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a
556 #define STM32F746_PD11_FUNC_SAI2_SD_A 0x3b0b
557 #define STM32F746_PD11_FUNC_FMC_A16_FMC_CLE 0x3b0d
558 #define STM32F746_PD11_FUNC_EVENTOUT 0x3b10
559 #define STM32F746_PD11_FUNC_ANALOG 0x3b11
560 
561 #define STM32F746_PD12_FUNC_GPIO 0x3c00
562 #define STM32F746_PD12_FUNC_TIM4_CH1 0x3c03
563 #define STM32F746_PD12_FUNC_LPTIM1_IN1 0x3c04
564 #define STM32F746_PD12_FUNC_I2C4_SCL 0x3c05
565 #define STM32F746_PD12_FUNC_USART3_RTS 0x3c08
566 #define STM32F746_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a
567 #define STM32F746_PD12_FUNC_SAI2_FS_A 0x3c0b
568 #define STM32F746_PD12_FUNC_FMC_A17_FMC_ALE 0x3c0d
569 #define STM32F746_PD12_FUNC_EVENTOUT 0x3c10
570 #define STM32F746_PD12_FUNC_ANALOG 0x3c11
571 
572 #define STM32F746_PD13_FUNC_GPIO 0x3d00
573 #define STM32F746_PD13_FUNC_TIM4_CH2 0x3d03
574 #define STM32F746_PD13_FUNC_LPTIM1_OUT 0x3d04
575 #define STM32F746_PD13_FUNC_I2C4_SDA 0x3d05
576 #define STM32F746_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a
577 #define STM32F746_PD13_FUNC_SAI2_SCK_A 0x3d0b
578 #define STM32F746_PD13_FUNC_FMC_A18 0x3d0d
579 #define STM32F746_PD13_FUNC_EVENTOUT 0x3d10
580 #define STM32F746_PD13_FUNC_ANALOG 0x3d11
581 
582 #define STM32F746_PD14_FUNC_GPIO 0x3e00
583 #define STM32F746_PD14_FUNC_TIM4_CH3 0x3e03
584 #define STM32F746_PD14_FUNC_UART8_CTS 0x3e09
585 #define STM32F746_PD14_FUNC_FMC_D0 0x3e0d
586 #define STM32F746_PD14_FUNC_EVENTOUT 0x3e10
587 #define STM32F746_PD14_FUNC_ANALOG 0x3e11
588 
589 #define STM32F746_PD15_FUNC_GPIO 0x3f00
590 #define STM32F746_PD15_FUNC_TIM4_CH4 0x3f03
591 #define STM32F746_PD15_FUNC_UART8_RTS 0x3f09
592 #define STM32F746_PD15_FUNC_FMC_D1 0x3f0d
593 #define STM32F746_PD15_FUNC_EVENTOUT 0x3f10
594 #define STM32F746_PD15_FUNC_ANALOG 0x3f11
595 
596 
597 #define STM32F746_PE0_FUNC_GPIO 0x4000
598 #define STM32F746_PE0_FUNC_TIM4_ETR 0x4003
599 #define STM32F746_PE0_FUNC_LPTIM1_ETR 0x4004
600 #define STM32F746_PE0_FUNC_UART8_RX 0x4009
601 #define STM32F746_PE0_FUNC_SAI2_MCLK_A 0x400b
602 #define STM32F746_PE0_FUNC_FMC_NBL0 0x400d
603 #define STM32F746_PE0_FUNC_DCMI_D2 0x400e
604 #define STM32F746_PE0_FUNC_EVENTOUT 0x4010
605 #define STM32F746_PE0_FUNC_ANALOG 0x4011
606 
607 #define STM32F746_PE1_FUNC_GPIO 0x4100
608 #define STM32F746_PE1_FUNC_LPTIM1_IN2 0x4104
609 #define STM32F746_PE1_FUNC_UART8_TX 0x4109
610 #define STM32F746_PE1_FUNC_FMC_NBL1 0x410d
611 #define STM32F746_PE1_FUNC_DCMI_D3 0x410e
612 #define STM32F746_PE1_FUNC_EVENTOUT 0x4110
613 #define STM32F746_PE1_FUNC_ANALOG 0x4111
614 
615 #define STM32F746_PE2_FUNC_GPIO 0x4200
616 #define STM32F746_PE2_FUNC_TRACECLK 0x4201
617 #define STM32F746_PE2_FUNC_SPI4_SCK 0x4206
618 #define STM32F746_PE2_FUNC_SAI1_MCLK_A 0x4207
619 #define STM32F746_PE2_FUNC_QUADSPI_BK1_IO2 0x420a
620 #define STM32F746_PE2_FUNC_ETH_MII_TXD3 0x420c
621 #define STM32F746_PE2_FUNC_FMC_A23 0x420d
622 #define STM32F746_PE2_FUNC_EVENTOUT 0x4210
623 #define STM32F746_PE2_FUNC_ANALOG 0x4211
624 
625 #define STM32F746_PE3_FUNC_GPIO 0x4300
626 #define STM32F746_PE3_FUNC_TRACED0 0x4301
627 #define STM32F746_PE3_FUNC_SAI1_SD_B 0x4307
628 #define STM32F746_PE3_FUNC_FMC_A19 0x430d
629 #define STM32F746_PE3_FUNC_EVENTOUT 0x4310
630 #define STM32F746_PE3_FUNC_ANALOG 0x4311
631 
632 #define STM32F746_PE4_FUNC_GPIO 0x4400
633 #define STM32F746_PE4_FUNC_TRACED1 0x4401
634 #define STM32F746_PE4_FUNC_SPI4_NSS 0x4406
635 #define STM32F746_PE4_FUNC_SAI1_FS_A 0x4407
636 #define STM32F746_PE4_FUNC_FMC_A20 0x440d
637 #define STM32F746_PE4_FUNC_DCMI_D4 0x440e
638 #define STM32F746_PE4_FUNC_LCD_B0 0x440f
639 #define STM32F746_PE4_FUNC_EVENTOUT 0x4410
640 #define STM32F746_PE4_FUNC_ANALOG 0x4411
641 
642 #define STM32F746_PE5_FUNC_GPIO 0x4500
643 #define STM32F746_PE5_FUNC_TRACED2 0x4501
644 #define STM32F746_PE5_FUNC_TIM9_CH1 0x4504
645 #define STM32F746_PE5_FUNC_SPI4_MISO 0x4506
646 #define STM32F746_PE5_FUNC_SAI1_SCK_A 0x4507
647 #define STM32F746_PE5_FUNC_FMC_A21 0x450d
648 #define STM32F746_PE5_FUNC_DCMI_D6 0x450e
649 #define STM32F746_PE5_FUNC_LCD_G0 0x450f
650 #define STM32F746_PE5_FUNC_EVENTOUT 0x4510
651 #define STM32F746_PE5_FUNC_ANALOG 0x4511
652 
653 #define STM32F746_PE6_FUNC_GPIO 0x4600
654 #define STM32F746_PE6_FUNC_TRACED3 0x4601
655 #define STM32F746_PE6_FUNC_TIM1_BKIN2 0x4602
656 #define STM32F746_PE6_FUNC_TIM9_CH2 0x4604
657 #define STM32F746_PE6_FUNC_SPI4_MOSI 0x4606
658 #define STM32F746_PE6_FUNC_SAI1_SD_A 0x4607
659 #define STM32F746_PE6_FUNC_SAI2_MCLK_B 0x460b
660 #define STM32F746_PE6_FUNC_FMC_A22 0x460d
661 #define STM32F746_PE6_FUNC_DCMI_D7 0x460e
662 #define STM32F746_PE6_FUNC_LCD_G1 0x460f
663 #define STM32F746_PE6_FUNC_EVENTOUT 0x4610
664 #define STM32F746_PE6_FUNC_ANALOG 0x4611
665 
666 #define STM32F746_PE7_FUNC_GPIO 0x4700
667 #define STM32F746_PE7_FUNC_TIM1_ETR 0x4702
668 #define STM32F746_PE7_FUNC_UART7_RX 0x4709
669 #define STM32F746_PE7_FUNC_QUADSPI_BK2_IO0 0x470b
670 #define STM32F746_PE7_FUNC_FMC_D4 0x470d
671 #define STM32F746_PE7_FUNC_EVENTOUT 0x4710
672 #define STM32F746_PE7_FUNC_ANALOG 0x4711
673 
674 #define STM32F746_PE8_FUNC_GPIO 0x4800
675 #define STM32F746_PE8_FUNC_TIM1_CH1N 0x4802
676 #define STM32F746_PE8_FUNC_UART7_TX 0x4809
677 #define STM32F746_PE8_FUNC_QUADSPI_BK2_IO1 0x480b
678 #define STM32F746_PE8_FUNC_FMC_D5 0x480d
679 #define STM32F746_PE8_FUNC_EVENTOUT 0x4810
680 #define STM32F746_PE8_FUNC_ANALOG 0x4811
681 
682 #define STM32F746_PE9_FUNC_GPIO 0x4900
683 #define STM32F746_PE9_FUNC_TIM1_CH1 0x4902
684 #define STM32F746_PE9_FUNC_UART7_RTS 0x4909
685 #define STM32F746_PE9_FUNC_QUADSPI_BK2_IO2 0x490b
686 #define STM32F746_PE9_FUNC_FMC_D6 0x490d
687 #define STM32F746_PE9_FUNC_EVENTOUT 0x4910
688 #define STM32F746_PE9_FUNC_ANALOG 0x4911
689 
690 #define STM32F746_PE10_FUNC_GPIO 0x4a00
691 #define STM32F746_PE10_FUNC_TIM1_CH2N 0x4a02
692 #define STM32F746_PE10_FUNC_UART7_CTS 0x4a09
693 #define STM32F746_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b
694 #define STM32F746_PE10_FUNC_FMC_D7 0x4a0d
695 #define STM32F746_PE10_FUNC_EVENTOUT 0x4a10
696 #define STM32F746_PE10_FUNC_ANALOG 0x4a11
697 
698 #define STM32F746_PE11_FUNC_GPIO 0x4b00
699 #define STM32F746_PE11_FUNC_TIM1_CH2 0x4b02
700 #define STM32F746_PE11_FUNC_SPI4_NSS 0x4b06
701 #define STM32F746_PE11_FUNC_SAI2_SD_B 0x4b0b
702 #define STM32F746_PE11_FUNC_FMC_D8 0x4b0d
703 #define STM32F746_PE11_FUNC_LCD_G3 0x4b0f
704 #define STM32F746_PE11_FUNC_EVENTOUT 0x4b10
705 #define STM32F746_PE11_FUNC_ANALOG 0x4b11
706 
707 #define STM32F746_PE12_FUNC_GPIO 0x4c00
708 #define STM32F746_PE12_FUNC_TIM1_CH3N 0x4c02
709 #define STM32F746_PE12_FUNC_SPI4_SCK 0x4c06
710 #define STM32F746_PE12_FUNC_SAI2_SCK_B 0x4c0b
711 #define STM32F746_PE12_FUNC_FMC_D9 0x4c0d
712 #define STM32F746_PE12_FUNC_LCD_B4 0x4c0f
713 #define STM32F746_PE12_FUNC_EVENTOUT 0x4c10
714 #define STM32F746_PE12_FUNC_ANALOG 0x4c11
715 
716 #define STM32F746_PE13_FUNC_GPIO 0x4d00
717 #define STM32F746_PE13_FUNC_TIM1_CH3 0x4d02
718 #define STM32F746_PE13_FUNC_SPI4_MISO 0x4d06
719 #define STM32F746_PE13_FUNC_SAI2_FS_B 0x4d0b
720 #define STM32F746_PE13_FUNC_FMC_D10 0x4d0d
721 #define STM32F746_PE13_FUNC_LCD_DE 0x4d0f
722 #define STM32F746_PE13_FUNC_EVENTOUT 0x4d10
723 #define STM32F746_PE13_FUNC_ANALOG 0x4d11
724 
725 #define STM32F746_PE14_FUNC_GPIO 0x4e00
726 #define STM32F746_PE14_FUNC_TIM1_CH4 0x4e02
727 #define STM32F746_PE14_FUNC_SPI4_MOSI 0x4e06
728 #define STM32F746_PE14_FUNC_SAI2_MCLK_B 0x4e0b
729 #define STM32F746_PE14_FUNC_FMC_D11 0x4e0d
730 #define STM32F746_PE14_FUNC_LCD_CLK 0x4e0f
731 #define STM32F746_PE14_FUNC_EVENTOUT 0x4e10
732 #define STM32F746_PE14_FUNC_ANALOG 0x4e11
733 
734 #define STM32F746_PE15_FUNC_GPIO 0x4f00
735 #define STM32F746_PE15_FUNC_TIM1_BKIN 0x4f02
736 #define STM32F746_PE15_FUNC_FMC_D12 0x4f0d
737 #define STM32F746_PE15_FUNC_LCD_R7 0x4f0f
738 #define STM32F746_PE15_FUNC_EVENTOUT 0x4f10
739 #define STM32F746_PE15_FUNC_ANALOG 0x4f11
740 
741 
742 #define STM32F746_PF0_FUNC_GPIO 0x5000
743 #define STM32F746_PF0_FUNC_I2C2_SDA 0x5005
744 #define STM32F746_PF0_FUNC_FMC_A0 0x500d
745 #define STM32F746_PF0_FUNC_EVENTOUT 0x5010
746 #define STM32F746_PF0_FUNC_ANALOG 0x5011
747 
748 #define STM32F746_PF1_FUNC_GPIO 0x5100
749 #define STM32F746_PF1_FUNC_I2C2_SCL 0x5105
750 #define STM32F746_PF1_FUNC_FMC_A1 0x510d
751 #define STM32F746_PF1_FUNC_EVENTOUT 0x5110
752 #define STM32F746_PF1_FUNC_ANALOG 0x5111
753 
754 #define STM32F746_PF2_FUNC_GPIO 0x5200
755 #define STM32F746_PF2_FUNC_I2C2_SMBA 0x5205
756 #define STM32F746_PF2_FUNC_FMC_A2 0x520d
757 #define STM32F746_PF2_FUNC_EVENTOUT 0x5210
758 #define STM32F746_PF2_FUNC_ANALOG 0x5211
759 
760 #define STM32F746_PF3_FUNC_GPIO 0x5300
761 #define STM32F746_PF3_FUNC_FMC_A3 0x530d
762 #define STM32F746_PF3_FUNC_EVENTOUT 0x5310
763 #define STM32F746_PF3_FUNC_ANALOG 0x5311
764 
765 #define STM32F746_PF4_FUNC_GPIO 0x5400
766 #define STM32F746_PF4_FUNC_FMC_A4 0x540d
767 #define STM32F746_PF4_FUNC_EVENTOUT 0x5410
768 #define STM32F746_PF4_FUNC_ANALOG 0x5411
769 
770 #define STM32F746_PF5_FUNC_GPIO 0x5500
771 #define STM32F746_PF5_FUNC_FMC_A5 0x550d
772 #define STM32F746_PF5_FUNC_EVENTOUT 0x5510
773 #define STM32F746_PF5_FUNC_ANALOG 0x5511
774 
775 #define STM32F746_PF6_FUNC_GPIO 0x5600
776 #define STM32F746_PF6_FUNC_TIM10_CH1 0x5604
777 #define STM32F746_PF6_FUNC_SPI5_NSS 0x5606
778 #define STM32F746_PF6_FUNC_SAI1_SD_B 0x5607
779 #define STM32F746_PF6_FUNC_UART7_RX 0x5609
780 #define STM32F746_PF6_FUNC_QUADSPI_BK1_IO3 0x560a
781 #define STM32F746_PF6_FUNC_EVENTOUT 0x5610
782 #define STM32F746_PF6_FUNC_ANALOG 0x5611
783 
784 #define STM32F746_PF7_FUNC_GPIO 0x5700
785 #define STM32F746_PF7_FUNC_TIM11_CH1 0x5704
786 #define STM32F746_PF7_FUNC_SPI5_SCK 0x5706
787 #define STM32F746_PF7_FUNC_SAI1_MCLK_B 0x5707
788 #define STM32F746_PF7_FUNC_UART7_TX 0x5709
789 #define STM32F746_PF7_FUNC_QUADSPI_BK1_IO2 0x570a
790 #define STM32F746_PF7_FUNC_EVENTOUT 0x5710
791 #define STM32F746_PF7_FUNC_ANALOG 0x5711
792 
793 #define STM32F746_PF8_FUNC_GPIO 0x5800
794 #define STM32F746_PF8_FUNC_SPI5_MISO 0x5806
795 #define STM32F746_PF8_FUNC_SAI1_SCK_B 0x5807
796 #define STM32F746_PF8_FUNC_UART7_RTS 0x5809
797 #define STM32F746_PF8_FUNC_TIM13_CH1 0x580a
798 #define STM32F746_PF8_FUNC_QUADSPI_BK1_IO0 0x580b
799 #define STM32F746_PF8_FUNC_EVENTOUT 0x5810
800 #define STM32F746_PF8_FUNC_ANALOG 0x5811
801 
802 #define STM32F746_PF9_FUNC_GPIO 0x5900
803 #define STM32F746_PF9_FUNC_SPI5_MOSI 0x5906
804 #define STM32F746_PF9_FUNC_SAI1_FS_B 0x5907
805 #define STM32F746_PF9_FUNC_UART7_CTS 0x5909
806 #define STM32F746_PF9_FUNC_TIM14_CH1 0x590a
807 #define STM32F746_PF9_FUNC_QUADSPI_BK1_IO1 0x590b
808 #define STM32F746_PF9_FUNC_EVENTOUT 0x5910
809 #define STM32F746_PF9_FUNC_ANALOG 0x5911
810 
811 #define STM32F746_PF10_FUNC_GPIO 0x5a00
812 #define STM32F746_PF10_FUNC_DCMI_D11 0x5a0e
813 #define STM32F746_PF10_FUNC_LCD_DE 0x5a0f
814 #define STM32F746_PF10_FUNC_EVENTOUT 0x5a10
815 #define STM32F746_PF10_FUNC_ANALOG 0x5a11
816 
817 #define STM32F746_PF11_FUNC_GPIO 0x5b00
818 #define STM32F746_PF11_FUNC_SPI5_MOSI 0x5b06
819 #define STM32F746_PF11_FUNC_SAI2_SD_B 0x5b0b
820 #define STM32F746_PF11_FUNC_FMC_SDNRAS 0x5b0d
821 #define STM32F746_PF11_FUNC_DCMI_D12 0x5b0e
822 #define STM32F746_PF11_FUNC_EVENTOUT 0x5b10
823 #define STM32F746_PF11_FUNC_ANALOG 0x5b11
824 
825 #define STM32F746_PF12_FUNC_GPIO 0x5c00
826 #define STM32F746_PF12_FUNC_FMC_A6 0x5c0d
827 #define STM32F746_PF12_FUNC_EVENTOUT 0x5c10
828 #define STM32F746_PF12_FUNC_ANALOG 0x5c11
829 
830 #define STM32F746_PF13_FUNC_GPIO 0x5d00
831 #define STM32F746_PF13_FUNC_I2C4_SMBA 0x5d05
832 #define STM32F746_PF13_FUNC_FMC_A7 0x5d0d
833 #define STM32F746_PF13_FUNC_EVENTOUT 0x5d10
834 #define STM32F746_PF13_FUNC_ANALOG 0x5d11
835 
836 #define STM32F746_PF14_FUNC_GPIO 0x5e00
837 #define STM32F746_PF14_FUNC_I2C4_SCL 0x5e05
838 #define STM32F746_PF14_FUNC_FMC_A8 0x5e0d
839 #define STM32F746_PF14_FUNC_EVENTOUT 0x5e10
840 #define STM32F746_PF14_FUNC_ANALOG 0x5e11
841 
842 #define STM32F746_PF15_FUNC_GPIO 0x5f00
843 #define STM32F746_PF15_FUNC_I2C4_SDA 0x5f05
844 #define STM32F746_PF15_FUNC_FMC_A9 0x5f0d
845 #define STM32F746_PF15_FUNC_EVENTOUT 0x5f10
846 #define STM32F746_PF15_FUNC_ANALOG 0x5f11
847 
848 
849 #define STM32F746_PG0_FUNC_GPIO 0x6000
850 #define STM32F746_PG0_FUNC_FMC_A10 0x600d
851 #define STM32F746_PG0_FUNC_EVENTOUT 0x6010
852 #define STM32F746_PG0_FUNC_ANALOG 0x6011
853 
854 #define STM32F746_PG1_FUNC_GPIO 0x6100
855 #define STM32F746_PG1_FUNC_FMC_A11 0x610d
856 #define STM32F746_PG1_FUNC_EVENTOUT 0x6110
857 #define STM32F746_PG1_FUNC_ANALOG 0x6111
858 
859 #define STM32F746_PG2_FUNC_GPIO 0x6200
860 #define STM32F746_PG2_FUNC_FMC_A12 0x620d
861 #define STM32F746_PG2_FUNC_EVENTOUT 0x6210
862 #define STM32F746_PG2_FUNC_ANALOG 0x6211
863 
864 #define STM32F746_PG3_FUNC_GPIO 0x6300
865 #define STM32F746_PG3_FUNC_FMC_A13 0x630d
866 #define STM32F746_PG3_FUNC_EVENTOUT 0x6310
867 #define STM32F746_PG3_FUNC_ANALOG 0x6311
868 
869 #define STM32F746_PG4_FUNC_GPIO 0x6400
870 #define STM32F746_PG4_FUNC_FMC_A14_FMC_BA0 0x640d
871 #define STM32F746_PG4_FUNC_EVENTOUT 0x6410
872 #define STM32F746_PG4_FUNC_ANALOG 0x6411
873 
874 #define STM32F746_PG5_FUNC_GPIO 0x6500
875 #define STM32F746_PG5_FUNC_FMC_A15_FMC_BA1 0x650d
876 #define STM32F746_PG5_FUNC_EVENTOUT 0x6510
877 #define STM32F746_PG5_FUNC_ANALOG 0x6511
878 
879 #define STM32F746_PG6_FUNC_GPIO 0x6600
880 #define STM32F746_PG6_FUNC_DCMI_D12 0x660e
881 #define STM32F746_PG6_FUNC_LCD_R7 0x660f
882 #define STM32F746_PG6_FUNC_EVENTOUT 0x6610
883 #define STM32F746_PG6_FUNC_ANALOG 0x6611
884 
885 #define STM32F746_PG7_FUNC_GPIO 0x6700
886 #define STM32F746_PG7_FUNC_USART6_CK 0x6709
887 #define STM32F746_PG7_FUNC_FMC_INT 0x670d
888 #define STM32F746_PG7_FUNC_DCMI_D13 0x670e
889 #define STM32F746_PG7_FUNC_LCD_CLK 0x670f
890 #define STM32F746_PG7_FUNC_EVENTOUT 0x6710
891 #define STM32F746_PG7_FUNC_ANALOG 0x6711
892 
893 #define STM32F746_PG8_FUNC_GPIO 0x6800
894 #define STM32F746_PG8_FUNC_SPI6_NSS 0x6806
895 #define STM32F746_PG8_FUNC_SPDIFRX_IN2 0x6808
896 #define STM32F746_PG8_FUNC_USART6_RTS 0x6809
897 #define STM32F746_PG8_FUNC_ETH_PPS_OUT 0x680c
898 #define STM32F746_PG8_FUNC_FMC_SDCLK 0x680d
899 #define STM32F746_PG8_FUNC_EVENTOUT 0x6810
900 #define STM32F746_PG8_FUNC_ANALOG 0x6811
901 
902 #define STM32F746_PG9_FUNC_GPIO 0x6900
903 #define STM32F746_PG9_FUNC_SPDIFRX_IN3 0x6908
904 #define STM32F746_PG9_FUNC_USART6_RX 0x6909
905 #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a
906 #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b
907 
908 #define STM32F769_PG9_FUNC_SDMMC2_D0 0x690c
909 
910 #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d
911 #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e
912 #define STM32F746_PG9_FUNC_EVENTOUT 0x6910
913 #define STM32F746_PG9_FUNC_ANALOG 0x6911
914 
915 #define STM32F746_PG10_FUNC_GPIO 0x6a00
916 #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a
917 #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b
918 
919 #define STM32F769_PG10_FUNC_SDMMC2_D1 0x6a0c
920 
921 #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d
922 #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e
923 #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f
924 #define STM32F746_PG10_FUNC_EVENTOUT 0x6a10
925 #define STM32F746_PG10_FUNC_ANALOG 0x6a11
926 
927 #define STM32F746_PG11_FUNC_GPIO 0x6b00
928 #define STM32F746_PG11_FUNC_SPDIFRX_IN0 0x6b08
929 #define STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c
930 #define STM32F746_PG11_FUNC_DCMI_D3 0x6b0e
931 #define STM32F746_PG11_FUNC_LCD_B3 0x6b0f
932 #define STM32F746_PG11_FUNC_EVENTOUT 0x6b10
933 #define STM32F746_PG11_FUNC_ANALOG 0x6b11
934 
935 #define STM32F746_PG12_FUNC_GPIO 0x6c00
936 #define STM32F746_PG12_FUNC_LPTIM1_IN1 0x6c04
937 #define STM32F746_PG12_FUNC_SPI6_MISO 0x6c06
938 #define STM32F746_PG12_FUNC_SPDIFRX_IN1 0x6c08
939 #define STM32F746_PG12_FUNC_USART6_RTS 0x6c09
940 #define STM32F746_PG12_FUNC_LCD_B4 0x6c0a
941 #define STM32F746_PG12_FUNC_FMC_NE4 0x6c0d
942 #define STM32F746_PG12_FUNC_LCD_B1 0x6c0f
943 #define STM32F746_PG12_FUNC_EVENTOUT 0x6c10
944 #define STM32F746_PG12_FUNC_ANALOG 0x6c11
945 
946 #define STM32F746_PG13_FUNC_GPIO 0x6d00
947 #define STM32F746_PG13_FUNC_TRACED0 0x6d01
948 #define STM32F746_PG13_FUNC_LPTIM1_OUT 0x6d04
949 #define STM32F746_PG13_FUNC_SPI6_SCK 0x6d06
950 #define STM32F746_PG13_FUNC_USART6_CTS 0x6d09
951 #define STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c
952 #define STM32F746_PG13_FUNC_FMC_A24 0x6d0d
953 #define STM32F746_PG13_FUNC_LCD_R0 0x6d0f
954 #define STM32F746_PG13_FUNC_EVENTOUT 0x6d10
955 #define STM32F746_PG13_FUNC_ANALOG 0x6d11
956 
957 #define STM32F746_PG14_FUNC_GPIO 0x6e00
958 #define STM32F746_PG14_FUNC_TRACED1 0x6e01
959 #define STM32F746_PG14_FUNC_LPTIM1_ETR 0x6e04
960 #define STM32F746_PG14_FUNC_SPI6_MOSI 0x6e06
961 #define STM32F746_PG14_FUNC_USART6_TX 0x6e09
962 #define STM32F746_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a
963 #define STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c
964 #define STM32F746_PG14_FUNC_FMC_A25 0x6e0d
965 #define STM32F746_PG14_FUNC_LCD_B0 0x6e0f
966 #define STM32F746_PG14_FUNC_EVENTOUT 0x6e10
967 #define STM32F746_PG14_FUNC_ANALOG 0x6e11
968 
969 #define STM32F746_PG15_FUNC_GPIO 0x6f00
970 #define STM32F746_PG15_FUNC_USART6_CTS 0x6f09
971 #define STM32F746_PG15_FUNC_FMC_SDNCAS 0x6f0d
972 #define STM32F746_PG15_FUNC_DCMI_D13 0x6f0e
973 #define STM32F746_PG15_FUNC_EVENTOUT 0x6f10
974 #define STM32F746_PG15_FUNC_ANALOG 0x6f11
975 
976 
977 #define STM32F746_PH0_FUNC_GPIO 0x7000
978 #define STM32F746_PH0_FUNC_EVENTOUT 0x7010
979 #define STM32F746_PH0_FUNC_ANALOG 0x7011
980 
981 #define STM32F746_PH1_FUNC_GPIO 0x7100
982 #define STM32F746_PH1_FUNC_EVENTOUT 0x7110
983 #define STM32F746_PH1_FUNC_ANALOG 0x7111
984 
985 #define STM32F746_PH2_FUNC_GPIO 0x7200
986 #define STM32F746_PH2_FUNC_LPTIM1_IN2 0x7204
987 #define STM32F746_PH2_FUNC_QUADSPI_BK2_IO0 0x720a
988 #define STM32F746_PH2_FUNC_SAI2_SCK_B 0x720b
989 #define STM32F746_PH2_FUNC_ETH_MII_CRS 0x720c
990 #define STM32F746_PH2_FUNC_FMC_SDCKE0 0x720d
991 #define STM32F746_PH2_FUNC_LCD_R0 0x720f
992 #define STM32F746_PH2_FUNC_EVENTOUT 0x7210
993 #define STM32F746_PH2_FUNC_ANALOG 0x7211
994 
995 #define STM32F746_PH3_FUNC_GPIO 0x7300
996 #define STM32F746_PH3_FUNC_QUADSPI_BK2_IO1 0x730a
997 #define STM32F746_PH3_FUNC_SAI2_MCLK_B 0x730b
998 #define STM32F746_PH3_FUNC_ETH_MII_COL 0x730c
999 #define STM32F746_PH3_FUNC_FMC_SDNE0 0x730d
1000 #define STM32F746_PH3_FUNC_LCD_R1 0x730f
1001 #define STM32F746_PH3_FUNC_EVENTOUT 0x7310
1002 #define STM32F746_PH3_FUNC_ANALOG 0x7311
1003 
1004 #define STM32F746_PH4_FUNC_GPIO 0x7400
1005 #define STM32F746_PH4_FUNC_I2C2_SCL 0x7405
1006 #define STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b
1007 #define STM32F746_PH4_FUNC_EVENTOUT 0x7410
1008 #define STM32F746_PH4_FUNC_ANALOG 0x7411
1009 
1010 #define STM32F746_PH5_FUNC_GPIO 0x7500
1011 #define STM32F746_PH5_FUNC_I2C2_SDA 0x7505
1012 #define STM32F746_PH5_FUNC_SPI5_NSS 0x7506
1013 #define STM32F746_PH5_FUNC_FMC_SDNWE 0x750d
1014 #define STM32F746_PH5_FUNC_EVENTOUT 0x7510
1015 #define STM32F746_PH5_FUNC_ANALOG 0x7511
1016 
1017 #define STM32F746_PH6_FUNC_GPIO 0x7600
1018 #define STM32F746_PH6_FUNC_I2C2_SMBA 0x7605
1019 #define STM32F746_PH6_FUNC_SPI5_SCK 0x7606
1020 #define STM32F746_PH6_FUNC_TIM12_CH1 0x760a
1021 #define STM32F746_PH6_FUNC_ETH_MII_RXD2 0x760c
1022 #define STM32F746_PH6_FUNC_FMC_SDNE1 0x760d
1023 #define STM32F746_PH6_FUNC_DCMI_D8 0x760e
1024 #define STM32F746_PH6_FUNC_EVENTOUT 0x7610
1025 #define STM32F746_PH6_FUNC_ANALOG 0x7611
1026 
1027 #define STM32F746_PH7_FUNC_GPIO 0x7700
1028 #define STM32F746_PH7_FUNC_I2C3_SCL 0x7705
1029 #define STM32F746_PH7_FUNC_SPI5_MISO 0x7706
1030 #define STM32F746_PH7_FUNC_ETH_MII_RXD3 0x770c
1031 #define STM32F746_PH7_FUNC_FMC_SDCKE1 0x770d
1032 #define STM32F746_PH7_FUNC_DCMI_D9 0x770e
1033 #define STM32F746_PH7_FUNC_EVENTOUT 0x7710
1034 #define STM32F746_PH7_FUNC_ANALOG 0x7711
1035 
1036 #define STM32F746_PH8_FUNC_GPIO 0x7800
1037 #define STM32F746_PH8_FUNC_I2C3_SDA 0x7805
1038 #define STM32F746_PH8_FUNC_FMC_D16 0x780d
1039 #define STM32F746_PH8_FUNC_DCMI_HSYNC 0x780e
1040 #define STM32F746_PH8_FUNC_LCD_R2 0x780f
1041 #define STM32F746_PH8_FUNC_EVENTOUT 0x7810
1042 #define STM32F746_PH8_FUNC_ANALOG 0x7811
1043 
1044 #define STM32F746_PH9_FUNC_GPIO 0x7900
1045 #define STM32F746_PH9_FUNC_I2C3_SMBA 0x7905
1046 #define STM32F746_PH9_FUNC_TIM12_CH2 0x790a
1047 #define STM32F746_PH9_FUNC_FMC_D17 0x790d
1048 #define STM32F746_PH9_FUNC_DCMI_D0 0x790e
1049 #define STM32F746_PH9_FUNC_LCD_R3 0x790f
1050 #define STM32F746_PH9_FUNC_EVENTOUT 0x7910
1051 #define STM32F746_PH9_FUNC_ANALOG 0x7911
1052 
1053 #define STM32F746_PH10_FUNC_GPIO 0x7a00
1054 #define STM32F746_PH10_FUNC_TIM5_CH1 0x7a03
1055 #define STM32F746_PH10_FUNC_I2C4_SMBA 0x7a05
1056 #define STM32F746_PH10_FUNC_FMC_D18 0x7a0d
1057 #define STM32F746_PH10_FUNC_DCMI_D1 0x7a0e
1058 #define STM32F746_PH10_FUNC_LCD_R4 0x7a0f
1059 #define STM32F746_PH10_FUNC_EVENTOUT 0x7a10
1060 #define STM32F746_PH10_FUNC_ANALOG 0x7a11
1061 
1062 #define STM32F746_PH11_FUNC_GPIO 0x7b00
1063 #define STM32F746_PH11_FUNC_TIM5_CH2 0x7b03
1064 #define STM32F746_PH11_FUNC_I2C4_SCL 0x7b05
1065 #define STM32F746_PH11_FUNC_FMC_D19 0x7b0d
1066 #define STM32F746_PH11_FUNC_DCMI_D2 0x7b0e
1067 #define STM32F746_PH11_FUNC_LCD_R5 0x7b0f
1068 #define STM32F746_PH11_FUNC_EVENTOUT 0x7b10
1069 #define STM32F746_PH11_FUNC_ANALOG 0x7b11
1070 
1071 #define STM32F746_PH12_FUNC_GPIO 0x7c00
1072 #define STM32F746_PH12_FUNC_TIM5_CH3 0x7c03
1073 #define STM32F746_PH12_FUNC_I2C4_SDA 0x7c05
1074 #define STM32F746_PH12_FUNC_FMC_D20 0x7c0d
1075 #define STM32F746_PH12_FUNC_DCMI_D3 0x7c0e
1076 #define STM32F746_PH12_FUNC_LCD_R6 0x7c0f
1077 #define STM32F746_PH12_FUNC_EVENTOUT 0x7c10
1078 #define STM32F746_PH12_FUNC_ANALOG 0x7c11
1079 
1080 #define STM32F746_PH13_FUNC_GPIO 0x7d00
1081 #define STM32F746_PH13_FUNC_TIM8_CH1N 0x7d04
1082 #define STM32F746_PH13_FUNC_CAN1_TX 0x7d0a
1083 #define STM32F746_PH13_FUNC_FMC_D21 0x7d0d
1084 #define STM32F746_PH13_FUNC_LCD_G2 0x7d0f
1085 #define STM32F746_PH13_FUNC_EVENTOUT 0x7d10
1086 #define STM32F746_PH13_FUNC_ANALOG 0x7d11
1087 
1088 #define STM32F746_PH14_FUNC_GPIO 0x7e00
1089 #define STM32F746_PH14_FUNC_TIM8_CH2N 0x7e04
1090 #define STM32F746_PH14_FUNC_FMC_D22 0x7e0d
1091 #define STM32F746_PH14_FUNC_DCMI_D4 0x7e0e
1092 #define STM32F746_PH14_FUNC_LCD_G3 0x7e0f
1093 #define STM32F746_PH14_FUNC_EVENTOUT 0x7e10
1094 #define STM32F746_PH14_FUNC_ANALOG 0x7e11
1095 
1096 #define STM32F746_PH15_FUNC_GPIO 0x7f00
1097 #define STM32F746_PH15_FUNC_TIM8_CH3N 0x7f04
1098 #define STM32F746_PH15_FUNC_FMC_D23 0x7f0d
1099 #define STM32F746_PH15_FUNC_DCMI_D11 0x7f0e
1100 #define STM32F746_PH15_FUNC_LCD_G4 0x7f0f
1101 #define STM32F746_PH15_FUNC_EVENTOUT 0x7f10
1102 #define STM32F746_PH15_FUNC_ANALOG 0x7f11
1103 
1104 
1105 #define STM32F746_PI0_FUNC_GPIO 0x8000
1106 #define STM32F746_PI0_FUNC_TIM5_CH4 0x8003
1107 #define STM32F746_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006
1108 #define STM32F746_PI0_FUNC_FMC_D24 0x800d
1109 #define STM32F746_PI0_FUNC_DCMI_D13 0x800e
1110 #define STM32F746_PI0_FUNC_LCD_G5 0x800f
1111 #define STM32F746_PI0_FUNC_EVENTOUT 0x8010
1112 #define STM32F746_PI0_FUNC_ANALOG 0x8011
1113 
1114 #define STM32F746_PI1_FUNC_GPIO 0x8100
1115 #define STM32F746_PI1_FUNC_TIM8_BKIN2 0x8104
1116 #define STM32F746_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106
1117 #define STM32F746_PI1_FUNC_FMC_D25 0x810d
1118 #define STM32F746_PI1_FUNC_DCMI_D8 0x810e
1119 #define STM32F746_PI1_FUNC_LCD_G6 0x810f
1120 #define STM32F746_PI1_FUNC_EVENTOUT 0x8110
1121 #define STM32F746_PI1_FUNC_ANALOG 0x8111
1122 
1123 #define STM32F746_PI2_FUNC_GPIO 0x8200
1124 #define STM32F746_PI2_FUNC_TIM8_CH4 0x8204
1125 #define STM32F746_PI2_FUNC_SPI2_MISO 0x8206
1126 #define STM32F746_PI2_FUNC_FMC_D26 0x820d
1127 #define STM32F746_PI2_FUNC_DCMI_D9 0x820e
1128 #define STM32F746_PI2_FUNC_LCD_G7 0x820f
1129 #define STM32F746_PI2_FUNC_EVENTOUT 0x8210
1130 #define STM32F746_PI2_FUNC_ANALOG 0x8211
1131 
1132 #define STM32F746_PI3_FUNC_GPIO 0x8300
1133 #define STM32F746_PI3_FUNC_TIM8_ETR 0x8304
1134 #define STM32F746_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306
1135 #define STM32F746_PI3_FUNC_FMC_D27 0x830d
1136 #define STM32F746_PI3_FUNC_DCMI_D10 0x830e
1137 #define STM32F746_PI3_FUNC_EVENTOUT 0x8310
1138 #define STM32F746_PI3_FUNC_ANALOG 0x8311
1139 
1140 #define STM32F746_PI4_FUNC_GPIO 0x8400
1141 #define STM32F746_PI4_FUNC_TIM8_BKIN 0x8404
1142 #define STM32F746_PI4_FUNC_SAI2_MCLK_A 0x840b
1143 #define STM32F746_PI4_FUNC_FMC_NBL2 0x840d
1144 #define STM32F746_PI4_FUNC_DCMI_D5 0x840e
1145 #define STM32F746_PI4_FUNC_LCD_B4 0x840f
1146 #define STM32F746_PI4_FUNC_EVENTOUT 0x8410
1147 #define STM32F746_PI4_FUNC_ANALOG 0x8411
1148 
1149 #define STM32F746_PI5_FUNC_GPIO 0x8500
1150 #define STM32F746_PI5_FUNC_TIM8_CH1 0x8504
1151 #define STM32F746_PI5_FUNC_SAI2_SCK_A 0x850b
1152 #define STM32F746_PI5_FUNC_FMC_NBL3 0x850d
1153 #define STM32F746_PI5_FUNC_DCMI_VSYNC 0x850e
1154 #define STM32F746_PI5_FUNC_LCD_B5 0x850f
1155 #define STM32F746_PI5_FUNC_EVENTOUT 0x8510
1156 #define STM32F746_PI5_FUNC_ANALOG 0x8511
1157 
1158 #define STM32F746_PI6_FUNC_GPIO 0x8600
1159 #define STM32F746_PI6_FUNC_TIM8_CH2 0x8604
1160 #define STM32F746_PI6_FUNC_SAI2_SD_A 0x860b
1161 #define STM32F746_PI6_FUNC_FMC_D28 0x860d
1162 #define STM32F746_PI6_FUNC_DCMI_D6 0x860e
1163 #define STM32F746_PI6_FUNC_LCD_B6 0x860f
1164 #define STM32F746_PI6_FUNC_EVENTOUT 0x8610
1165 #define STM32F746_PI6_FUNC_ANALOG 0x8611
1166 
1167 #define STM32F746_PI7_FUNC_GPIO 0x8700
1168 #define STM32F746_PI7_FUNC_TIM8_CH3 0x8704
1169 #define STM32F746_PI7_FUNC_SAI2_FS_A 0x870b
1170 #define STM32F746_PI7_FUNC_FMC_D29 0x870d
1171 #define STM32F746_PI7_FUNC_DCMI_D7 0x870e
1172 #define STM32F746_PI7_FUNC_LCD_B7 0x870f
1173 #define STM32F746_PI7_FUNC_EVENTOUT 0x8710
1174 #define STM32F746_PI7_FUNC_ANALOG 0x8711
1175 
1176 #define STM32F746_PI8_FUNC_GPIO 0x8800
1177 #define STM32F746_PI8_FUNC_EVENTOUT 0x8810
1178 #define STM32F746_PI8_FUNC_ANALOG 0x8811
1179 
1180 #define STM32F746_PI9_FUNC_GPIO 0x8900
1181 #define STM32F746_PI9_FUNC_CAN1_RX 0x890a
1182 #define STM32F746_PI9_FUNC_FMC_D30 0x890d
1183 #define STM32F746_PI9_FUNC_LCD_VSYNC 0x890f
1184 #define STM32F746_PI9_FUNC_EVENTOUT 0x8910
1185 #define STM32F746_PI9_FUNC_ANALOG 0x8911
1186 
1187 #define STM32F746_PI10_FUNC_GPIO 0x8a00
1188 #define STM32F746_PI10_FUNC_ETH_MII_RX_ER 0x8a0c
1189 #define STM32F746_PI10_FUNC_FMC_D31 0x8a0d
1190 #define STM32F746_PI10_FUNC_LCD_HSYNC 0x8a0f
1191 #define STM32F746_PI10_FUNC_EVENTOUT 0x8a10
1192 #define STM32F746_PI10_FUNC_ANALOG 0x8a11
1193 
1194 #define STM32F746_PI11_FUNC_GPIO 0x8b00
1195 #define STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b
1196 #define STM32F746_PI11_FUNC_EVENTOUT 0x8b10
1197 #define STM32F746_PI11_FUNC_ANALOG 0x8b11
1198 
1199 #define STM32F746_PI12_FUNC_GPIO 0x8c00
1200 #define STM32F746_PI12_FUNC_LCD_HSYNC 0x8c0f
1201 #define STM32F746_PI12_FUNC_EVENTOUT 0x8c10
1202 #define STM32F746_PI12_FUNC_ANALOG 0x8c11
1203 
1204 #define STM32F746_PI13_FUNC_GPIO 0x8d00
1205 #define STM32F746_PI13_FUNC_LCD_VSYNC 0x8d0f
1206 #define STM32F746_PI13_FUNC_EVENTOUT 0x8d10
1207 #define STM32F746_PI13_FUNC_ANALOG 0x8d11
1208 
1209 #define STM32F746_PI14_FUNC_GPIO 0x8e00
1210 #define STM32F746_PI14_FUNC_LCD_CLK 0x8e0f
1211 #define STM32F746_PI14_FUNC_EVENTOUT 0x8e10
1212 #define STM32F746_PI14_FUNC_ANALOG 0x8e11
1213 
1214 #define STM32F746_PI15_FUNC_GPIO 0x8f00
1215 #define STM32F746_PI15_FUNC_LCD_R0 0x8f0f
1216 #define STM32F746_PI15_FUNC_EVENTOUT 0x8f10
1217 #define STM32F746_PI15_FUNC_ANALOG 0x8f11
1218 
1219 
1220 #define STM32F746_PJ0_FUNC_GPIO 0x9000
1221 #define STM32F746_PJ0_FUNC_LCD_R1 0x900f
1222 #define STM32F746_PJ0_FUNC_EVENTOUT 0x9010
1223 #define STM32F746_PJ0_FUNC_ANALOG 0x9011
1224 
1225 #define STM32F746_PJ1_FUNC_GPIO 0x9100
1226 #define STM32F746_PJ1_FUNC_LCD_R2 0x910f
1227 #define STM32F746_PJ1_FUNC_EVENTOUT 0x9110
1228 #define STM32F746_PJ1_FUNC_ANALOG 0x9111
1229 
1230 #define STM32F746_PJ2_FUNC_GPIO 0x9200
1231 #define STM32F746_PJ2_FUNC_LCD_R3 0x920f
1232 #define STM32F746_PJ2_FUNC_EVENTOUT 0x9210
1233 #define STM32F746_PJ2_FUNC_ANALOG 0x9211
1234 
1235 #define STM32F746_PJ3_FUNC_GPIO 0x9300
1236 #define STM32F746_PJ3_FUNC_LCD_R4 0x930f
1237 #define STM32F746_PJ3_FUNC_EVENTOUT 0x9310
1238 #define STM32F746_PJ3_FUNC_ANALOG 0x9311
1239 
1240 #define STM32F746_PJ4_FUNC_GPIO 0x9400
1241 #define STM32F746_PJ4_FUNC_LCD_R5 0x940f
1242 #define STM32F746_PJ4_FUNC_EVENTOUT 0x9410
1243 #define STM32F746_PJ4_FUNC_ANALOG 0x9411
1244 
1245 #define STM32F746_PJ5_FUNC_GPIO 0x9500
1246 #define STM32F746_PJ5_FUNC_LCD_R6 0x950f
1247 #define STM32F746_PJ5_FUNC_EVENTOUT 0x9510
1248 #define STM32F746_PJ5_FUNC_ANALOG 0x9511
1249 
1250 #define STM32F746_PJ6_FUNC_GPIO 0x9600
1251 #define STM32F746_PJ6_FUNC_LCD_R7 0x960f
1252 #define STM32F746_PJ6_FUNC_EVENTOUT 0x9610
1253 #define STM32F746_PJ6_FUNC_ANALOG 0x9611
1254 
1255 #define STM32F746_PJ7_FUNC_GPIO 0x9700
1256 #define STM32F746_PJ7_FUNC_LCD_G0 0x970f
1257 #define STM32F746_PJ7_FUNC_EVENTOUT 0x9710
1258 #define STM32F746_PJ7_FUNC_ANALOG 0x9711
1259 
1260 #define STM32F746_PJ8_FUNC_GPIO 0x9800
1261 #define STM32F746_PJ8_FUNC_LCD_G1 0x980f
1262 #define STM32F746_PJ8_FUNC_EVENTOUT 0x9810
1263 #define STM32F746_PJ8_FUNC_ANALOG 0x9811
1264 
1265 #define STM32F746_PJ9_FUNC_GPIO 0x9900
1266 #define STM32F746_PJ9_FUNC_LCD_G2 0x990f
1267 #define STM32F746_PJ9_FUNC_EVENTOUT 0x9910
1268 #define STM32F746_PJ9_FUNC_ANALOG 0x9911
1269 
1270 #define STM32F746_PJ10_FUNC_GPIO 0x9a00
1271 #define STM32F746_PJ10_FUNC_LCD_G3 0x9a0f
1272 #define STM32F746_PJ10_FUNC_EVENTOUT 0x9a10
1273 #define STM32F746_PJ10_FUNC_ANALOG 0x9a11
1274 
1275 #define STM32F746_PJ11_FUNC_GPIO 0x9b00
1276 #define STM32F746_PJ11_FUNC_LCD_G4 0x9b0f
1277 #define STM32F746_PJ11_FUNC_EVENTOUT 0x9b10
1278 #define STM32F746_PJ11_FUNC_ANALOG 0x9b11
1279 
1280 #define STM32F746_PJ12_FUNC_GPIO 0x9c00
1281 #define STM32F746_PJ12_FUNC_LCD_B0 0x9c0f
1282 #define STM32F746_PJ12_FUNC_EVENTOUT 0x9c10
1283 #define STM32F746_PJ12_FUNC_ANALOG 0x9c11
1284 
1285 #define STM32F746_PJ13_FUNC_GPIO 0x9d00
1286 #define STM32F746_PJ13_FUNC_LCD_B1 0x9d0f
1287 #define STM32F746_PJ13_FUNC_EVENTOUT 0x9d10
1288 #define STM32F746_PJ13_FUNC_ANALOG 0x9d11
1289 
1290 #define STM32F746_PJ14_FUNC_GPIO 0x9e00
1291 #define STM32F746_PJ14_FUNC_LCD_B2 0x9e0f
1292 #define STM32F746_PJ14_FUNC_EVENTOUT 0x9e10
1293 #define STM32F746_PJ14_FUNC_ANALOG 0x9e11
1294 
1295 #define STM32F746_PJ15_FUNC_GPIO 0x9f00
1296 #define STM32F746_PJ15_FUNC_LCD_B3 0x9f0f
1297 #define STM32F746_PJ15_FUNC_EVENTOUT 0x9f10
1298 #define STM32F746_PJ15_FUNC_ANALOG 0x9f11
1299 
1300 
1301 #define STM32F746_PK0_FUNC_GPIO 0xa000
1302 #define STM32F746_PK0_FUNC_LCD_G5 0xa00f
1303 #define STM32F746_PK0_FUNC_EVENTOUT 0xa010
1304 #define STM32F746_PK0_FUNC_ANALOG 0xa011
1305 
1306 #define STM32F746_PK1_FUNC_GPIO 0xa100
1307 #define STM32F746_PK1_FUNC_LCD_G6 0xa10f
1308 #define STM32F746_PK1_FUNC_EVENTOUT 0xa110
1309 #define STM32F746_PK1_FUNC_ANALOG 0xa111
1310 
1311 #define STM32F746_PK2_FUNC_GPIO 0xa200
1312 #define STM32F746_PK2_FUNC_LCD_G7 0xa20f
1313 #define STM32F746_PK2_FUNC_EVENTOUT 0xa210
1314 #define STM32F746_PK2_FUNC_ANALOG 0xa211
1315 
1316 #define STM32F746_PK3_FUNC_GPIO 0xa300
1317 #define STM32F746_PK3_FUNC_LCD_B4 0xa30f
1318 #define STM32F746_PK3_FUNC_EVENTOUT 0xa310
1319 #define STM32F746_PK3_FUNC_ANALOG 0xa311
1320 
1321 #define STM32F746_PK4_FUNC_GPIO 0xa400
1322 #define STM32F746_PK4_FUNC_LCD_B5 0xa40f
1323 #define STM32F746_PK4_FUNC_EVENTOUT 0xa410
1324 #define STM32F746_PK4_FUNC_ANALOG 0xa411
1325 
1326 #define STM32F746_PK5_FUNC_GPIO 0xa500
1327 #define STM32F746_PK5_FUNC_LCD_B6 0xa50f
1328 #define STM32F746_PK5_FUNC_EVENTOUT 0xa510
1329 #define STM32F746_PK5_FUNC_ANALOG 0xa511
1330 
1331 #define STM32F746_PK6_FUNC_GPIO 0xa600
1332 #define STM32F746_PK6_FUNC_LCD_B7 0xa60f
1333 #define STM32F746_PK6_FUNC_EVENTOUT 0xa610
1334 #define STM32F746_PK6_FUNC_ANALOG 0xa611
1335 
1336 #define STM32F746_PK7_FUNC_GPIO 0xa700
1337 #define STM32F746_PK7_FUNC_LCD_DE 0xa70f
1338 #define STM32F746_PK7_FUNC_EVENTOUT 0xa710
1339 #define STM32F746_PK7_FUNC_ANALOG 0xa711
1340 
1341 #endif /* _DT_BINDINGS_STM32F746_PINFUNC_H */
1342