1*ce2f2d2aSStephen Warren #ifndef DT_BINDINGS_MEMORY_TEGRA30_MC_H 2*ce2f2d2aSStephen Warren #define DT_BINDINGS_MEMORY_TEGRA30_MC_H 3*ce2f2d2aSStephen Warren 4*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_PTC 0 5*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_DC 1 6*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_DCB 2 7*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_EPP 3 8*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_G2 4 9*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_MPE 5 10*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_VI 6 11*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_AFI 7 12*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_AVPC 8 13*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_NV 9 14*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_NV2 10 15*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_HDA 11 16*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_HC 12 17*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_PPCS 13 18*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_SATA 14 19*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_VDE 15 20*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_MPCORELP 16 21*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_MPCORE 17 22*ce2f2d2aSStephen Warren #define TEGRA_SWGROUP_ISP 18 23*ce2f2d2aSStephen Warren 24*ce2f2d2aSStephen Warren #endif 25