1 /* 2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> 3 * 4 * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __DT_BINDINGS_CLOCK_BCM63268_H 10 #define __DT_BINDINGS_CLOCK_BCM63268_H 11 12 #define BCM63268_CLK_GLESS 0 13 #define BCM63268_CLK_VDSL_QPROC 1 14 #define BCM63268_CLK_VDSL_AFE 2 15 #define BCM63268_CLK_VDSL 3 16 #define BCM63268_CLK_MIPS 4 17 #define BCM63268_CLK_WLAN_OCP 5 18 #define BCM63268_CLK_DECT 6 19 #define BCM63268_CLK_FAP0 7 20 #define BCM63268_CLK_FAP1 8 21 #define BCM63268_CLK_SAR 9 22 #define BCM63268_CLK_ROBOSW 10 23 #define BCM63268_CLK_PCM 11 24 #define BCM63268_CLK_USBD 12 25 #define BCM63268_CLK_USBH 13 26 #define BCM63268_CLK_IPSEC 14 27 #define BCM63268_CLK_SPI 15 28 #define BCM63268_CLK_HSSPI 16 29 #define BCM63268_CLK_PCIE 17 30 #define BCM63268_CLK_PHYMIPS 18 31 #define BCM63268_CLK_GMAC 19 32 #define BCM63268_CLK_NAND 20 33 #define BCM63268_CLK_TBUS 27 34 #define BCM63268_CLK_ROBOSW250 31 35 36 #define BCM63268_TCLK_EPHY1 0 37 #define BCM63268_TCLK_EPHY2 1 38 #define BCM63268_TCLK_EPHY3 2 39 #define BCM63268_TCLK_GPHY 3 40 #define BCM63268_TCLK_DSL 4 41 #define BCM63268_TCLK_WO_EPHY 5 42 #define BCM63268_TCLK_WO_DSL 6 43 #define BCM63268_TCLK_FAP1 11 44 #define BCM63268_TCLK_FAP2 15 45 #define BCM63268_TCLK_UTO_50 16 46 #define BCM63268_TCLK_UTO_EXT 17 47 #define BCM63268_TCLK_USB_REF 18 48 #define BCM63268_TCLK_SW_RST 29 49 #define BCM63268_TCLK_HW_RST 30 50 #define BCM63268_TCLK_POR_RST 31 51 52 #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */ 53