xref: /openbmc/u-boot/include/dm/uclass-id.h (revision ed4708aa)
1 /*
2  * Copyright (c) 2013 Google, Inc
3  *
4  * (C) Copyright 2012
5  * Pavel Herrmann <morpheus.ibis@gmail.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef _DM_UCLASS_ID_H
11 #define _DM_UCLASS_ID_H
12 
13 /* TODO(sjg@chromium.org): this could be compile-time generated */
14 enum uclass_id {
15 	/* These are used internally by driver model */
16 	UCLASS_ROOT = 0,
17 	UCLASS_DEMO,
18 	UCLASS_TEST,
19 	UCLASS_TEST_FDT,
20 	UCLASS_TEST_BUS,
21 	UCLASS_SPI_EMUL,	/* sandbox SPI device emulator */
22 	UCLASS_I2C_EMUL,	/* sandbox I2C device emulator */
23 	UCLASS_PCI_EMUL,	/* sandbox PCI device emulator */
24 	UCLASS_USB_EMUL,	/* sandbox USB bus device emulator */
25 	UCLASS_SIMPLE_BUS,	/* bus with child devices */
26 
27 	/* U-Boot uclasses start here - in alphabetical order */
28 	UCLASS_ADC,		/* Analog-to-digital converter */
29 	UCLASS_AHCI,		/* SATA disk controller */
30 	UCLASS_BLK,		/* Block device */
31 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
32 	UCLASS_CPU,		/* CPU, typically part of an SoC */
33 	UCLASS_CROS_EC,		/* Chrome OS EC */
34 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
35 	UCLASS_DMA,		/* Direct Memory Access */
36 	UCLASS_RAM,		/* RAM controller */
37 	UCLASS_ETH,		/* Ethernet device */
38 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
39 	UCLASS_I2C,		/* I2C bus */
40 	UCLASS_I2C_EEPROM,	/* I2C EEPROM device */
41 	UCLASS_I2C_GENERIC,	/* Generic I2C device */
42 	UCLASS_I2C_MUX,		/* I2C multiplexer */
43 	UCLASS_IRQ,		/* Interrupt controller */
44 	UCLASS_KEYBOARD,	/* Keyboard input device */
45 	UCLASS_LED,		/* Light-emitting diode (LED) */
46 	UCLASS_LPC,		/* x86 'low pin count' interface */
47 	UCLASS_MAILBOX,		/* Mailbox controller */
48 	UCLASS_MASS_STORAGE,	/* Mass storage device */
49 	UCLASS_MISC,		/* Miscellaneous device */
50 	UCLASS_MMC,		/* SD / MMC card or chip */
51 	UCLASS_MOD_EXP,		/* RSA Mod Exp device */
52 	UCLASS_MTD,		/* Memory Technology Device (MTD) device */
53 	UCLASS_NORTHBRIDGE,	/* Intel Northbridge / SDRAM controller */
54 	UCLASS_PANEL,		/* Display panel, such as an LCD */
55 	UCLASS_PANEL_BACKLIGHT,	/* Backlight controller for panel */
56 	UCLASS_PCH,		/* x86 platform controller hub */
57 	UCLASS_PCI,		/* PCI bus */
58 	UCLASS_PCI_GENERIC,	/* Generic PCI bus device */
59 	UCLASS_PINCTRL,		/* Pinctrl (pin muxing/configuration) device */
60 	UCLASS_PINCONFIG,	/* Pin configuration node device */
61 	UCLASS_PMIC,		/* PMIC I/O device */
62 	UCLASS_PWM,		/* Pulse-width modulator */
63 	UCLASS_PWRSEQ,		/* Power sequence device */
64 	UCLASS_REGULATOR,	/* Regulator device */
65 	UCLASS_REMOTEPROC,	/* Remote Processor device */
66 	UCLASS_RTC,		/* Real time clock device */
67 	UCLASS_SERIAL,		/* Serial UART */
68 	UCLASS_SPI,		/* SPI bus */
69 	UCLASS_SPMI,		/* System Power Management Interface bus */
70 	UCLASS_SPI_FLASH,	/* SPI flash */
71 	UCLASS_SPI_GENERIC,	/* Generic SPI flash target */
72 	UCLASS_SYSCON,		/* System configuration device */
73 	UCLASS_SYSRESET,	/* System reset device */
74 	UCLASS_THERMAL,		/* Thermal sensor */
75 	UCLASS_TIMER,		/* Timer device */
76 	UCLASS_TPM,		/* Trusted Platform Module TIS interface */
77 	UCLASS_USB,		/* USB bus */
78 	UCLASS_USB_DEV_GENERIC,	/* USB generic device */
79 	UCLASS_USB_HUB,		/* USB hub */
80 	UCLASS_VIDEO,		/* Video or LCD device */
81 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
82 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
83 
84 	UCLASS_COUNT,
85 	UCLASS_INVALID = -1,
86 };
87 
88 #endif
89