1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (c) 2013 Google, Inc 4 * 5 * (C) Copyright 2012 6 * Pavel Herrmann <morpheus.ibis@gmail.com> 7 */ 8 9 #ifndef _DM_UCLASS_ID_H 10 #define _DM_UCLASS_ID_H 11 12 /* TODO(sjg@chromium.org): this could be compile-time generated */ 13 enum uclass_id { 14 /* These are used internally by driver model */ 15 UCLASS_ROOT = 0, 16 UCLASS_DEMO, 17 UCLASS_TEST, 18 UCLASS_TEST_FDT, 19 UCLASS_TEST_BUS, 20 UCLASS_TEST_PROBE, 21 UCLASS_TEST_DUMMY, 22 UCLASS_SPI_EMUL, /* sandbox SPI device emulator */ 23 UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ 24 UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ 25 UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ 26 UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ 27 UCLASS_SIMPLE_BUS, /* bus with child devices */ 28 29 /* U-Boot uclasses start here - in alphabetical order */ 30 UCLASS_ADC, /* Analog-to-digital converter */ 31 UCLASS_AHCI, /* SATA disk controller */ 32 UCLASS_BLK, /* Block device */ 33 UCLASS_CLK, /* Clock source, e.g. used by peripherals */ 34 UCLASS_CPU, /* CPU, typically part of an SoC */ 35 UCLASS_CROS_EC, /* Chrome OS EC */ 36 UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ 37 UCLASS_DMA, /* Direct Memory Access */ 38 UCLASS_EFI, /* EFI managed devices */ 39 UCLASS_ETH, /* Ethernet device */ 40 UCLASS_GPIO, /* Bank of general-purpose I/O pins */ 41 UCLASS_FIRMWARE, /* Firmware */ 42 UCLASS_I2C, /* I2C bus */ 43 UCLASS_I2C_EEPROM, /* I2C EEPROM device */ 44 UCLASS_I2C_GENERIC, /* Generic I2C device */ 45 UCLASS_I2C_MUX, /* I2C multiplexer */ 46 UCLASS_IDE, /* IDE device */ 47 UCLASS_AXI, /* AXI bus */ 48 UCLASS_IRQ, /* Interrupt controller */ 49 UCLASS_KEYBOARD, /* Keyboard input device */ 50 UCLASS_LED, /* Light-emitting diode (LED) */ 51 UCLASS_LPC, /* x86 'low pin count' interface */ 52 UCLASS_MAILBOX, /* Mailbox controller */ 53 UCLASS_MASS_STORAGE, /* Mass storage device */ 54 UCLASS_MISC, /* Miscellaneous device */ 55 UCLASS_MMC, /* SD / MMC card or chip */ 56 UCLASS_MOD_EXP, /* RSA Mod Exp device */ 57 UCLASS_MTD, /* Memory Technology Device (MTD) device */ 58 UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ 59 UCLASS_NVME, /* NVM Express device */ 60 UCLASS_PANEL, /* Display panel, such as an LCD */ 61 UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */ 62 UCLASS_PCH, /* x86 platform controller hub */ 63 UCLASS_PCI, /* PCI bus */ 64 UCLASS_PCI_GENERIC, /* Generic PCI bus device */ 65 UCLASS_PHY, /* Physical Layer (PHY) device */ 66 UCLASS_PINCONFIG, /* Pin configuration node device */ 67 UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */ 68 UCLASS_PMIC, /* PMIC I/O device */ 69 UCLASS_PWM, /* Pulse-width modulator */ 70 UCLASS_POWER_DOMAIN, /* (SoC) Power domains */ 71 UCLASS_PWRSEQ, /* Power sequence device */ 72 UCLASS_RAM, /* RAM controller */ 73 UCLASS_REGULATOR, /* Regulator device */ 74 UCLASS_REMOTEPROC, /* Remote Processor device */ 75 UCLASS_RESET, /* Reset controller device */ 76 UCLASS_RTC, /* Real time clock device */ 77 UCLASS_SCSI, /* SCSI device */ 78 UCLASS_SERIAL, /* Serial UART */ 79 UCLASS_SMEM, /* Shared memory interface */ 80 UCLASS_SPI, /* SPI bus */ 81 UCLASS_SPMI, /* System Power Management Interface bus */ 82 UCLASS_SPI_FLASH, /* SPI flash */ 83 UCLASS_SPI_GENERIC, /* Generic SPI flash target */ 84 UCLASS_SYSCON, /* System configuration device */ 85 UCLASS_SYSRESET, /* System reset device */ 86 UCLASS_THERMAL, /* Thermal sensor */ 87 UCLASS_TIMER, /* Timer device */ 88 UCLASS_TPM, /* Trusted Platform Module TIS interface */ 89 UCLASS_USB, /* USB bus */ 90 UCLASS_USB_DEV_GENERIC, /* USB generic device */ 91 UCLASS_USB_HUB, /* USB hub */ 92 UCLASS_VIDEO, /* Video or LCD device */ 93 UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ 94 UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ 95 UCLASS_WDT, /* Watchdot Timer driver */ 96 97 UCLASS_COUNT, 98 UCLASS_INVALID = -1, 99 }; 100 101 #endif 102