1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ	800000000
16 #endif
17 
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE		0xf8f02000
23 #endif
24 
25 #define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
26 #define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
29 
30 /* Serial drivers */
31 #define CONFIG_BAUDRATE		115200
32 /* The following table includes the supported baudrates */
33 #define CONFIG_SYS_BAUDRATE_TABLE  \
34 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
35 
36 #define CONFIG_ARM_DCC
37 #define CONFIG_ZYNQ_SERIAL
38 
39 /* Ethernet driver */
40 #if defined(CONFIG_ZYNQ_GEM)
41 # define CONFIG_MII
42 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
43 # define CONFIG_PHY_MARVELL
44 # define CONFIG_PHY_REALTEK
45 # define CONFIG_PHY_XILINX
46 # define CONFIG_BOOTP_SERVERIP
47 # define CONFIG_BOOTP_BOOTPATH
48 # define CONFIG_BOOTP_GATEWAY
49 # define CONFIG_BOOTP_HOSTNAME
50 # define CONFIG_BOOTP_MAY_FAIL
51 #endif
52 
53 /* SPI */
54 #ifdef CONFIG_ZYNQ_SPI
55 #endif
56 
57 /* QSPI */
58 #ifdef CONFIG_ZYNQ_QSPI
59 # define CONFIG_SF_DEFAULT_SPEED	30000000
60 # define CONFIG_SPI_FLASH_ISSI
61 #endif
62 
63 /* NOR */
64 #ifndef CONFIG_SYS_NO_FLASH
65 # define CONFIG_SYS_FLASH_BASE		0xE2000000
66 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
67 # define CONFIG_SYS_MAX_FLASH_BANKS	1
68 # define CONFIG_SYS_MAX_FLASH_SECT	512
69 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
70 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
71 # define CONFIG_FLASH_SHOW_PROGRESS	10
72 # define CONFIG_SYS_FLASH_CFI
73 # undef CONFIG_SYS_FLASH_EMPTY_INFO
74 # define CONFIG_FLASH_CFI_DRIVER
75 # undef CONFIG_SYS_FLASH_PROTECTION
76 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
77 #endif
78 
79 #ifdef CONFIG_NAND_ZYNQ
80 #define CONFIG_CMD_NAND_LOCK_UNLOCK
81 #define CONFIG_SYS_MAX_NAND_DEVICE	1
82 #define CONFIG_SYS_NAND_ONFI_DETECTION
83 #define CONFIG_MTD_DEVICE
84 #endif
85 
86 /* MMC */
87 #if defined(CONFIG_ZYNQ_SDHCI)
88 # define CONFIG_MMC
89 # define CONFIG_GENERIC_MMC
90 # define CONFIG_SDHCI
91 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
92 #endif
93 
94 #ifdef CONFIG_USB_EHCI_ZYNQ
95 # define CONFIG_EHCI_IS_TDI
96 
97 # define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
98 # define DFU_DEFAULT_POLL_TIMEOUT	300
99 # define CONFIG_USB_CABLE_CHECK
100 # define CONFIG_CMD_THOR_DOWNLOAD
101 # define CONFIG_THOR_RESET_OFF
102 # define CONFIG_USB_FUNCTION_THOR
103 # define DFU_ALT_INFO_RAM \
104 	"dfu_ram_info=" \
105 	"set dfu_alt_info " \
106 	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
107 	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
108 	"${ramdisk_image} ram 0x2000000 0x600000\0" \
109 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
110 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
111 
112 # if defined(CONFIG_ZYNQ_SDHCI)
113 #  define DFU_ALT_INFO_MMC \
114 	"dfu_mmc_info=" \
115 	"set dfu_alt_info " \
116 	"${kernel_image} fat 0 1\\\\;" \
117 	"${devicetree_image} fat 0 1\\\\;" \
118 	"${ramdisk_image} fat 0 1\0" \
119 	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
120 	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
121 
122 #  define DFU_ALT_INFO	\
123 	DFU_ALT_INFO_RAM \
124 	DFU_ALT_INFO_MMC
125 # else
126 #  define DFU_ALT_INFO	\
127 	DFU_ALT_INFO_RAM
128 # endif
129 #endif
130 
131 #if !defined(DFU_ALT_INFO)
132 # define DFU_ALT_INFO
133 #endif
134 
135 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
136 # define CONFIG_SUPPORT_VFAT
137 # define CONFIG_FAT_WRITE
138 # define CONFIG_DOS_PARTITION
139 #endif
140 
141 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
142 #define CONFIG_SYS_I2C_ZYNQ
143 #endif
144 
145 /* I2C */
146 #if defined(CONFIG_SYS_I2C_ZYNQ)
147 # define CONFIG_SYS_I2C
148 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
149 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
150 #endif
151 
152 /* EEPROM */
153 #ifdef CONFIG_ZYNQ_EEPROM
154 # define CONFIG_CMD_EEPROM
155 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
156 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
157 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
158 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
159 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
160 #endif
161 
162 /* Total Size of Environment Sector */
163 #define CONFIG_ENV_SIZE			(128 << 10)
164 
165 /* Allow to overwrite serial and ethaddr */
166 #define CONFIG_ENV_OVERWRITE
167 
168 /* Environment */
169 #ifndef CONFIG_ENV_IS_NOWHERE
170 # ifndef CONFIG_SYS_NO_FLASH
171 /* Environment in NOR flash */
172 #  define CONFIG_ENV_IS_IN_FLASH
173 # elif defined(CONFIG_ZYNQ_QSPI)
174 /* Environment in Serial Flash */
175 #  define CONFIG_ENV_IS_IN_SPI_FLASH
176 # elif defined(CONFIG_SYS_NO_FLASH)
177 #  define CONFIG_ENV_IS_NOWHERE
178 # endif
179 
180 # define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
181 # define CONFIG_ENV_OFFSET		0xE0000
182 #endif
183 
184 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
185 #define CONFIG_PREBOOT
186 
187 /* Default environment */
188 #ifndef CONFIG_EXTRA_ENV_SETTINGS
189 #define CONFIG_EXTRA_ENV_SETTINGS	\
190 	"fit_image=fit.itb\0"		\
191 	"load_addr=0x2000000\0"		\
192 	"fit_size=0x800000\0"		\
193 	"flash_off=0x100000\0"		\
194 	"nor_flash_off=0xE2100000\0"	\
195 	"fdt_high=0x20000000\0"		\
196 	"initrd_high=0x20000000\0"	\
197 	"loadbootenv_addr=0x2000000\0" \
198 	"bootenv=uEnv.txt\0" \
199 	"bootenv_dev=mmc\0" \
200 	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
201 	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
202 		"env import -t ${loadbootenv_addr} $filesize\0" \
203 	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
204 	"setbootenv=if env run bootenv_existence_test; then " \
205 			"if env run loadbootenv; then " \
206 				"env run importbootenv; " \
207 			"fi; " \
208 		"fi; \0" \
209 	"sd_loadbootenv=set bootenv_dev mmc && " \
210 			"run setbootenv \0" \
211 	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
212 	"preboot=if test $modeboot = sdboot; then " \
213 			"run sd_loadbootenv; " \
214 			"echo Checking if uenvcmd is set ...; " \
215 			"if test -n $uenvcmd; then " \
216 				"echo Running uenvcmd ...; " \
217 				"run uenvcmd; " \
218 			"fi; " \
219 		"fi; \0" \
220 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
221 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
222 		"bootm ${load_addr}\0" \
223 	"sdboot=echo Copying FIT from SD to RAM... && " \
224 		"load mmc 0 ${load_addr} ${fit_image} && " \
225 		"bootm ${load_addr}\0" \
226 	"jtagboot=echo TFTPing FIT to RAM... && " \
227 		"tftpboot ${load_addr} ${fit_image} && " \
228 		"bootm ${load_addr}\0" \
229 	"usbboot=if usb start; then " \
230 			"echo Copying FIT from USB to RAM... && " \
231 			"load usb 0 ${load_addr} ${fit_image} && " \
232 			"bootm ${load_addr}; fi\0" \
233 		DFU_ALT_INFO
234 #endif
235 
236 #define CONFIG_BOOTCOMMAND		"run $modeboot"
237 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
238 
239 /* Miscellaneous configurable options */
240 
241 #define CONFIG_CMDLINE_EDITING
242 #define CONFIG_AUTO_COMPLETE
243 #define CONFIG_BOARD_LATE_INIT
244 #define CONFIG_SYS_LONGHELP
245 #define CONFIG_CLOCKS
246 #define CONFIG_CMD_CLK
247 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
248 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
249 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
250 					sizeof(CONFIG_SYS_PROMPT) + 16)
251 
252 /* Physical Memory map */
253 #define CONFIG_SYS_TEXT_BASE		0x4000000
254 
255 #ifndef CONFIG_NR_DRAM_BANKS
256 # define CONFIG_NR_DRAM_BANKS		1
257 #endif
258 
259 #define CONFIG_SYS_MEMTEST_START	0
260 #define CONFIG_SYS_MEMTEST_END		0x1000
261 
262 #define CONFIG_SYS_MALLOC_LEN		0x1400000
263 
264 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
265 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
266 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
267 					CONFIG_SYS_INIT_RAM_SIZE - \
268 					GENERATED_GBL_DATA_SIZE)
269 
270 /* Enable the PL to be downloaded */
271 #define CONFIG_FPGA
272 #define CONFIG_FPGA_XILINX
273 #define CONFIG_FPGA_ZYNQPL
274 #define CONFIG_CMD_FPGA_LOADMK
275 #define CONFIG_CMD_FPGA_LOADP
276 #define CONFIG_CMD_FPGA_LOADBP
277 #define CONFIG_CMD_FPGA_LOADFS
278 
279 /* FIT support */
280 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
281 
282 /* FDT support */
283 #define CONFIG_DISPLAY_BOARDINFO_LATE
284 
285 /* Extend size of kernel image for uncompression */
286 #define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)
287 
288 /* Boot FreeBSD/vxWorks from an ELF image */
289 #define CONFIG_SYS_MMC_MAX_DEVICE	1
290 
291 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
292 
293 /* Commands */
294 
295 /* SPL part */
296 #define CONFIG_CMD_SPL
297 #define CONFIG_SPL_FRAMEWORK
298 #define CONFIG_SPL_BOARD_INIT
299 #define CONFIG_SPL_RAM_DEVICE
300 
301 #define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"
302 
303 /* MMC support */
304 #ifdef CONFIG_ZYNQ_SDHCI
305 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
306 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
307 #endif
308 
309 /* Disable dcache for SPL just for sure */
310 #ifdef CONFIG_SPL_BUILD
311 #define CONFIG_SYS_DCACHE_OFF
312 #undef CONFIG_FPGA
313 #endif
314 
315 /* Address in RAM where the parameters must be copied by SPL. */
316 #define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
317 
318 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
319 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
320 
321 /* Not using MMC raw mode - just for compilation purpose */
322 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
323 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
324 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
325 
326 /* qspi mode is working fine */
327 #ifdef CONFIG_ZYNQ_QSPI
328 #define CONFIG_SPL_SPI_LOAD
329 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
330 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
331 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
332 #define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
333 					CONFIG_SYS_SPI_ARGS_SIZE)
334 #endif
335 
336 /* for booting directly linux */
337 
338 /* SP location before relocation, must use scratch RAM */
339 #define CONFIG_SPL_TEXT_BASE	0x0
340 
341 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
342 #define CONFIG_SPL_MAX_SIZE	0x30000
343 
344 /* The highest 64k OCM address */
345 #define OCM_HIGH_ADDR	0xffff0000
346 
347 /* On the top of OCM space */
348 #define CONFIG_SYS_SPL_MALLOC_START	OCM_HIGH_ADDR
349 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000
350 
351 /*
352  * SPL stack position - and stack goes down
353  * 0xfffffe00 is used for putting wfi loop.
354  * Set it up as limit for now.
355  */
356 #define CONFIG_SPL_STACK	0xfffffe00
357 
358 /* BSS setup */
359 #define CONFIG_SPL_BSS_START_ADDR	0x100000
360 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
361 
362 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
363 
364 #endif /* __CONFIG_ZYNQ_COMMON_H */
365