1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ	800000000
16 #endif
17 
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE		0xf8f02000
23 #endif
24 
25 #define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
26 #define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
29 
30 /* Serial drivers */
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE  \
33 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
34 
35 #define CONFIG_ARM_DCC
36 #define CONFIG_ZYNQ_SERIAL
37 
38 /* Ethernet driver */
39 #if defined(CONFIG_ZYNQ_GEM)
40 # define CONFIG_MII
41 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
42 # define CONFIG_PHY_MARVELL
43 # define CONFIG_PHY_REALTEK
44 # define CONFIG_PHY_XILINX
45 # define CONFIG_BOOTP_BOOTPATH
46 # define CONFIG_BOOTP_GATEWAY
47 # define CONFIG_BOOTP_HOSTNAME
48 # define CONFIG_BOOTP_MAY_FAIL
49 #endif
50 
51 /* SPI */
52 #ifdef CONFIG_ZYNQ_SPI
53 #endif
54 
55 /* QSPI */
56 #ifdef CONFIG_ZYNQ_QSPI
57 # define CONFIG_SF_DEFAULT_SPEED	30000000
58 # define CONFIG_SPI_FLASH_ISSI
59 #endif
60 
61 /* NOR */
62 #ifdef CONFIG_MTD_NOR_FLASH
63 # define CONFIG_SYS_FLASH_BASE		0xE2000000
64 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
65 # define CONFIG_SYS_MAX_FLASH_BANKS	1
66 # define CONFIG_SYS_MAX_FLASH_SECT	512
67 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
68 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
69 # define CONFIG_FLASH_SHOW_PROGRESS	10
70 # define CONFIG_SYS_FLASH_CFI
71 # undef CONFIG_SYS_FLASH_EMPTY_INFO
72 # define CONFIG_FLASH_CFI_DRIVER
73 # undef CONFIG_SYS_FLASH_PROTECTION
74 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
75 #endif
76 
77 #ifdef CONFIG_NAND_ZYNQ
78 #define CONFIG_CMD_NAND_LOCK_UNLOCK
79 #define CONFIG_SYS_MAX_NAND_DEVICE	1
80 #define CONFIG_SYS_NAND_ONFI_DETECTION
81 #define CONFIG_MTD_DEVICE
82 #endif
83 
84 /* MMC */
85 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
86 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
87 #endif
88 
89 #ifdef CONFIG_USB_EHCI_ZYNQ
90 # define CONFIG_EHCI_IS_TDI
91 
92 # define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
93 # define DFU_DEFAULT_POLL_TIMEOUT	300
94 # define CONFIG_USB_CABLE_CHECK
95 # define CONFIG_CMD_THOR_DOWNLOAD
96 # define CONFIG_THOR_RESET_OFF
97 # define CONFIG_USB_FUNCTION_THOR
98 # define DFU_ALT_INFO_RAM \
99 	"dfu_ram_info=" \
100 	"set dfu_alt_info " \
101 	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
102 	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
103 	"${ramdisk_image} ram 0x2000000 0x600000\0" \
104 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
105 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
106 
107 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
108 #  define DFU_ALT_INFO_MMC \
109 	"dfu_mmc_info=" \
110 	"set dfu_alt_info " \
111 	"${kernel_image} fat 0 1\\\\;" \
112 	"${devicetree_image} fat 0 1\\\\;" \
113 	"${ramdisk_image} fat 0 1\0" \
114 	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
115 	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
116 
117 #  define DFU_ALT_INFO	\
118 	DFU_ALT_INFO_RAM \
119 	DFU_ALT_INFO_MMC
120 # else
121 #  define DFU_ALT_INFO	\
122 	DFU_ALT_INFO_RAM
123 # endif
124 #endif
125 
126 #if !defined(DFU_ALT_INFO)
127 # define DFU_ALT_INFO
128 #endif
129 
130 #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB)
131 # define CONFIG_SUPPORT_VFAT
132 #endif
133 
134 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
135 #define CONFIG_SYS_I2C_ZYNQ
136 #endif
137 
138 /* I2C */
139 #if defined(CONFIG_SYS_I2C_ZYNQ)
140 # define CONFIG_SYS_I2C
141 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
142 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
143 #endif
144 
145 /* EEPROM */
146 #ifdef CONFIG_ZYNQ_EEPROM
147 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
148 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
149 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
150 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
151 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
152 #endif
153 
154 /* Total Size of Environment Sector */
155 #define CONFIG_ENV_SIZE			(128 << 10)
156 
157 /* Allow to overwrite serial and ethaddr */
158 #define CONFIG_ENV_OVERWRITE
159 
160 /* Environment */
161 #ifndef CONFIG_ENV_IS_NOWHERE
162 # ifdef CONFIG_MTD_NOR_FLASH
163 /* Environment in NOR flash */
164 #  define CONFIG_ENV_IS_IN_FLASH
165 # elif defined(CONFIG_ZYNQ_QSPI)
166 /* Environment in Serial Flash */
167 #  define CONFIG_ENV_IS_IN_SPI_FLASH
168 # elif !defined(CONFIG_MTD_NOR_FLASH)
169 #  define CONFIG_ENV_IS_NOWHERE
170 # endif
171 
172 # define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
173 # define CONFIG_ENV_OFFSET		0xE0000
174 #endif
175 
176 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
177 #define CONFIG_PREBOOT
178 
179 /* Default environment */
180 #ifndef CONFIG_EXTRA_ENV_SETTINGS
181 #define CONFIG_EXTRA_ENV_SETTINGS	\
182 	"fit_image=fit.itb\0"		\
183 	"load_addr=0x2000000\0"		\
184 	"fit_size=0x800000\0"		\
185 	"flash_off=0x100000\0"		\
186 	"nor_flash_off=0xE2100000\0"	\
187 	"fdt_high=0x20000000\0"		\
188 	"initrd_high=0x20000000\0"	\
189 	"loadbootenv_addr=0x2000000\0" \
190 	"bootenv=uEnv.txt\0" \
191 	"bootenv_dev=mmc\0" \
192 	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
193 	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
194 		"env import -t ${loadbootenv_addr} $filesize\0" \
195 	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
196 	"setbootenv=if env run bootenv_existence_test; then " \
197 			"if env run loadbootenv; then " \
198 				"env run importbootenv; " \
199 			"fi; " \
200 		"fi; \0" \
201 	"sd_loadbootenv=set bootenv_dev mmc && " \
202 			"run setbootenv \0" \
203 	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
204 	"preboot=if test $modeboot = sdboot; then " \
205 			"run sd_loadbootenv; " \
206 			"echo Checking if uenvcmd is set ...; " \
207 			"if test -n $uenvcmd; then " \
208 				"echo Running uenvcmd ...; " \
209 				"run uenvcmd; " \
210 			"fi; " \
211 		"fi; \0" \
212 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
213 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
214 		"bootm ${load_addr}\0" \
215 	"sdboot=echo Copying FIT from SD to RAM... && " \
216 		"load mmc 0 ${load_addr} ${fit_image} && " \
217 		"bootm ${load_addr}\0" \
218 	"jtagboot=echo TFTPing FIT to RAM... && " \
219 		"tftpboot ${load_addr} ${fit_image} && " \
220 		"bootm ${load_addr}\0" \
221 	"usbboot=if usb start; then " \
222 			"echo Copying FIT from USB to RAM... && " \
223 			"load usb 0 ${load_addr} ${fit_image} && " \
224 			"bootm ${load_addr}; fi\0" \
225 		DFU_ALT_INFO
226 #endif
227 
228 #define CONFIG_BOOTCOMMAND		"run $modeboot"
229 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
230 
231 /* Miscellaneous configurable options */
232 
233 #define CONFIG_CMDLINE_EDITING
234 #define CONFIG_AUTO_COMPLETE
235 #define CONFIG_SYS_LONGHELP
236 #define CONFIG_CLOCKS
237 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
238 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
239 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
240 					sizeof(CONFIG_SYS_PROMPT) + 16)
241 
242 #ifndef CONFIG_NR_DRAM_BANKS
243 # define CONFIG_NR_DRAM_BANKS		1
244 #endif
245 
246 #define CONFIG_SYS_MEMTEST_START	0
247 #define CONFIG_SYS_MEMTEST_END		0x1000
248 
249 #define CONFIG_SYS_MALLOC_LEN		0x1400000
250 
251 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
252 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
253 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
254 					CONFIG_SYS_INIT_RAM_SIZE - \
255 					GENERATED_GBL_DATA_SIZE)
256 
257 /* Enable the PL to be downloaded */
258 #define CONFIG_FPGA
259 #define CONFIG_FPGA_XILINX
260 #define CONFIG_FPGA_ZYNQPL
261 
262 /* FIT support */
263 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
264 
265 /* FDT support */
266 #define CONFIG_DISPLAY_BOARDINFO_LATE
267 
268 /* Extend size of kernel image for uncompression */
269 #define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)
270 
271 /* Boot FreeBSD/vxWorks from an ELF image */
272 #define CONFIG_SYS_MMC_MAX_DEVICE	1
273 
274 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
275 
276 /* Commands */
277 
278 /* SPL part */
279 #define CONFIG_CMD_SPL
280 #define CONFIG_SPL_FRAMEWORK
281 
282 #define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"
283 
284 /* MMC support */
285 #ifdef CONFIG_MMC_SDHCI_ZYNQ
286 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
287 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
288 #endif
289 
290 /* Disable dcache for SPL just for sure */
291 #ifdef CONFIG_SPL_BUILD
292 #define CONFIG_SYS_DCACHE_OFF
293 #undef CONFIG_FPGA
294 #endif
295 
296 /* Address in RAM where the parameters must be copied by SPL. */
297 #define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
298 
299 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
300 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
301 
302 /* Not using MMC raw mode - just for compilation purpose */
303 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
304 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
305 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
306 
307 /* qspi mode is working fine */
308 #ifdef CONFIG_ZYNQ_QSPI
309 #define CONFIG_SPL_SPI_LOAD
310 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
311 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
312 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
313 #define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
314 					CONFIG_SYS_SPI_ARGS_SIZE)
315 #endif
316 
317 /* for booting directly linux */
318 
319 /* SP location before relocation, must use scratch RAM */
320 #define CONFIG_SPL_TEXT_BASE	0x0
321 
322 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
323 #define CONFIG_SPL_MAX_SIZE	0x30000
324 
325 /* The highest 64k OCM address */
326 #define OCM_HIGH_ADDR	0xffff0000
327 
328 /* On the top of OCM space */
329 #define CONFIG_SYS_SPL_MALLOC_START	OCM_HIGH_ADDR
330 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000
331 
332 /*
333  * SPL stack position - and stack goes down
334  * 0xfffffe00 is used for putting wfi loop.
335  * Set it up as limit for now.
336  */
337 #define CONFIG_SPL_STACK	0xfffffe00
338 
339 /* BSS setup */
340 #define CONFIG_SPL_BSS_START_ADDR	0x100000
341 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
342 
343 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
344 
345 #endif /* __CONFIG_ZYNQ_COMMON_H */
346