1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 4 * (C) Copyright 2013 - 2018 Xilinx, Inc. 5 * 6 * Common configuration options for all Zynq boards. 7 */ 8 9 #ifndef __CONFIG_ZYNQ_COMMON_H 10 #define __CONFIG_ZYNQ_COMMON_H 11 12 /* CPU clock */ 13 #ifndef CONFIG_CPU_FREQ_HZ 14 # define CONFIG_CPU_FREQ_HZ 800000000 15 #endif 16 17 #define CONFIG_REMAKE_ELF 18 19 /* Cache options */ 20 #define CONFIG_SYS_L2CACHE_OFF 21 #ifndef CONFIG_SYS_L2CACHE_OFF 22 # define CONFIG_SYS_L2_PL310 23 # define CONFIG_SYS_PL310_BASE 0xf8f02000 24 #endif 25 26 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 27 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 28 #define CONFIG_SYS_TIMER_COUNTS_DOWN 29 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 30 31 /* Serial drivers */ 32 /* The following table includes the supported baudrates */ 33 #define CONFIG_SYS_BAUDRATE_TABLE \ 34 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 35 36 #define CONFIG_ARM_DCC 37 38 /* Ethernet driver */ 39 #if defined(CONFIG_ZYNQ_GEM) 40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 41 # define CONFIG_BOOTP_MAY_FAIL 42 #endif 43 44 /* QSPI */ 45 #ifdef CONFIG_ZYNQ_QSPI 46 # define CONFIG_SF_DEFAULT_SPEED 30000000 47 #endif 48 49 /* NOR */ 50 #ifdef CONFIG_MTD_NOR_FLASH 51 # define CONFIG_SYS_FLASH_BASE 0xE2000000 52 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 53 # define CONFIG_SYS_MAX_FLASH_BANKS 1 54 # define CONFIG_SYS_MAX_FLASH_SECT 512 55 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 56 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 57 # define CONFIG_FLASH_SHOW_PROGRESS 10 58 # undef CONFIG_SYS_FLASH_EMPTY_INFO 59 #endif 60 61 #ifdef CONFIG_NAND_ZYNQ 62 #define CONFIG_SYS_MAX_NAND_DEVICE 1 63 #define CONFIG_SYS_NAND_ONFI_DETECTION 64 #endif 65 66 #ifdef CONFIG_USB_EHCI_ZYNQ 67 # define CONFIG_EHCI_IS_TDI 68 69 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 70 # define DFU_DEFAULT_POLL_TIMEOUT 300 71 # define CONFIG_USB_CABLE_CHECK 72 # define CONFIG_THOR_RESET_OFF 73 # define DFU_ALT_INFO_RAM \ 74 "dfu_ram_info=" \ 75 "set dfu_alt_info " \ 76 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 77 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 78 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 79 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 80 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 81 82 # if defined(CONFIG_MMC_SDHCI_ZYNQ) 83 # define DFU_ALT_INFO_MMC \ 84 "dfu_mmc_info=" \ 85 "set dfu_alt_info " \ 86 "${kernel_image} fat 0 1\\\\;" \ 87 "${devicetree_image} fat 0 1\\\\;" \ 88 "${ramdisk_image} fat 0 1\0" \ 89 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 90 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 91 92 # define DFU_ALT_INFO \ 93 DFU_ALT_INFO_RAM \ 94 DFU_ALT_INFO_MMC 95 # else 96 # define DFU_ALT_INFO \ 97 DFU_ALT_INFO_RAM 98 # endif 99 #endif 100 101 #if !defined(DFU_ALT_INFO) 102 # define DFU_ALT_INFO 103 #endif 104 105 /* I2C */ 106 #if defined(CONFIG_SYS_I2C_ZYNQ) 107 # define CONFIG_SYS_I2C 108 #endif 109 110 /* EEPROM */ 111 #ifdef CONFIG_ZYNQ_EEPROM 112 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 113 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 114 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 115 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 116 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 117 #endif 118 119 /* Allow to overwrite serial and ethaddr */ 120 #define CONFIG_ENV_OVERWRITE 121 122 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 123 #define CONFIG_PREBOOT 124 125 /* Boot configuration */ 126 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 127 128 #ifdef CONFIG_SPL_BUILD 129 #define BOOTENV 130 #else 131 132 #ifdef CONFIG_CMD_MMC 133 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 134 #else 135 #define BOOT_TARGET_DEVICES_MMC(func) 136 #endif 137 138 #ifdef CONFIG_CMD_USB 139 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 140 #else 141 #define BOOT_TARGET_DEVICES_USB(func) 142 #endif 143 144 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) 145 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) 146 #else 147 #define BOOT_TARGET_DEVICES_PXE(func) 148 #endif 149 150 #if defined(CONFIG_CMD_DHCP) 151 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) 152 #else 153 #define BOOT_TARGET_DEVICES_DHCP(func) 154 #endif 155 156 #define BOOTENV_DEV_XILINX(devtypeu, devtypel, instance) \ 157 "bootcmd_xilinx=run $modeboot\0" 158 159 #define BOOTENV_DEV_NAME_XILINX(devtypeu, devtypel, instance) \ 160 "xilinx " 161 162 #define BOOT_TARGET_DEVICES(func) \ 163 BOOT_TARGET_DEVICES_MMC(func) \ 164 BOOT_TARGET_DEVICES_USB(func) \ 165 BOOT_TARGET_DEVICES_PXE(func) \ 166 BOOT_TARGET_DEVICES_DHCP(func) \ 167 func(XILINX, xilinx, na) 168 169 #include <config_distro_bootcmd.h> 170 #endif /* CONFIG_SPL_BUILD */ 171 172 /* Default environment */ 173 #ifndef CONFIG_EXTRA_ENV_SETTINGS 174 #define CONFIG_EXTRA_ENV_SETTINGS \ 175 "fit_image=fit.itb\0" \ 176 "load_addr=0x2000000\0" \ 177 "fit_size=0x800000\0" \ 178 "flash_off=0x100000\0" \ 179 "nor_flash_off=0xE2100000\0" \ 180 "fdt_high=0x20000000\0" \ 181 "initrd_high=0x20000000\0" \ 182 "loadbootenv_addr=0x2000000\0" \ 183 "fdt_addr_r=0x1f00000\0" \ 184 "pxefile_addr_r=0x2000000\0" \ 185 "kernel_addr_r=0x2000000\0" \ 186 "scriptaddr=0x3000000\0" \ 187 "ramdisk_addr_r=0x3100000\0" \ 188 "bootenv=uEnv.txt\0" \ 189 "bootenv_dev=mmc\0" \ 190 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 191 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 192 "env import -t ${loadbootenv_addr} $filesize\0" \ 193 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 194 "setbootenv=if env run bootenv_existence_test; then " \ 195 "if env run loadbootenv; then " \ 196 "env run importbootenv; " \ 197 "fi; " \ 198 "fi; \0" \ 199 "sd_loadbootenv=set bootenv_dev mmc && " \ 200 "run setbootenv \0" \ 201 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 202 "preboot=if test $modeboot = sdboot; then " \ 203 "run sd_loadbootenv; " \ 204 "echo Checking if uenvcmd is set ...; " \ 205 "if test -n $uenvcmd; then " \ 206 "echo Running uenvcmd ...; " \ 207 "run uenvcmd; " \ 208 "fi; " \ 209 "fi; \0" \ 210 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 211 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 212 "bootm ${load_addr}\0" \ 213 "sdboot=echo Copying FIT from SD to RAM... && " \ 214 "load mmc 0 ${load_addr} ${fit_image} && " \ 215 "bootm ${load_addr}\0" \ 216 "jtagboot=echo TFTPing FIT to RAM... && " \ 217 "tftpboot ${load_addr} ${fit_image} && " \ 218 "bootm ${load_addr}\0" \ 219 "usbboot=if usb start; then " \ 220 "echo Copying FIT from USB to RAM... && " \ 221 "load usb 0 ${load_addr} ${fit_image} && " \ 222 "bootm ${load_addr}; fi\0" \ 223 DFU_ALT_INFO \ 224 BOOTENV 225 #endif 226 227 /* Miscellaneous configurable options */ 228 229 #define CONFIG_CLOCKS 230 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 231 232 #define CONFIG_SYS_MEMTEST_START 0 233 #define CONFIG_SYS_MEMTEST_END 0x1000 234 235 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 236 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 237 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 238 CONFIG_SYS_INIT_RAM_SIZE - \ 239 GENERATED_GBL_DATA_SIZE) 240 241 242 /* Extend size of kernel image for uncompression */ 243 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 244 245 /* Boot FreeBSD/vxWorks from an ELF image */ 246 #define CONFIG_SYS_MMC_MAX_DEVICE 1 247 248 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 249 250 /* MMC support */ 251 #ifdef CONFIG_MMC_SDHCI_ZYNQ 252 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 253 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 254 #endif 255 256 /* Disable dcache for SPL just for sure */ 257 #ifdef CONFIG_SPL_BUILD 258 #define CONFIG_SYS_DCACHE_OFF 259 #endif 260 261 /* Address in RAM where the parameters must be copied by SPL. */ 262 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 263 264 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 265 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 266 267 /* Not using MMC raw mode - just for compilation purpose */ 268 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 269 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 270 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 271 272 /* qspi mode is working fine */ 273 #ifdef CONFIG_ZYNQ_QSPI 274 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 275 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 276 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 277 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 278 CONFIG_SYS_SPI_ARGS_SIZE) 279 #endif 280 281 /* SP location before relocation, must use scratch RAM */ 282 #define CONFIG_SPL_TEXT_BASE 0x0 283 284 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 285 #define CONFIG_SPL_MAX_SIZE 0x30000 286 287 /* On the top of OCM space */ 288 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR 289 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000 290 291 /* 292 * SPL stack position - and stack goes down 293 * 0xfffffe00 is used for putting wfi loop. 294 * Set it up as limit for now. 295 */ 296 #define CONFIG_SPL_STACK 0xfffffe00 297 298 /* BSS setup */ 299 #define CONFIG_SPL_BSS_START_ADDR 0x100000 300 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 301 302 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000 303 304 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 305 306 #endif /* __CONFIG_ZYNQ_COMMON_H */ 307