1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 4 * (C) Copyright 2013 - 2018 Xilinx, Inc. 5 * 6 * Common configuration options for all Zynq boards. 7 */ 8 9 #ifndef __CONFIG_ZYNQ_COMMON_H 10 #define __CONFIG_ZYNQ_COMMON_H 11 12 /* CPU clock */ 13 #ifndef CONFIG_CPU_FREQ_HZ 14 # define CONFIG_CPU_FREQ_HZ 800000000 15 #endif 16 17 /* Cache options */ 18 #define CONFIG_SYS_L2CACHE_OFF 19 #ifndef CONFIG_SYS_L2CACHE_OFF 20 # define CONFIG_SYS_L2_PL310 21 # define CONFIG_SYS_PL310_BASE 0xf8f02000 22 #endif 23 24 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 25 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 26 #define CONFIG_SYS_TIMER_COUNTS_DOWN 27 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 28 29 /* Serial drivers */ 30 /* The following table includes the supported baudrates */ 31 #define CONFIG_SYS_BAUDRATE_TABLE \ 32 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 33 34 #define CONFIG_ARM_DCC 35 36 /* Ethernet driver */ 37 #if defined(CONFIG_ZYNQ_GEM) 38 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 39 # define CONFIG_BOOTP_MAY_FAIL 40 #endif 41 42 /* QSPI */ 43 #ifdef CONFIG_ZYNQ_QSPI 44 # define CONFIG_SF_DEFAULT_SPEED 30000000 45 #endif 46 47 /* NOR */ 48 #ifdef CONFIG_MTD_NOR_FLASH 49 # define CONFIG_SYS_FLASH_BASE 0xE2000000 50 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 51 # define CONFIG_SYS_MAX_FLASH_BANKS 1 52 # define CONFIG_SYS_MAX_FLASH_SECT 512 53 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 54 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 55 # define CONFIG_FLASH_SHOW_PROGRESS 10 56 # define CONFIG_SYS_FLASH_CFI 57 # undef CONFIG_SYS_FLASH_EMPTY_INFO 58 # define CONFIG_FLASH_CFI_DRIVER 59 # undef CONFIG_SYS_FLASH_PROTECTION 60 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 61 #endif 62 63 #ifdef CONFIG_NAND_ZYNQ 64 #define CONFIG_SYS_MAX_NAND_DEVICE 1 65 #define CONFIG_SYS_NAND_ONFI_DETECTION 66 #endif 67 68 #ifdef CONFIG_USB_EHCI_ZYNQ 69 # define CONFIG_EHCI_IS_TDI 70 71 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 72 # define DFU_DEFAULT_POLL_TIMEOUT 300 73 # define CONFIG_USB_CABLE_CHECK 74 # define CONFIG_THOR_RESET_OFF 75 # define DFU_ALT_INFO_RAM \ 76 "dfu_ram_info=" \ 77 "set dfu_alt_info " \ 78 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 79 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 80 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 81 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 82 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 83 84 # if defined(CONFIG_MMC_SDHCI_ZYNQ) 85 # define DFU_ALT_INFO_MMC \ 86 "dfu_mmc_info=" \ 87 "set dfu_alt_info " \ 88 "${kernel_image} fat 0 1\\\\;" \ 89 "${devicetree_image} fat 0 1\\\\;" \ 90 "${ramdisk_image} fat 0 1\0" \ 91 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 92 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 93 94 # define DFU_ALT_INFO \ 95 DFU_ALT_INFO_RAM \ 96 DFU_ALT_INFO_MMC 97 # else 98 # define DFU_ALT_INFO \ 99 DFU_ALT_INFO_RAM 100 # endif 101 #endif 102 103 #if !defined(DFU_ALT_INFO) 104 # define DFU_ALT_INFO 105 #endif 106 107 /* I2C */ 108 #if defined(CONFIG_SYS_I2C_ZYNQ) 109 # define CONFIG_SYS_I2C 110 #endif 111 112 /* EEPROM */ 113 #ifdef CONFIG_ZYNQ_EEPROM 114 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 115 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 116 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 117 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 118 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 119 #endif 120 121 /* Allow to overwrite serial and ethaddr */ 122 #define CONFIG_ENV_OVERWRITE 123 124 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 125 #define CONFIG_PREBOOT 126 127 /* Boot configuration */ 128 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 129 130 #ifdef CONFIG_SPL_BUILD 131 #define BOOTENV 132 #else 133 134 #ifdef CONFIG_CMD_MMC 135 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 136 #else 137 #define BOOT_TARGET_DEVICES_MMC(func) 138 #endif 139 140 #ifdef CONFIG_CMD_USB 141 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 142 #else 143 #define BOOT_TARGET_DEVICES_USB(func) 144 #endif 145 146 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) 147 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) 148 #else 149 #define BOOT_TARGET_DEVICES_PXE(func) 150 #endif 151 152 #if defined(CONFIG_CMD_DHCP) 153 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) 154 #else 155 #define BOOT_TARGET_DEVICES_DHCP(func) 156 #endif 157 158 #define BOOT_TARGET_DEVICES(func) \ 159 BOOT_TARGET_DEVICES_MMC(func) \ 160 BOOT_TARGET_DEVICES_USB(func) \ 161 BOOT_TARGET_DEVICES_PXE(func) \ 162 BOOT_TARGET_DEVICES_DHCP(func) 163 164 #include <config_distro_bootcmd.h> 165 #endif /* CONFIG_SPL_BUILD */ 166 167 /* Default environment */ 168 #ifndef CONFIG_EXTRA_ENV_SETTINGS 169 #define CONFIG_EXTRA_ENV_SETTINGS \ 170 "fit_image=fit.itb\0" \ 171 "load_addr=0x2000000\0" \ 172 "fit_size=0x800000\0" \ 173 "flash_off=0x100000\0" \ 174 "nor_flash_off=0xE2100000\0" \ 175 "fdt_high=0x20000000\0" \ 176 "initrd_high=0x20000000\0" \ 177 "loadbootenv_addr=0x2000000\0" \ 178 "fdt_addr_r=0x1f00000\0" \ 179 "pxefile_addr_r=0x2000000\0" \ 180 "kernel_addr_r=0x2000000\0" \ 181 "scriptaddr=0x3000000\0" \ 182 "ramdisk_addr_r=0x3100000\0" \ 183 "bootenv=uEnv.txt\0" \ 184 "bootenv_dev=mmc\0" \ 185 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 186 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 187 "env import -t ${loadbootenv_addr} $filesize\0" \ 188 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 189 "setbootenv=if env run bootenv_existence_test; then " \ 190 "if env run loadbootenv; then " \ 191 "env run importbootenv; " \ 192 "fi; " \ 193 "fi; \0" \ 194 "sd_loadbootenv=set bootenv_dev mmc && " \ 195 "run setbootenv \0" \ 196 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 197 "preboot=if test $modeboot = sdboot; then " \ 198 "run sd_loadbootenv; " \ 199 "echo Checking if uenvcmd is set ...; " \ 200 "if test -n $uenvcmd; then " \ 201 "echo Running uenvcmd ...; " \ 202 "run uenvcmd; " \ 203 "fi; " \ 204 "fi; \0" \ 205 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 206 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 207 "bootm ${load_addr}\0" \ 208 "sdboot=echo Copying FIT from SD to RAM... && " \ 209 "load mmc 0 ${load_addr} ${fit_image} && " \ 210 "bootm ${load_addr}\0" \ 211 "jtagboot=echo TFTPing FIT to RAM... && " \ 212 "tftpboot ${load_addr} ${fit_image} && " \ 213 "bootm ${load_addr}\0" \ 214 "usbboot=if usb start; then " \ 215 "echo Copying FIT from USB to RAM... && " \ 216 "load usb 0 ${load_addr} ${fit_image} && " \ 217 "bootm ${load_addr}; fi\0" \ 218 DFU_ALT_INFO \ 219 BOOTENV 220 #endif 221 222 /* Miscellaneous configurable options */ 223 224 #define CONFIG_CLOCKS 225 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 226 227 #define CONFIG_SYS_MEMTEST_START 0 228 #define CONFIG_SYS_MEMTEST_END 0x1000 229 230 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 231 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 232 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 233 CONFIG_SYS_INIT_RAM_SIZE - \ 234 GENERATED_GBL_DATA_SIZE) 235 236 237 /* Extend size of kernel image for uncompression */ 238 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 239 240 /* Boot FreeBSD/vxWorks from an ELF image */ 241 #define CONFIG_SYS_MMC_MAX_DEVICE 1 242 243 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 244 245 /* MMC support */ 246 #ifdef CONFIG_MMC_SDHCI_ZYNQ 247 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 248 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 249 #endif 250 251 /* Disable dcache for SPL just for sure */ 252 #ifdef CONFIG_SPL_BUILD 253 #define CONFIG_SYS_DCACHE_OFF 254 #endif 255 256 /* Address in RAM where the parameters must be copied by SPL. */ 257 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 258 259 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 260 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 261 262 /* Not using MMC raw mode - just for compilation purpose */ 263 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 264 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 265 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 266 267 /* qspi mode is working fine */ 268 #ifdef CONFIG_ZYNQ_QSPI 269 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 270 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 271 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 272 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 273 CONFIG_SYS_SPI_ARGS_SIZE) 274 #endif 275 276 /* SP location before relocation, must use scratch RAM */ 277 #define CONFIG_SPL_TEXT_BASE 0x0 278 279 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 280 #define CONFIG_SPL_MAX_SIZE 0x30000 281 282 /* On the top of OCM space */ 283 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR 284 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000 285 286 /* 287 * SPL stack position - and stack goes down 288 * 0xfffffe00 is used for putting wfi loop. 289 * Set it up as limit for now. 290 */ 291 #define CONFIG_SPL_STACK 0xfffffe00 292 293 /* BSS setup */ 294 #define CONFIG_SPL_BSS_START_ADDR 0x100000 295 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 296 297 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 298 299 #endif /* __CONFIG_ZYNQ_COMMON_H */ 300