1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4  * (C) Copyright 2013 - 2018 Xilinx, Inc.
5  *
6  * Common configuration options for all Zynq boards.
7  */
8 
9 #ifndef __CONFIG_ZYNQ_COMMON_H
10 #define __CONFIG_ZYNQ_COMMON_H
11 
12 /* CPU clock */
13 #ifndef CONFIG_CPU_FREQ_HZ
14 # define CONFIG_CPU_FREQ_HZ	800000000
15 #endif
16 
17 #define CONFIG_REMAKE_ELF
18 
19 /* Cache options */
20 #define CONFIG_SYS_L2CACHE_OFF
21 #ifndef CONFIG_SYS_L2CACHE_OFF
22 # define CONFIG_SYS_L2_PL310
23 # define CONFIG_SYS_PL310_BASE		0xf8f02000
24 #endif
25 
26 #define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
27 #define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
28 #define CONFIG_SYS_TIMER_COUNTS_DOWN
29 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
30 
31 /* Serial drivers */
32 /* The following table includes the supported baudrates */
33 #define CONFIG_SYS_BAUDRATE_TABLE  \
34 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
35 
36 #define CONFIG_ARM_DCC
37 
38 /* Ethernet driver */
39 #if defined(CONFIG_ZYNQ_GEM)
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_BOOTP_MAY_FAIL
42 #endif
43 
44 /* QSPI */
45 #ifdef CONFIG_ZYNQ_QSPI
46 # define CONFIG_SF_DEFAULT_SPEED	30000000
47 #endif
48 
49 /* NOR */
50 #ifdef CONFIG_MTD_NOR_FLASH
51 # define CONFIG_SYS_FLASH_BASE		0xE2000000
52 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
53 # define CONFIG_SYS_MAX_FLASH_BANKS	1
54 # define CONFIG_SYS_MAX_FLASH_SECT	512
55 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
56 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
57 # define CONFIG_FLASH_SHOW_PROGRESS	10
58 # undef CONFIG_SYS_FLASH_EMPTY_INFO
59 #endif
60 
61 #ifdef CONFIG_NAND_ZYNQ
62 #define CONFIG_SYS_MAX_NAND_DEVICE	1
63 #define CONFIG_SYS_NAND_ONFI_DETECTION
64 #endif
65 
66 #ifdef CONFIG_USB_EHCI_ZYNQ
67 # define CONFIG_EHCI_IS_TDI
68 
69 # define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
70 # define DFU_DEFAULT_POLL_TIMEOUT	300
71 # define CONFIG_USB_CABLE_CHECK
72 # define CONFIG_THOR_RESET_OFF
73 # define DFU_ALT_INFO_RAM \
74 	"dfu_ram_info=" \
75 	"set dfu_alt_info " \
76 	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
77 	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
78 	"${ramdisk_image} ram 0x2000000 0x600000\0" \
79 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
80 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
81 
82 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
83 #  define DFU_ALT_INFO_MMC \
84 	"dfu_mmc_info=" \
85 	"set dfu_alt_info " \
86 	"${kernel_image} fat 0 1\\\\;" \
87 	"${devicetree_image} fat 0 1\\\\;" \
88 	"${ramdisk_image} fat 0 1\0" \
89 	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
90 	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
91 
92 #  define DFU_ALT_INFO	\
93 	DFU_ALT_INFO_RAM \
94 	DFU_ALT_INFO_MMC
95 # else
96 #  define DFU_ALT_INFO	\
97 	DFU_ALT_INFO_RAM
98 # endif
99 #endif
100 
101 #if !defined(DFU_ALT_INFO)
102 # define DFU_ALT_INFO
103 #endif
104 
105 /* I2C */
106 #if defined(CONFIG_SYS_I2C_ZYNQ)
107 # define CONFIG_SYS_I2C
108 #endif
109 
110 /* EEPROM */
111 #ifdef CONFIG_ZYNQ_EEPROM
112 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
113 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
114 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
115 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
116 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
117 #endif
118 
119 /* Allow to overwrite serial and ethaddr */
120 #define CONFIG_ENV_OVERWRITE
121 
122 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
123 #define CONFIG_PREBOOT
124 
125 /* Boot configuration */
126 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
127 
128 #ifdef CONFIG_SPL_BUILD
129 #define BOOTENV
130 #else
131 
132 #ifdef CONFIG_CMD_MMC
133 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
134 #else
135 #define BOOT_TARGET_DEVICES_MMC(func)
136 #endif
137 
138 #ifdef CONFIG_CMD_USB
139 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
140 #else
141 #define BOOT_TARGET_DEVICES_USB(func)
142 #endif
143 
144 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
145 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
146 #else
147 #define BOOT_TARGET_DEVICES_PXE(func)
148 #endif
149 
150 #if defined(CONFIG_CMD_DHCP)
151 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
152 #else
153 #define BOOT_TARGET_DEVICES_DHCP(func)
154 #endif
155 
156 #define BOOT_TARGET_DEVICES(func) \
157 	BOOT_TARGET_DEVICES_MMC(func) \
158 	BOOT_TARGET_DEVICES_USB(func) \
159 	BOOT_TARGET_DEVICES_PXE(func) \
160 	BOOT_TARGET_DEVICES_DHCP(func)
161 
162 #include <config_distro_bootcmd.h>
163 #endif /* CONFIG_SPL_BUILD */
164 
165 /* Default environment */
166 #ifndef CONFIG_EXTRA_ENV_SETTINGS
167 #define CONFIG_EXTRA_ENV_SETTINGS	\
168 	"fit_image=fit.itb\0"		\
169 	"load_addr=0x2000000\0"		\
170 	"fit_size=0x800000\0"		\
171 	"flash_off=0x100000\0"		\
172 	"nor_flash_off=0xE2100000\0"	\
173 	"fdt_high=0x20000000\0"		\
174 	"initrd_high=0x20000000\0"	\
175 	"loadbootenv_addr=0x2000000\0" \
176 	"fdt_addr_r=0x1f00000\0"        \
177 	"pxefile_addr_r=0x2000000\0"    \
178 	"kernel_addr_r=0x2000000\0"     \
179 	"scriptaddr=0x3000000\0"        \
180 	"ramdisk_addr_r=0x3100000\0"    \
181 	"bootenv=uEnv.txt\0" \
182 	"bootenv_dev=mmc\0" \
183 	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
184 	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
185 		"env import -t ${loadbootenv_addr} $filesize\0" \
186 	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
187 	"setbootenv=if env run bootenv_existence_test; then " \
188 			"if env run loadbootenv; then " \
189 				"env run importbootenv; " \
190 			"fi; " \
191 		"fi; \0" \
192 	"sd_loadbootenv=set bootenv_dev mmc && " \
193 			"run setbootenv \0" \
194 	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
195 	"preboot=if test $modeboot = sdboot; then " \
196 			"run sd_loadbootenv; " \
197 			"echo Checking if uenvcmd is set ...; " \
198 			"if test -n $uenvcmd; then " \
199 				"echo Running uenvcmd ...; " \
200 				"run uenvcmd; " \
201 			"fi; " \
202 		"fi; \0" \
203 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
204 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
205 		"bootm ${load_addr}\0" \
206 	"sdboot=echo Copying FIT from SD to RAM... && " \
207 		"load mmc 0 ${load_addr} ${fit_image} && " \
208 		"bootm ${load_addr}\0" \
209 	"jtagboot=echo TFTPing FIT to RAM... && " \
210 		"tftpboot ${load_addr} ${fit_image} && " \
211 		"bootm ${load_addr}\0" \
212 	"usbboot=if usb start; then " \
213 			"echo Copying FIT from USB to RAM... && " \
214 			"load usb 0 ${load_addr} ${fit_image} && " \
215 			"bootm ${load_addr}; fi\0" \
216 		DFU_ALT_INFO \
217 		BOOTENV
218 #endif
219 
220 /* Miscellaneous configurable options */
221 
222 #define CONFIG_CLOCKS
223 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
224 
225 #define CONFIG_SYS_MEMTEST_START	0
226 #define CONFIG_SYS_MEMTEST_END		0x1000
227 
228 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
229 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
230 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
231 					CONFIG_SYS_INIT_RAM_SIZE - \
232 					GENERATED_GBL_DATA_SIZE)
233 
234 
235 /* Extend size of kernel image for uncompression */
236 #define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)
237 
238 /* Boot FreeBSD/vxWorks from an ELF image */
239 #define CONFIG_SYS_MMC_MAX_DEVICE	1
240 
241 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
242 
243 /* MMC support */
244 #ifdef CONFIG_MMC_SDHCI_ZYNQ
245 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
246 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
247 #endif
248 
249 /* Disable dcache for SPL just for sure */
250 #ifdef CONFIG_SPL_BUILD
251 #define CONFIG_SYS_DCACHE_OFF
252 #endif
253 
254 /* Address in RAM where the parameters must be copied by SPL. */
255 #define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
256 
257 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
258 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
259 
260 /* Not using MMC raw mode - just for compilation purpose */
261 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
262 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
263 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
264 
265 /* qspi mode is working fine */
266 #ifdef CONFIG_ZYNQ_QSPI
267 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
268 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
269 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
270 #define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
271 					CONFIG_SYS_SPI_ARGS_SIZE)
272 #endif
273 
274 /* SP location before relocation, must use scratch RAM */
275 #define CONFIG_SPL_TEXT_BASE	0x0
276 
277 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
278 #define CONFIG_SPL_MAX_SIZE	0x30000
279 
280 /* On the top of OCM space */
281 #define CONFIG_SYS_SPL_MALLOC_START	CONFIG_SPL_STACK_R_ADDR
282 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000000
283 
284 /*
285  * SPL stack position - and stack goes down
286  * 0xfffffe00 is used for putting wfi loop.
287  * Set it up as limit for now.
288  */
289 #define CONFIG_SPL_STACK	0xfffffe00
290 
291 /* BSS setup */
292 #define CONFIG_SPL_BSS_START_ADDR	0x100000
293 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
294 
295 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
296 
297 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
298 
299 #endif /* __CONFIG_ZYNQ_COMMON_H */
300