1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 4 * (C) Copyright 2013 - 2018 Xilinx, Inc. 5 * 6 * Common configuration options for all Zynq boards. 7 */ 8 9 #ifndef __CONFIG_ZYNQ_COMMON_H 10 #define __CONFIG_ZYNQ_COMMON_H 11 12 /* CPU clock */ 13 #ifndef CONFIG_CPU_FREQ_HZ 14 # define CONFIG_CPU_FREQ_HZ 800000000 15 #endif 16 17 /* Cache options */ 18 #define CONFIG_SYS_L2CACHE_OFF 19 #ifndef CONFIG_SYS_L2CACHE_OFF 20 # define CONFIG_SYS_L2_PL310 21 # define CONFIG_SYS_PL310_BASE 0xf8f02000 22 #endif 23 24 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 25 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 26 #define CONFIG_SYS_TIMER_COUNTS_DOWN 27 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 28 29 /* Serial drivers */ 30 /* The following table includes the supported baudrates */ 31 #define CONFIG_SYS_BAUDRATE_TABLE \ 32 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 33 34 #define CONFIG_ARM_DCC 35 36 /* Ethernet driver */ 37 #if defined(CONFIG_ZYNQ_GEM) 38 # define CONFIG_MII 39 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 40 # define CONFIG_BOOTP_MAY_FAIL 41 #endif 42 43 /* QSPI */ 44 #ifdef CONFIG_ZYNQ_QSPI 45 # define CONFIG_SF_DEFAULT_SPEED 30000000 46 #endif 47 48 /* NOR */ 49 #ifdef CONFIG_MTD_NOR_FLASH 50 # define CONFIG_SYS_FLASH_BASE 0xE2000000 51 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 52 # define CONFIG_SYS_MAX_FLASH_BANKS 1 53 # define CONFIG_SYS_MAX_FLASH_SECT 512 54 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 55 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 56 # define CONFIG_FLASH_SHOW_PROGRESS 10 57 # define CONFIG_SYS_FLASH_CFI 58 # undef CONFIG_SYS_FLASH_EMPTY_INFO 59 # define CONFIG_FLASH_CFI_DRIVER 60 # undef CONFIG_SYS_FLASH_PROTECTION 61 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 62 #endif 63 64 #ifdef CONFIG_NAND_ZYNQ 65 #define CONFIG_SYS_MAX_NAND_DEVICE 1 66 #define CONFIG_SYS_NAND_ONFI_DETECTION 67 #endif 68 69 #ifdef CONFIG_USB_EHCI_ZYNQ 70 # define CONFIG_EHCI_IS_TDI 71 72 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 73 # define DFU_DEFAULT_POLL_TIMEOUT 300 74 # define CONFIG_USB_CABLE_CHECK 75 # define CONFIG_THOR_RESET_OFF 76 # define DFU_ALT_INFO_RAM \ 77 "dfu_ram_info=" \ 78 "set dfu_alt_info " \ 79 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 80 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 81 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 82 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 83 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 84 85 # if defined(CONFIG_MMC_SDHCI_ZYNQ) 86 # define DFU_ALT_INFO_MMC \ 87 "dfu_mmc_info=" \ 88 "set dfu_alt_info " \ 89 "${kernel_image} fat 0 1\\\\;" \ 90 "${devicetree_image} fat 0 1\\\\;" \ 91 "${ramdisk_image} fat 0 1\0" \ 92 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 93 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 94 95 # define DFU_ALT_INFO \ 96 DFU_ALT_INFO_RAM \ 97 DFU_ALT_INFO_MMC 98 # else 99 # define DFU_ALT_INFO \ 100 DFU_ALT_INFO_RAM 101 # endif 102 #endif 103 104 #if !defined(DFU_ALT_INFO) 105 # define DFU_ALT_INFO 106 #endif 107 108 /* I2C */ 109 #if defined(CONFIG_SYS_I2C_ZYNQ) 110 # define CONFIG_SYS_I2C 111 #endif 112 113 /* EEPROM */ 114 #ifdef CONFIG_ZYNQ_EEPROM 115 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 116 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 117 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 118 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 119 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 120 #endif 121 122 /* Allow to overwrite serial and ethaddr */ 123 #define CONFIG_ENV_OVERWRITE 124 125 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 126 #define CONFIG_PREBOOT 127 128 /* Boot configuration */ 129 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 130 131 /* Distro boot enablement */ 132 133 #ifdef CONFIG_SPL_BUILD 134 #define BOOTENV 135 #else 136 137 #ifdef CONFIG_CMD_MMC 138 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 139 #else 140 #define BOOT_TARGET_DEVICES_MMC(func) 141 #endif 142 143 #ifdef CONFIG_CMD_USB 144 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 145 #else 146 #define BOOT_TARGET_DEVICES_USB(func) 147 #endif 148 149 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) 150 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) 151 #else 152 #define BOOT_TARGET_DEVICES_PXE(func) 153 #endif 154 155 #if defined(CONFIG_CMD_DHCP) 156 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) 157 #else 158 #define BOOT_TARGET_DEVICES_DHCP(func) 159 #endif 160 161 #define BOOT_TARGET_DEVICES(func) \ 162 BOOT_TARGET_DEVICES_MMC(func) \ 163 BOOT_TARGET_DEVICES_USB(func) \ 164 BOOT_TARGET_DEVICES_PXE(func) \ 165 BOOT_TARGET_DEVICES_DHCP(func) 166 167 #include <config_distro_bootcmd.h> 168 #endif /* CONFIG_SPL_BUILD */ 169 170 /* Default environment */ 171 #ifndef CONFIG_EXTRA_ENV_SETTINGS 172 #define CONFIG_EXTRA_ENV_SETTINGS \ 173 "fit_image=fit.itb\0" \ 174 "load_addr=0x2000000\0" \ 175 "fit_size=0x800000\0" \ 176 "flash_off=0x100000\0" \ 177 "nor_flash_off=0xE2100000\0" \ 178 "fdt_high=0x20000000\0" \ 179 "initrd_high=0x20000000\0" \ 180 "loadbootenv_addr=0x2000000\0" \ 181 "fdt_addr_r=0x1f00000\0" \ 182 "pxefile_addr_r=0x2000000\0" \ 183 "kernel_addr_r=0x2000000\0" \ 184 "scriptaddr=0x3000000\0" \ 185 "ramdisk_addr_r=0x3100000\0" \ 186 "bootenv=uEnv.txt\0" \ 187 "bootenv_dev=mmc\0" \ 188 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 189 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 190 "env import -t ${loadbootenv_addr} $filesize\0" \ 191 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 192 "setbootenv=if env run bootenv_existence_test; then " \ 193 "if env run loadbootenv; then " \ 194 "env run importbootenv; " \ 195 "fi; " \ 196 "fi; \0" \ 197 "sd_loadbootenv=set bootenv_dev mmc && " \ 198 "run setbootenv \0" \ 199 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 200 "preboot=if test $modeboot = sdboot; then " \ 201 "run sd_loadbootenv; " \ 202 "echo Checking if uenvcmd is set ...; " \ 203 "if test -n $uenvcmd; then " \ 204 "echo Running uenvcmd ...; " \ 205 "run uenvcmd; " \ 206 "fi; " \ 207 "fi; \0" \ 208 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 209 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 210 "bootm ${load_addr}\0" \ 211 "sdboot=echo Copying FIT from SD to RAM... && " \ 212 "load mmc 0 ${load_addr} ${fit_image} && " \ 213 "bootm ${load_addr}\0" \ 214 "jtagboot=echo TFTPing FIT to RAM... && " \ 215 "tftpboot ${load_addr} ${fit_image} && " \ 216 "bootm ${load_addr}\0" \ 217 "usbboot=if usb start; then " \ 218 "echo Copying FIT from USB to RAM... && " \ 219 "load usb 0 ${load_addr} ${fit_image} && " \ 220 "bootm ${load_addr}; fi\0" \ 221 DFU_ALT_INFO \ 222 BOOTENV 223 #endif 224 225 /* Miscellaneous configurable options */ 226 227 #define CONFIG_CLOCKS 228 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 229 230 #ifndef CONFIG_NR_DRAM_BANKS 231 # define CONFIG_NR_DRAM_BANKS 1 232 #endif 233 234 #define CONFIG_SYS_MEMTEST_START 0 235 #define CONFIG_SYS_MEMTEST_END 0x1000 236 237 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 238 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 239 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 240 CONFIG_SYS_INIT_RAM_SIZE - \ 241 GENERATED_GBL_DATA_SIZE) 242 243 244 /* Extend size of kernel image for uncompression */ 245 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 246 247 /* Boot FreeBSD/vxWorks from an ELF image */ 248 #define CONFIG_SYS_MMC_MAX_DEVICE 1 249 250 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 251 252 /* Commands */ 253 254 /* SPL part */ 255 256 /* MMC support */ 257 #ifdef CONFIG_MMC_SDHCI_ZYNQ 258 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 259 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 260 #endif 261 262 /* Disable dcache for SPL just for sure */ 263 #ifdef CONFIG_SPL_BUILD 264 #define CONFIG_SYS_DCACHE_OFF 265 #endif 266 267 /* Address in RAM where the parameters must be copied by SPL. */ 268 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 269 270 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 271 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 272 273 /* Not using MMC raw mode - just for compilation purpose */ 274 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 275 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 276 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 277 278 /* qspi mode is working fine */ 279 #ifdef CONFIG_ZYNQ_QSPI 280 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 281 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 282 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 283 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 284 CONFIG_SYS_SPI_ARGS_SIZE) 285 #endif 286 287 /* for booting directly linux */ 288 289 /* SP location before relocation, must use scratch RAM */ 290 #define CONFIG_SPL_TEXT_BASE 0x0 291 292 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 293 #define CONFIG_SPL_MAX_SIZE 0x30000 294 295 /* On the top of OCM space */ 296 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR 297 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000 298 299 /* 300 * SPL stack position - and stack goes down 301 * 0xfffffe00 is used for putting wfi loop. 302 * Set it up as limit for now. 303 */ 304 #define CONFIG_SPL_STACK 0xfffffe00 305 306 /* BSS setup */ 307 #define CONFIG_SPL_BSS_START_ADDR 0x100000 308 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 309 310 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 311 312 #endif /* __CONFIG_ZYNQ_COMMON_H */ 313