1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ	800000000
16 #endif
17 
18 /* Cache options */
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_SYS_CACHELINE_SIZE	32
21 
22 #define CONFIG_SYS_L2CACHE_OFF
23 #ifndef CONFIG_SYS_L2CACHE_OFF
24 # define CONFIG_SYS_L2_PL310
25 # define CONFIG_SYS_PL310_BASE		0xf8f02000
26 #endif
27 
28 #define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
29 #define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
30 #define CONFIG_SYS_TIMER_COUNTS_DOWN
31 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
32 
33 /* Serial drivers */
34 #define CONFIG_BAUDRATE		115200
35 /* The following table includes the supported baudrates */
36 #define CONFIG_SYS_BAUDRATE_TABLE  \
37 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
38 
39 #define CONFIG_ARM_DCC
40 #define CONFIG_ZYNQ_SERIAL
41 
42 #define CONFIG_ZYNQ_GPIO
43 
44 /* Ethernet driver */
45 #if defined(CONFIG_ZYNQ_GEM)
46 # define CONFIG_MII
47 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
48 # define CONFIG_PHY_MARVELL
49 # define CONFIG_PHY_REALTEK
50 # define CONFIG_BOOTP_SERVERIP
51 # define CONFIG_BOOTP_BOOTPATH
52 # define CONFIG_BOOTP_GATEWAY
53 # define CONFIG_BOOTP_HOSTNAME
54 # define CONFIG_BOOTP_MAY_FAIL
55 #endif
56 
57 /* SPI */
58 #ifdef CONFIG_ZYNQ_SPI
59 # define CONFIG_CMD_SF
60 #endif
61 
62 /* QSPI */
63 #ifdef CONFIG_ZYNQ_QSPI
64 # define CONFIG_SF_DEFAULT_SPEED	30000000
65 # define CONFIG_SPI_FLASH_ISSI
66 # define CONFIG_CMD_SF
67 #endif
68 
69 /* NOR */
70 #ifndef CONFIG_SYS_NO_FLASH
71 # define CONFIG_SYS_FLASH_BASE		0xE2000000
72 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
73 # define CONFIG_SYS_MAX_FLASH_BANKS	1
74 # define CONFIG_SYS_MAX_FLASH_SECT	512
75 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
76 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
77 # define CONFIG_FLASH_SHOW_PROGRESS	10
78 # define CONFIG_SYS_FLASH_CFI
79 # undef CONFIG_SYS_FLASH_EMPTY_INFO
80 # define CONFIG_FLASH_CFI_DRIVER
81 # undef CONFIG_SYS_FLASH_PROTECTION
82 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
83 #endif
84 
85 /* MMC */
86 #if defined(CONFIG_ZYNQ_SDHCI)
87 # define CONFIG_MMC
88 # define CONFIG_GENERIC_MMC
89 # define CONFIG_SDHCI
90 # define CONFIG_CMD_MMC
91 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
92 #endif
93 
94 #ifdef CONFIG_ZYNQ_USB
95 # define CONFIG_USB_EHCI
96 # define CONFIG_CMD_USB
97 # define CONFIG_USB_STORAGE
98 # define CONFIG_USB_EHCI_ZYNQ
99 # define CONFIG_USB_ULPI_VIEWPORT
100 # define CONFIG_USB_ULPI
101 # define CONFIG_EHCI_IS_TDI
102 # define CONFIG_USB_MAX_CONTROLLER_COUNT	2
103 
104 # define CONFIG_CI_UDC           /* ChipIdea CI13xxx UDC */
105 # define CONFIG_USB_GADGET
106 # define CONFIG_USB_GADGET_DUALSPEED
107 # define CONFIG_USB_GADGET_DOWNLOAD
108 # define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
109 # define DFU_DEFAULT_POLL_TIMEOUT	300
110 # define CONFIG_USB_FUNCTION_DFU
111 # define CONFIG_DFU_RAM
112 # define CONFIG_USB_GADGET_VBUS_DRAW	2
113 # define CONFIG_G_DNL_VENDOR_NUM	0x03FD
114 # define CONFIG_G_DNL_PRODUCT_NUM	0x0300
115 # define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
116 # define CONFIG_USB_GADGET
117 # define CONFIG_USB_CABLE_CHECK
118 # define CONFIG_CMD_DFU
119 # define CONFIG_CMD_THOR_DOWNLOAD
120 # define CONFIG_USB_FUNCTION_THOR
121 # define DFU_ALT_INFO_RAM \
122 	"dfu_ram_info=" \
123 	"set dfu_alt_info " \
124 	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
125 	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
126 	"${ramdisk_image} ram 0x2000000 0x600000\0" \
127 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
128 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
129 
130 # if defined(CONFIG_ZYNQ_SDHCI)
131 #  define CONFIG_DFU_MMC
132 #  define DFU_ALT_INFO_MMC \
133 	"dfu_mmc_info=" \
134 	"set dfu_alt_info " \
135 	"${kernel_image} fat 0 1\\\\;" \
136 	"${devicetree_image} fat 0 1\\\\;" \
137 	"${ramdisk_image} fat 0 1\0" \
138 	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
139 	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
140 
141 #  define DFU_ALT_INFO	\
142 	DFU_ALT_INFO_RAM \
143 	DFU_ALT_INFO_MMC
144 # else
145 #  define DFU_ALT_INFO	\
146 	DFU_ALT_INFO_RAM
147 # endif
148 #endif
149 
150 #if !defined(DFU_ALT_INFO)
151 # define DFU_ALT_INFO
152 #endif
153 
154 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
155 # define CONFIG_SUPPORT_VFAT
156 # define CONFIG_CMD_FAT
157 # define CONFIG_CMD_EXT2
158 # define CONFIG_FAT_WRITE
159 # define CONFIG_DOS_PARTITION
160 # define CONFIG_CMD_EXT4
161 # define CONFIG_CMD_EXT4_WRITE
162 # define CONFIG_CMD_FS_GENERIC
163 #endif
164 
165 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
166 #define CONFIG_SYS_I2C_ZYNQ
167 #endif
168 
169 /* I2C */
170 #if defined(CONFIG_SYS_I2C_ZYNQ)
171 # define CONFIG_CMD_I2C
172 # define CONFIG_SYS_I2C
173 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
174 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
175 #endif
176 
177 /* EEPROM */
178 #ifdef CONFIG_ZYNQ_EEPROM
179 # define CONFIG_CMD_EEPROM
180 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
181 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
182 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
183 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
184 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
185 #endif
186 
187 /* Total Size of Environment Sector */
188 #define CONFIG_ENV_SIZE			(128 << 10)
189 
190 /* Allow to overwrite serial and ethaddr */
191 #define CONFIG_ENV_OVERWRITE
192 
193 /* Environment */
194 #ifndef CONFIG_ENV_IS_NOWHERE
195 # ifndef CONFIG_SYS_NO_FLASH
196 /* Environment in NOR flash */
197 #  define CONFIG_ENV_IS_IN_FLASH
198 # elif defined(CONFIG_ZYNQ_QSPI)
199 /* Environment in Serial Flash */
200 #  define CONFIG_ENV_IS_IN_SPI_FLASH
201 # elif defined(CONFIG_SYS_NO_FLASH)
202 #  define CONFIG_ENV_IS_NOWHERE
203 # endif
204 
205 # define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
206 # define CONFIG_ENV_OFFSET		0xE0000
207 #endif
208 
209 /* Default environment */
210 #define CONFIG_EXTRA_ENV_SETTINGS	\
211 	"fit_image=fit.itb\0"		\
212 	"load_addr=0x2000000\0"		\
213 	"fit_size=0x800000\0"		\
214 	"flash_off=0x100000\0"		\
215 	"nor_flash_off=0xE2100000\0"	\
216 	"fdt_high=0x20000000\0"		\
217 	"initrd_high=0x20000000\0"	\
218 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
219 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
220 		"bootm ${load_addr}\0" \
221 	"sdboot=echo Copying FIT from SD to RAM... && " \
222 		"load mmc 0 ${load_addr} ${fit_image} && " \
223 		"bootm ${load_addr}\0" \
224 	"jtagboot=echo TFTPing FIT to RAM... && " \
225 		"tftpboot ${load_addr} ${fit_image} && " \
226 		"bootm ${load_addr}\0" \
227 	"usbboot=if usb start; then " \
228 			"echo Copying FIT from USB to RAM... && " \
229 			"load usb 0 ${load_addr} ${fit_image} && " \
230 			"bootm ${load_addr}; fi\0" \
231 		DFU_ALT_INFO
232 
233 #define CONFIG_BOOTCOMMAND		"run $modeboot"
234 #define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
235 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
236 
237 /* Miscellaneous configurable options */
238 #define CONFIG_SYS_HUSH_PARSER
239 
240 #define CONFIG_CMDLINE_EDITING
241 #define CONFIG_AUTO_COMPLETE
242 #define CONFIG_BOARD_LATE_INIT
243 #define CONFIG_DISPLAY_BOARDINFO
244 #define CONFIG_SYS_LONGHELP
245 #define CONFIG_CLOCKS
246 #define CONFIG_CMD_CLK
247 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
248 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
249 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
250 					sizeof(CONFIG_SYS_PROMPT) + 16)
251 
252 /* Physical Memory map */
253 #define CONFIG_SYS_TEXT_BASE		0x4000000
254 
255 #define CONFIG_NR_DRAM_BANKS		1
256 #define CONFIG_SYS_SDRAM_BASE		0
257 
258 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
259 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)
260 
261 #define CONFIG_SYS_MALLOC_LEN		0x1400000
262 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
263 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
264 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
265 					CONFIG_SYS_INIT_RAM_SIZE - \
266 					GENERATED_GBL_DATA_SIZE)
267 
268 /* Enable the PL to be downloaded */
269 #define CONFIG_FPGA
270 #define CONFIG_FPGA_XILINX
271 #define CONFIG_FPGA_ZYNQPL
272 #define CONFIG_CMD_FPGA_LOADMK
273 #define CONFIG_CMD_FPGA_LOADP
274 #define CONFIG_CMD_FPGA_LOADBP
275 #define CONFIG_CMD_FPGA_LOADFS
276 
277 /* FIT support */
278 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
279 
280 /* FDT support */
281 #define CONFIG_DISPLAY_BOARDINFO_LATE
282 
283 /* Extend size of kernel image for uncompression */
284 #define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)
285 
286 /* Boot FreeBSD/vxWorks from an ELF image */
287 #define CONFIG_SYS_MMC_MAX_DEVICE	1
288 
289 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
290 
291 /* Commands */
292 #define CONFIG_CMD_PING
293 #define CONFIG_CMD_DHCP
294 #define CONFIG_CMD_MII
295 #define CONFIG_CMD_TFTPPUT
296 
297 /* SPL part */
298 #define CONFIG_CMD_SPL
299 #define CONFIG_SPL_FRAMEWORK
300 #define CONFIG_SPL_LIBCOMMON_SUPPORT
301 #define CONFIG_SPL_LIBGENERIC_SUPPORT
302 #define CONFIG_SPL_SERIAL_SUPPORT
303 #define CONFIG_SPL_BOARD_INIT
304 #define CONFIG_SPL_RAM_DEVICE
305 
306 #define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"
307 
308 /* MMC support */
309 #ifdef CONFIG_ZYNQ_SDHCI
310 #define CONFIG_SPL_MMC_SUPPORT
311 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
312 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
313 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
314 #define CONFIG_SPL_LIBDISK_SUPPORT
315 #define CONFIG_SPL_FAT_SUPPORT
316 #ifdef CONFIG_OF_SEPARATE
317 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
318 #else
319 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
320 #endif
321 #endif
322 
323 /* Disable dcache for SPL just for sure */
324 #ifdef CONFIG_SPL_BUILD
325 #define CONFIG_SYS_DCACHE_OFF
326 #undef CONFIG_FPGA
327 #endif
328 
329 /* Address in RAM where the parameters must be copied by SPL. */
330 #define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
331 
332 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
333 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
334 
335 /* Not using MMC raw mode - just for compilation purpose */
336 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
337 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
338 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
339 
340 /* qspi mode is working fine */
341 #ifdef CONFIG_ZYNQ_QSPI
342 #define CONFIG_SPL_SPI_SUPPORT
343 #define CONFIG_SPL_SPI_LOAD
344 #define CONFIG_SPL_SPI_FLASH_SUPPORT
345 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
346 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
347 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
348 #define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
349 					CONFIG_SYS_SPI_ARGS_SIZE)
350 #endif
351 
352 /* for booting directly linux */
353 #define CONFIG_SPL_OS_BOOT
354 
355 /* SP location before relocation, must use scratch RAM */
356 #define CONFIG_SPL_TEXT_BASE	0x0
357 
358 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
359 #define CONFIG_SPL_MAX_SIZE	0x30000
360 
361 /* The highest 64k OCM address */
362 #define OCM_HIGH_ADDR	0xffff0000
363 
364 /* On the top of OCM space */
365 #define CONFIG_SYS_SPL_MALLOC_START	OCM_HIGH_ADDR
366 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000
367 
368 /*
369  * SPL stack position - and stack goes down
370  * 0xfffffe00 is used for putting wfi loop.
371  * Set it up as limit for now.
372  */
373 #define CONFIG_SPL_STACK	0xfffffe00
374 
375 /* BSS setup */
376 #define CONFIG_SPL_BSS_START_ADDR	0x100000
377 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
378 
379 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
380 
381 
382 #endif /* __CONFIG_ZYNQ_COMMON_H */
383