1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_SYS_L2CACHE_OFF 20 #ifndef CONFIG_SYS_L2CACHE_OFF 21 # define CONFIG_SYS_L2_PL310 22 # define CONFIG_SYS_PL310_BASE 0xf8f02000 23 #endif 24 25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 27 #define CONFIG_SYS_TIMER_COUNTS_DOWN 28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 29 30 /* Serial drivers */ 31 /* The following table includes the supported baudrates */ 32 #define CONFIG_SYS_BAUDRATE_TABLE \ 33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 34 35 #define CONFIG_ARM_DCC 36 #define CONFIG_ZYNQ_SERIAL 37 38 /* Ethernet driver */ 39 #if defined(CONFIG_ZYNQ_GEM) 40 # define CONFIG_MII 41 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 42 # define CONFIG_PHY_MARVELL 43 # define CONFIG_PHY_REALTEK 44 # define CONFIG_PHY_XILINX 45 # define CONFIG_BOOTP_BOOTPATH 46 # define CONFIG_BOOTP_GATEWAY 47 # define CONFIG_BOOTP_HOSTNAME 48 # define CONFIG_BOOTP_MAY_FAIL 49 #endif 50 51 /* SPI */ 52 #ifdef CONFIG_ZYNQ_SPI 53 #endif 54 55 /* QSPI */ 56 #ifdef CONFIG_ZYNQ_QSPI 57 # define CONFIG_SF_DEFAULT_SPEED 30000000 58 # define CONFIG_SPI_FLASH_ISSI 59 #endif 60 61 /* NOR */ 62 #ifdef CONFIG_MTD_NOR_FLASH 63 # define CONFIG_SYS_FLASH_BASE 0xE2000000 64 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 65 # define CONFIG_SYS_MAX_FLASH_BANKS 1 66 # define CONFIG_SYS_MAX_FLASH_SECT 512 67 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 68 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 69 # define CONFIG_FLASH_SHOW_PROGRESS 10 70 # define CONFIG_SYS_FLASH_CFI 71 # undef CONFIG_SYS_FLASH_EMPTY_INFO 72 # define CONFIG_FLASH_CFI_DRIVER 73 # undef CONFIG_SYS_FLASH_PROTECTION 74 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 75 #endif 76 77 #ifdef CONFIG_NAND_ZYNQ 78 #define CONFIG_SYS_MAX_NAND_DEVICE 1 79 #define CONFIG_SYS_NAND_ONFI_DETECTION 80 #define CONFIG_MTD_DEVICE 81 #endif 82 83 /* MMC */ 84 #if defined(CONFIG_MMC_SDHCI_ZYNQ) 85 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 86 #endif 87 88 #ifdef CONFIG_USB_EHCI_ZYNQ 89 # define CONFIG_EHCI_IS_TDI 90 91 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 92 # define DFU_DEFAULT_POLL_TIMEOUT 300 93 # define CONFIG_USB_CABLE_CHECK 94 # define CONFIG_CMD_THOR_DOWNLOAD 95 # define CONFIG_THOR_RESET_OFF 96 # define CONFIG_USB_FUNCTION_THOR 97 # define DFU_ALT_INFO_RAM \ 98 "dfu_ram_info=" \ 99 "set dfu_alt_info " \ 100 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 101 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 102 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 103 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 104 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 105 106 # if defined(CONFIG_MMC_SDHCI_ZYNQ) 107 # define DFU_ALT_INFO_MMC \ 108 "dfu_mmc_info=" \ 109 "set dfu_alt_info " \ 110 "${kernel_image} fat 0 1\\\\;" \ 111 "${devicetree_image} fat 0 1\\\\;" \ 112 "${ramdisk_image} fat 0 1\0" \ 113 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 114 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 115 116 # define DFU_ALT_INFO \ 117 DFU_ALT_INFO_RAM \ 118 DFU_ALT_INFO_MMC 119 # else 120 # define DFU_ALT_INFO \ 121 DFU_ALT_INFO_RAM 122 # endif 123 #endif 124 125 #if !defined(DFU_ALT_INFO) 126 # define DFU_ALT_INFO 127 #endif 128 129 #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB) 130 # define CONFIG_SUPPORT_VFAT 131 #endif 132 133 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 134 #define CONFIG_SYS_I2C_ZYNQ 135 #endif 136 137 /* I2C */ 138 #if defined(CONFIG_SYS_I2C_ZYNQ) 139 # define CONFIG_SYS_I2C 140 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 141 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 142 #endif 143 144 /* EEPROM */ 145 #ifdef CONFIG_ZYNQ_EEPROM 146 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 147 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 148 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 149 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 150 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 151 #endif 152 153 /* Total Size of Environment Sector */ 154 #define CONFIG_ENV_SIZE (128 << 10) 155 156 /* Allow to overwrite serial and ethaddr */ 157 #define CONFIG_ENV_OVERWRITE 158 159 /* Environment */ 160 #ifndef CONFIG_ENV_IS_NOWHERE 161 # ifdef CONFIG_MTD_NOR_FLASH 162 /* Environment in NOR flash */ 163 # elif defined(CONFIG_ZYNQ_QSPI) 164 /* Environment in Serial Flash */ 165 # endif 166 167 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 168 # define CONFIG_ENV_OFFSET 0xE0000 169 #endif 170 171 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 172 #define CONFIG_PREBOOT 173 174 /* Default environment */ 175 #ifndef CONFIG_EXTRA_ENV_SETTINGS 176 #define CONFIG_EXTRA_ENV_SETTINGS \ 177 "fit_image=fit.itb\0" \ 178 "load_addr=0x2000000\0" \ 179 "fit_size=0x800000\0" \ 180 "flash_off=0x100000\0" \ 181 "nor_flash_off=0xE2100000\0" \ 182 "fdt_high=0x20000000\0" \ 183 "initrd_high=0x20000000\0" \ 184 "loadbootenv_addr=0x2000000\0" \ 185 "bootenv=uEnv.txt\0" \ 186 "bootenv_dev=mmc\0" \ 187 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 188 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 189 "env import -t ${loadbootenv_addr} $filesize\0" \ 190 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 191 "setbootenv=if env run bootenv_existence_test; then " \ 192 "if env run loadbootenv; then " \ 193 "env run importbootenv; " \ 194 "fi; " \ 195 "fi; \0" \ 196 "sd_loadbootenv=set bootenv_dev mmc && " \ 197 "run setbootenv \0" \ 198 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 199 "preboot=if test $modeboot = sdboot; then " \ 200 "run sd_loadbootenv; " \ 201 "echo Checking if uenvcmd is set ...; " \ 202 "if test -n $uenvcmd; then " \ 203 "echo Running uenvcmd ...; " \ 204 "run uenvcmd; " \ 205 "fi; " \ 206 "fi; \0" \ 207 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 208 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 209 "bootm ${load_addr}\0" \ 210 "sdboot=echo Copying FIT from SD to RAM... && " \ 211 "load mmc 0 ${load_addr} ${fit_image} && " \ 212 "bootm ${load_addr}\0" \ 213 "jtagboot=echo TFTPing FIT to RAM... && " \ 214 "tftpboot ${load_addr} ${fit_image} && " \ 215 "bootm ${load_addr}\0" \ 216 "usbboot=if usb start; then " \ 217 "echo Copying FIT from USB to RAM... && " \ 218 "load usb 0 ${load_addr} ${fit_image} && " \ 219 "bootm ${load_addr}; fi\0" \ 220 DFU_ALT_INFO 221 #endif 222 223 #define CONFIG_BOOTCOMMAND "run $modeboot" 224 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 225 226 /* Miscellaneous configurable options */ 227 228 #define CONFIG_CMDLINE_EDITING 229 #define CONFIG_AUTO_COMPLETE 230 #define CONFIG_SYS_LONGHELP 231 #define CONFIG_CLOCKS 232 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 233 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 234 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 235 sizeof(CONFIG_SYS_PROMPT) + 16) 236 237 #ifndef CONFIG_NR_DRAM_BANKS 238 # define CONFIG_NR_DRAM_BANKS 1 239 #endif 240 241 #define CONFIG_SYS_MEMTEST_START 0 242 #define CONFIG_SYS_MEMTEST_END 0x1000 243 244 #define CONFIG_SYS_MALLOC_LEN 0x1400000 245 246 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 247 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 248 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 249 CONFIG_SYS_INIT_RAM_SIZE - \ 250 GENERATED_GBL_DATA_SIZE) 251 252 /* Enable the PL to be downloaded */ 253 #define CONFIG_FPGA 254 #define CONFIG_FPGA_XILINX 255 #define CONFIG_FPGA_ZYNQPL 256 257 /* FIT support */ 258 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 259 260 /* FDT support */ 261 #define CONFIG_DISPLAY_BOARDINFO_LATE 262 263 /* Extend size of kernel image for uncompression */ 264 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 265 266 /* Boot FreeBSD/vxWorks from an ELF image */ 267 #define CONFIG_SYS_MMC_MAX_DEVICE 1 268 269 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 270 271 /* Commands */ 272 273 /* SPL part */ 274 #define CONFIG_CMD_SPL 275 #define CONFIG_SPL_FRAMEWORK 276 277 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 278 279 /* MMC support */ 280 #ifdef CONFIG_MMC_SDHCI_ZYNQ 281 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 282 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 283 #endif 284 285 /* Disable dcache for SPL just for sure */ 286 #ifdef CONFIG_SPL_BUILD 287 #define CONFIG_SYS_DCACHE_OFF 288 #undef CONFIG_FPGA 289 #endif 290 291 /* Address in RAM where the parameters must be copied by SPL. */ 292 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 293 294 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 295 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 296 297 /* Not using MMC raw mode - just for compilation purpose */ 298 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 299 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 300 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 301 302 /* qspi mode is working fine */ 303 #ifdef CONFIG_ZYNQ_QSPI 304 #define CONFIG_SPL_SPI_LOAD 305 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 306 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 307 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 308 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 309 CONFIG_SYS_SPI_ARGS_SIZE) 310 #endif 311 312 /* for booting directly linux */ 313 314 /* SP location before relocation, must use scratch RAM */ 315 #define CONFIG_SPL_TEXT_BASE 0x0 316 317 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 318 #define CONFIG_SPL_MAX_SIZE 0x30000 319 320 /* The highest 64k OCM address */ 321 #define OCM_HIGH_ADDR 0xffff0000 322 323 /* On the top of OCM space */ 324 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 325 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 326 327 /* 328 * SPL stack position - and stack goes down 329 * 0xfffffe00 is used for putting wfi loop. 330 * Set it up as limit for now. 331 */ 332 #define CONFIG_SPL_STACK 0xfffffe00 333 334 /* BSS setup */ 335 #define CONFIG_SPL_BSS_START_ADDR 0x100000 336 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 337 338 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 339 340 #endif /* __CONFIG_ZYNQ_COMMON_H */ 341