1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_SYS_L2CACHE_OFF 20 #ifndef CONFIG_SYS_L2CACHE_OFF 21 # define CONFIG_SYS_L2_PL310 22 # define CONFIG_SYS_PL310_BASE 0xf8f02000 23 #endif 24 25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 27 #define CONFIG_SYS_TIMER_COUNTS_DOWN 28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 29 30 /* Serial drivers */ 31 #define CONFIG_BAUDRATE 115200 32 /* The following table includes the supported baudrates */ 33 #define CONFIG_SYS_BAUDRATE_TABLE \ 34 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 35 36 #define CONFIG_ARM_DCC 37 #define CONFIG_ZYNQ_SERIAL 38 39 /* Ethernet driver */ 40 #if defined(CONFIG_ZYNQ_GEM) 41 # define CONFIG_MII 42 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 43 # define CONFIG_PHY_MARVELL 44 # define CONFIG_PHY_REALTEK 45 # define CONFIG_PHY_XILINX 46 # define CONFIG_BOOTP_BOOTPATH 47 # define CONFIG_BOOTP_GATEWAY 48 # define CONFIG_BOOTP_HOSTNAME 49 # define CONFIG_BOOTP_MAY_FAIL 50 #endif 51 52 /* SPI */ 53 #ifdef CONFIG_ZYNQ_SPI 54 #endif 55 56 /* QSPI */ 57 #ifdef CONFIG_ZYNQ_QSPI 58 # define CONFIG_SF_DEFAULT_SPEED 30000000 59 # define CONFIG_SPI_FLASH_ISSI 60 #endif 61 62 /* NOR */ 63 #ifndef CONFIG_SYS_NO_FLASH 64 # define CONFIG_SYS_FLASH_BASE 0xE2000000 65 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 66 # define CONFIG_SYS_MAX_FLASH_BANKS 1 67 # define CONFIG_SYS_MAX_FLASH_SECT 512 68 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 69 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 70 # define CONFIG_FLASH_SHOW_PROGRESS 10 71 # define CONFIG_SYS_FLASH_CFI 72 # undef CONFIG_SYS_FLASH_EMPTY_INFO 73 # define CONFIG_FLASH_CFI_DRIVER 74 # undef CONFIG_SYS_FLASH_PROTECTION 75 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 76 #endif 77 78 #ifdef CONFIG_NAND_ZYNQ 79 #define CONFIG_CMD_NAND_LOCK_UNLOCK 80 #define CONFIG_SYS_MAX_NAND_DEVICE 1 81 #define CONFIG_SYS_NAND_ONFI_DETECTION 82 #define CONFIG_MTD_DEVICE 83 #endif 84 85 /* MMC */ 86 #if defined(CONFIG_ZYNQ_SDHCI) 87 # define CONFIG_GENERIC_MMC 88 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 89 #endif 90 91 #ifdef CONFIG_USB_EHCI_ZYNQ 92 # define CONFIG_EHCI_IS_TDI 93 94 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 95 # define DFU_DEFAULT_POLL_TIMEOUT 300 96 # define CONFIG_USB_CABLE_CHECK 97 # define CONFIG_CMD_THOR_DOWNLOAD 98 # define CONFIG_THOR_RESET_OFF 99 # define CONFIG_USB_FUNCTION_THOR 100 # define DFU_ALT_INFO_RAM \ 101 "dfu_ram_info=" \ 102 "set dfu_alt_info " \ 103 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 104 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 105 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 106 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 107 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 108 109 # if defined(CONFIG_ZYNQ_SDHCI) 110 # define DFU_ALT_INFO_MMC \ 111 "dfu_mmc_info=" \ 112 "set dfu_alt_info " \ 113 "${kernel_image} fat 0 1\\\\;" \ 114 "${devicetree_image} fat 0 1\\\\;" \ 115 "${ramdisk_image} fat 0 1\0" \ 116 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 117 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 118 119 # define DFU_ALT_INFO \ 120 DFU_ALT_INFO_RAM \ 121 DFU_ALT_INFO_MMC 122 # else 123 # define DFU_ALT_INFO \ 124 DFU_ALT_INFO_RAM 125 # endif 126 #endif 127 128 #if !defined(DFU_ALT_INFO) 129 # define DFU_ALT_INFO 130 #endif 131 132 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 133 # define CONFIG_SUPPORT_VFAT 134 # define CONFIG_FAT_WRITE 135 # define CONFIG_DOS_PARTITION 136 #endif 137 138 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 139 #define CONFIG_SYS_I2C_ZYNQ 140 #endif 141 142 /* I2C */ 143 #if defined(CONFIG_SYS_I2C_ZYNQ) 144 # define CONFIG_SYS_I2C 145 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 146 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 147 #endif 148 149 /* EEPROM */ 150 #ifdef CONFIG_ZYNQ_EEPROM 151 # define CONFIG_CMD_EEPROM 152 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 153 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 154 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 155 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 156 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 157 #endif 158 159 /* Total Size of Environment Sector */ 160 #define CONFIG_ENV_SIZE (128 << 10) 161 162 /* Allow to overwrite serial and ethaddr */ 163 #define CONFIG_ENV_OVERWRITE 164 165 /* Environment */ 166 #ifndef CONFIG_ENV_IS_NOWHERE 167 # ifndef CONFIG_SYS_NO_FLASH 168 /* Environment in NOR flash */ 169 # define CONFIG_ENV_IS_IN_FLASH 170 # elif defined(CONFIG_ZYNQ_QSPI) 171 /* Environment in Serial Flash */ 172 # define CONFIG_ENV_IS_IN_SPI_FLASH 173 # elif defined(CONFIG_SYS_NO_FLASH) 174 # define CONFIG_ENV_IS_NOWHERE 175 # endif 176 177 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 178 # define CONFIG_ENV_OFFSET 0xE0000 179 #endif 180 181 /* enable preboot to be loaded before CONFIG_BOOTDELAY */ 182 #define CONFIG_PREBOOT 183 184 /* Default environment */ 185 #ifndef CONFIG_EXTRA_ENV_SETTINGS 186 #define CONFIG_EXTRA_ENV_SETTINGS \ 187 "fit_image=fit.itb\0" \ 188 "load_addr=0x2000000\0" \ 189 "fit_size=0x800000\0" \ 190 "flash_off=0x100000\0" \ 191 "nor_flash_off=0xE2100000\0" \ 192 "fdt_high=0x20000000\0" \ 193 "initrd_high=0x20000000\0" \ 194 "loadbootenv_addr=0x2000000\0" \ 195 "bootenv=uEnv.txt\0" \ 196 "bootenv_dev=mmc\0" \ 197 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ 198 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ 199 "env import -t ${loadbootenv_addr} $filesize\0" \ 200 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ 201 "setbootenv=if env run bootenv_existence_test; then " \ 202 "if env run loadbootenv; then " \ 203 "env run importbootenv; " \ 204 "fi; " \ 205 "fi; \0" \ 206 "sd_loadbootenv=set bootenv_dev mmc && " \ 207 "run setbootenv \0" \ 208 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ 209 "preboot=if test $modeboot = sdboot; then " \ 210 "run sd_loadbootenv; " \ 211 "echo Checking if uenvcmd is set ...; " \ 212 "if test -n $uenvcmd; then " \ 213 "echo Running uenvcmd ...; " \ 214 "run uenvcmd; " \ 215 "fi; " \ 216 "fi; \0" \ 217 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 218 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 219 "bootm ${load_addr}\0" \ 220 "sdboot=echo Copying FIT from SD to RAM... && " \ 221 "load mmc 0 ${load_addr} ${fit_image} && " \ 222 "bootm ${load_addr}\0" \ 223 "jtagboot=echo TFTPing FIT to RAM... && " \ 224 "tftpboot ${load_addr} ${fit_image} && " \ 225 "bootm ${load_addr}\0" \ 226 "usbboot=if usb start; then " \ 227 "echo Copying FIT from USB to RAM... && " \ 228 "load usb 0 ${load_addr} ${fit_image} && " \ 229 "bootm ${load_addr}; fi\0" \ 230 DFU_ALT_INFO 231 #endif 232 233 #define CONFIG_BOOTCOMMAND "run $modeboot" 234 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 235 236 /* Miscellaneous configurable options */ 237 238 #define CONFIG_CMDLINE_EDITING 239 #define CONFIG_AUTO_COMPLETE 240 #define CONFIG_BOARD_LATE_INIT 241 #define CONFIG_SYS_LONGHELP 242 #define CONFIG_CLOCKS 243 #define CONFIG_CMD_CLK 244 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 245 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 246 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 247 sizeof(CONFIG_SYS_PROMPT) + 16) 248 249 #ifndef CONFIG_NR_DRAM_BANKS 250 # define CONFIG_NR_DRAM_BANKS 1 251 #endif 252 253 #define CONFIG_SYS_MEMTEST_START 0 254 #define CONFIG_SYS_MEMTEST_END 0x1000 255 256 #define CONFIG_SYS_MALLOC_LEN 0x1400000 257 258 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 259 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 260 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 261 CONFIG_SYS_INIT_RAM_SIZE - \ 262 GENERATED_GBL_DATA_SIZE) 263 264 /* Enable the PL to be downloaded */ 265 #define CONFIG_FPGA 266 #define CONFIG_FPGA_XILINX 267 #define CONFIG_FPGA_ZYNQPL 268 #define CONFIG_CMD_FPGA_LOADMK 269 #define CONFIG_CMD_FPGA_LOADP 270 #define CONFIG_CMD_FPGA_LOADBP 271 #define CONFIG_CMD_FPGA_LOADFS 272 273 /* FIT support */ 274 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 275 276 /* FDT support */ 277 #define CONFIG_DISPLAY_BOARDINFO_LATE 278 279 /* Extend size of kernel image for uncompression */ 280 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 281 282 /* Boot FreeBSD/vxWorks from an ELF image */ 283 #define CONFIG_SYS_MMC_MAX_DEVICE 1 284 285 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 286 287 /* Commands */ 288 289 /* SPL part */ 290 #define CONFIG_CMD_SPL 291 #define CONFIG_SPL_FRAMEWORK 292 #define CONFIG_SPL_BOARD_INIT 293 294 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 295 296 /* MMC support */ 297 #ifdef CONFIG_ZYNQ_SDHCI 298 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 299 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 300 #endif 301 302 /* Disable dcache for SPL just for sure */ 303 #ifdef CONFIG_SPL_BUILD 304 #define CONFIG_SYS_DCACHE_OFF 305 #undef CONFIG_FPGA 306 #endif 307 308 /* Address in RAM where the parameters must be copied by SPL. */ 309 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 310 311 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 312 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 313 314 /* Not using MMC raw mode - just for compilation purpose */ 315 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 316 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 317 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 318 319 /* qspi mode is working fine */ 320 #ifdef CONFIG_ZYNQ_QSPI 321 #define CONFIG_SPL_SPI_LOAD 322 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 323 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 324 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 325 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 326 CONFIG_SYS_SPI_ARGS_SIZE) 327 #endif 328 329 /* for booting directly linux */ 330 331 /* SP location before relocation, must use scratch RAM */ 332 #define CONFIG_SPL_TEXT_BASE 0x0 333 334 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 335 #define CONFIG_SPL_MAX_SIZE 0x30000 336 337 /* The highest 64k OCM address */ 338 #define OCM_HIGH_ADDR 0xffff0000 339 340 /* On the top of OCM space */ 341 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 342 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 343 344 /* 345 * SPL stack position - and stack goes down 346 * 0xfffffe00 is used for putting wfi loop. 347 * Set it up as limit for now. 348 */ 349 #define CONFIG_SPL_STACK 0xfffffe00 350 351 /* BSS setup */ 352 #define CONFIG_SPL_BSS_START_ADDR 0x100000 353 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 354 355 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 356 357 #endif /* __CONFIG_ZYNQ_COMMON_H */ 358