xref: /openbmc/u-boot/include/configs/zynq-common.h (revision 17573c2791a76acd71fa82db513f31e965aa641b)
1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ	800000000
16 #endif
17 
18 /* Cache options */
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_SYS_CACHELINE_SIZE	32
21 
22 #define CONFIG_SYS_L2CACHE_OFF
23 #ifndef CONFIG_SYS_L2CACHE_OFF
24 # define CONFIG_SYS_L2_PL310
25 # define CONFIG_SYS_PL310_BASE		0xf8f02000
26 #endif
27 
28 #define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
29 #define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
30 #define CONFIG_SYS_TIMER_COUNTS_DOWN
31 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)
32 
33 /* Serial drivers */
34 #define CONFIG_BAUDRATE		115200
35 /* The following table includes the supported baudrates */
36 #define CONFIG_SYS_BAUDRATE_TABLE  \
37 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
38 
39 #define CONFIG_ARM_DCC
40 #define CONFIG_ZYNQ_SERIAL
41 
42 /* Ethernet driver */
43 #if defined(CONFIG_ZYNQ_GEM)
44 # define CONFIG_MII
45 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
46 # define CONFIG_PHY_MARVELL
47 # define CONFIG_PHY_REALTEK
48 # define CONFIG_PHY_XILINX
49 # define CONFIG_BOOTP_SERVERIP
50 # define CONFIG_BOOTP_BOOTPATH
51 # define CONFIG_BOOTP_GATEWAY
52 # define CONFIG_BOOTP_HOSTNAME
53 # define CONFIG_BOOTP_MAY_FAIL
54 #endif
55 
56 /* SPI */
57 #ifdef CONFIG_ZYNQ_SPI
58 # define CONFIG_CMD_SF
59 #endif
60 
61 /* QSPI */
62 #ifdef CONFIG_ZYNQ_QSPI
63 # define CONFIG_SF_DEFAULT_SPEED	30000000
64 # define CONFIG_SPI_FLASH_ISSI
65 # define CONFIG_CMD_SF
66 #endif
67 
68 /* NOR */
69 #ifndef CONFIG_SYS_NO_FLASH
70 # define CONFIG_SYS_FLASH_BASE		0xE2000000
71 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
72 # define CONFIG_SYS_MAX_FLASH_BANKS	1
73 # define CONFIG_SYS_MAX_FLASH_SECT	512
74 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
75 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
76 # define CONFIG_FLASH_SHOW_PROGRESS	10
77 # define CONFIG_SYS_FLASH_CFI
78 # undef CONFIG_SYS_FLASH_EMPTY_INFO
79 # define CONFIG_FLASH_CFI_DRIVER
80 # undef CONFIG_SYS_FLASH_PROTECTION
81 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
82 #endif
83 
84 /* MMC */
85 #if defined(CONFIG_ZYNQ_SDHCI)
86 # define CONFIG_MMC
87 # define CONFIG_GENERIC_MMC
88 # define CONFIG_SDHCI
89 # define CONFIG_CMD_MMC
90 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
91 #endif
92 
93 #ifdef CONFIG_ZYNQ_USB
94 # define CONFIG_USB_EHCI
95 # define CONFIG_CMD_USB
96 # define CONFIG_USB_STORAGE
97 # define CONFIG_USB_EHCI_ZYNQ
98 # define CONFIG_EHCI_IS_TDI
99 # define CONFIG_USB_MAX_CONTROLLER_COUNT	2
100 
101 # define CONFIG_CI_UDC           /* ChipIdea CI13xxx UDC */
102 # define CONFIG_USB_GADGET_DUALSPEED
103 # define CONFIG_USB_GADGET_DOWNLOAD
104 # define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
105 # define DFU_DEFAULT_POLL_TIMEOUT	300
106 # define CONFIG_USB_FUNCTION_DFU
107 # define CONFIG_DFU_RAM
108 # define CONFIG_USB_GADGET_VBUS_DRAW	2
109 # define CONFIG_G_DNL_VENDOR_NUM	0x03FD
110 # define CONFIG_G_DNL_PRODUCT_NUM	0x0300
111 # define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
112 # define CONFIG_USB_CABLE_CHECK
113 # define CONFIG_CMD_DFU
114 # define CONFIG_CMD_THOR_DOWNLOAD
115 # define CONFIG_THOR_RESET_OFF
116 # define CONFIG_USB_FUNCTION_THOR
117 # define DFU_ALT_INFO_RAM \
118 	"dfu_ram_info=" \
119 	"set dfu_alt_info " \
120 	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
121 	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
122 	"${ramdisk_image} ram 0x2000000 0x600000\0" \
123 	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
124 	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
125 
126 # if defined(CONFIG_ZYNQ_SDHCI)
127 #  define CONFIG_DFU_MMC
128 #  define DFU_ALT_INFO_MMC \
129 	"dfu_mmc_info=" \
130 	"set dfu_alt_info " \
131 	"${kernel_image} fat 0 1\\\\;" \
132 	"${devicetree_image} fat 0 1\\\\;" \
133 	"${ramdisk_image} fat 0 1\0" \
134 	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
135 	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
136 
137 #  define DFU_ALT_INFO	\
138 	DFU_ALT_INFO_RAM \
139 	DFU_ALT_INFO_MMC
140 # else
141 #  define DFU_ALT_INFO	\
142 	DFU_ALT_INFO_RAM
143 # endif
144 #endif
145 
146 #if !defined(DFU_ALT_INFO)
147 # define DFU_ALT_INFO
148 #endif
149 
150 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
151 # define CONFIG_SUPPORT_VFAT
152 # define CONFIG_CMD_FAT
153 # define CONFIG_CMD_EXT2
154 # define CONFIG_FAT_WRITE
155 # define CONFIG_DOS_PARTITION
156 # define CONFIG_CMD_EXT4
157 # define CONFIG_CMD_EXT4_WRITE
158 # define CONFIG_CMD_FS_GENERIC
159 #endif
160 
161 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
162 #define CONFIG_SYS_I2C_ZYNQ
163 #endif
164 
165 /* I2C */
166 #if defined(CONFIG_SYS_I2C_ZYNQ)
167 # define CONFIG_CMD_I2C
168 # define CONFIG_SYS_I2C
169 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
170 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
171 #endif
172 
173 /* EEPROM */
174 #ifdef CONFIG_ZYNQ_EEPROM
175 # define CONFIG_CMD_EEPROM
176 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
177 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
178 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
179 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
180 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
181 #endif
182 
183 /* Total Size of Environment Sector */
184 #define CONFIG_ENV_SIZE			(128 << 10)
185 
186 /* Allow to overwrite serial and ethaddr */
187 #define CONFIG_ENV_OVERWRITE
188 
189 /* Environment */
190 #ifndef CONFIG_ENV_IS_NOWHERE
191 # ifndef CONFIG_SYS_NO_FLASH
192 /* Environment in NOR flash */
193 #  define CONFIG_ENV_IS_IN_FLASH
194 # elif defined(CONFIG_ZYNQ_QSPI)
195 /* Environment in Serial Flash */
196 #  define CONFIG_ENV_IS_IN_SPI_FLASH
197 # elif defined(CONFIG_SYS_NO_FLASH)
198 #  define CONFIG_ENV_IS_NOWHERE
199 # endif
200 
201 # define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
202 # define CONFIG_ENV_OFFSET		0xE0000
203 #endif
204 
205 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
206 #define CONFIG_PREBOOT
207 
208 /* Default environment */
209 #ifndef CONFIG_EXTRA_ENV_SETTINGS
210 #define CONFIG_EXTRA_ENV_SETTINGS	\
211 	"fit_image=fit.itb\0"		\
212 	"load_addr=0x2000000\0"		\
213 	"fit_size=0x800000\0"		\
214 	"flash_off=0x100000\0"		\
215 	"nor_flash_off=0xE2100000\0"	\
216 	"fdt_high=0x20000000\0"		\
217 	"initrd_high=0x20000000\0"	\
218 	"loadbootenv_addr=0x2000000\0" \
219 	"bootenv=uEnv.txt\0" \
220 	"bootenv_dev=mmc\0" \
221 	"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
222 	"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
223 		"env import -t ${loadbootenv_addr} $filesize\0" \
224 	"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
225 	"setbootenv=if env run bootenv_existence_test; then " \
226 			"if env run loadbootenv; then " \
227 				"env run importbootenv; " \
228 			"fi; " \
229 		"fi; \0" \
230 	"sd_loadbootenv=set bootenv_dev mmc && " \
231 			"run setbootenv \0" \
232 	"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
233 	"preboot=if test $modeboot = sdboot; then " \
234 			"run sd_loadbootenv; " \
235 			"echo Checking if uenvcmd is set ...; " \
236 			"if test -n $uenvcmd; then " \
237 				"echo Running uenvcmd ...; " \
238 				"run uenvcmd; " \
239 			"fi; " \
240 		"fi; \0" \
241 	"norboot=echo Copying FIT from NOR flash to RAM... && " \
242 		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
243 		"bootm ${load_addr}\0" \
244 	"sdboot=echo Copying FIT from SD to RAM... && " \
245 		"load mmc 0 ${load_addr} ${fit_image} && " \
246 		"bootm ${load_addr}\0" \
247 	"jtagboot=echo TFTPing FIT to RAM... && " \
248 		"tftpboot ${load_addr} ${fit_image} && " \
249 		"bootm ${load_addr}\0" \
250 	"usbboot=if usb start; then " \
251 			"echo Copying FIT from USB to RAM... && " \
252 			"load usb 0 ${load_addr} ${fit_image} && " \
253 			"bootm ${load_addr}; fi\0" \
254 		DFU_ALT_INFO
255 #endif
256 
257 #define CONFIG_BOOTCOMMAND		"run $modeboot"
258 #define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
259 #define CONFIG_SYS_LOAD_ADDR		0 /* default? */
260 
261 /* Miscellaneous configurable options */
262 #define CONFIG_SYS_HUSH_PARSER
263 
264 #define CONFIG_CMDLINE_EDITING
265 #define CONFIG_AUTO_COMPLETE
266 #define CONFIG_BOARD_LATE_INIT
267 #define CONFIG_DISPLAY_BOARDINFO
268 #define CONFIG_SYS_LONGHELP
269 #define CONFIG_CLOCKS
270 #define CONFIG_CMD_CLK
271 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
272 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
273 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
274 					sizeof(CONFIG_SYS_PROMPT) + 16)
275 
276 /* Physical Memory map */
277 #define CONFIG_SYS_TEXT_BASE		0x4000000
278 
279 #ifndef CONFIG_NR_DRAM_BANKS
280 # define CONFIG_NR_DRAM_BANKS		1
281 #endif
282 
283 #define CONFIG_SYS_MEMTEST_START	0
284 #define CONFIG_SYS_MEMTEST_END		0x1000
285 
286 #define CONFIG_SYS_MALLOC_LEN		0x1400000
287 
288 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
289 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
290 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
291 					CONFIG_SYS_INIT_RAM_SIZE - \
292 					GENERATED_GBL_DATA_SIZE)
293 
294 /* Enable the PL to be downloaded */
295 #define CONFIG_FPGA
296 #define CONFIG_FPGA_XILINX
297 #define CONFIG_FPGA_ZYNQPL
298 #define CONFIG_CMD_FPGA_LOADMK
299 #define CONFIG_CMD_FPGA_LOADP
300 #define CONFIG_CMD_FPGA_LOADBP
301 #define CONFIG_CMD_FPGA_LOADFS
302 
303 /* FIT support */
304 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
305 
306 /* FDT support */
307 #define CONFIG_DISPLAY_BOARDINFO_LATE
308 
309 /* Extend size of kernel image for uncompression */
310 #define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)
311 
312 /* Boot FreeBSD/vxWorks from an ELF image */
313 #define CONFIG_SYS_MMC_MAX_DEVICE	1
314 
315 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
316 
317 /* Commands */
318 #define CONFIG_CMD_PING
319 #define CONFIG_CMD_DHCP
320 #define CONFIG_CMD_MII
321 #define CONFIG_CMD_TFTPPUT
322 
323 /* SPL part */
324 #define CONFIG_CMD_SPL
325 #define CONFIG_SPL_FRAMEWORK
326 #define CONFIG_SPL_LIBCOMMON_SUPPORT
327 #define CONFIG_SPL_LIBGENERIC_SUPPORT
328 #define CONFIG_SPL_SERIAL_SUPPORT
329 #define CONFIG_SPL_BOARD_INIT
330 #define CONFIG_SPL_RAM_DEVICE
331 
332 #define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"
333 
334 /* MMC support */
335 #ifdef CONFIG_ZYNQ_SDHCI
336 #define CONFIG_SPL_MMC_SUPPORT
337 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
338 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
339 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
340 #define CONFIG_SPL_LIBDISK_SUPPORT
341 #define CONFIG_SPL_FAT_SUPPORT
342 #ifdef CONFIG_OF_SEPARATE
343 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
344 #else
345 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
346 #endif
347 #endif
348 
349 /* Disable dcache for SPL just for sure */
350 #ifdef CONFIG_SPL_BUILD
351 #define CONFIG_SYS_DCACHE_OFF
352 #undef CONFIG_FPGA
353 #endif
354 
355 /* Address in RAM where the parameters must be copied by SPL. */
356 #define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000
357 
358 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
359 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
360 
361 /* Not using MMC raw mode - just for compilation purpose */
362 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
363 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
364 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0
365 
366 /* qspi mode is working fine */
367 #ifdef CONFIG_ZYNQ_QSPI
368 #define CONFIG_SPL_SPI_SUPPORT
369 #define CONFIG_SPL_SPI_LOAD
370 #define CONFIG_SPL_SPI_FLASH_SUPPORT
371 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
372 #define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
373 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
374 #define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
375 					CONFIG_SYS_SPI_ARGS_SIZE)
376 #endif
377 
378 /* for booting directly linux */
379 #define CONFIG_SPL_OS_BOOT
380 
381 /* SP location before relocation, must use scratch RAM */
382 #define CONFIG_SPL_TEXT_BASE	0x0
383 
384 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
385 #define CONFIG_SPL_MAX_SIZE	0x30000
386 
387 /* The highest 64k OCM address */
388 #define OCM_HIGH_ADDR	0xffff0000
389 
390 /* On the top of OCM space */
391 #define CONFIG_SYS_SPL_MALLOC_START	OCM_HIGH_ADDR
392 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000
393 
394 /*
395  * SPL stack position - and stack goes down
396  * 0xfffffe00 is used for putting wfi loop.
397  * Set it up as limit for now.
398  */
399 #define CONFIG_SPL_STACK	0xfffffe00
400 
401 /* BSS setup */
402 #define CONFIG_SPL_BSS_START_ADDR	0x100000
403 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
404 
405 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
406 
407 
408 #endif /* __CONFIG_ZYNQ_COMMON_H */
409