1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_SYS_CACHELINE_SIZE 32 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 # define CONFIG_SYS_L2_PL310 25 # define CONFIG_SYS_PL310_BASE 0xf8f02000 26 #endif 27 28 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 29 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 30 #define CONFIG_SYS_TIMER_COUNTS_DOWN 31 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 32 33 /* Serial drivers */ 34 #define CONFIG_BAUDRATE 115200 35 /* The following table includes the supported baudrates */ 36 #define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* DCC driver */ 40 #if defined(CONFIG_ZYNQ_DCC) 41 # define CONFIG_ARM_DCC 42 #else 43 # define CONFIG_ZYNQ_SERIAL 44 #endif 45 46 #define CONFIG_ZYNQ_GPIO 47 48 /* Ethernet driver */ 49 #if defined(CONFIG_ZYNQ_GEM) 50 # define CONFIG_MII 51 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 52 # define CONFIG_PHY_MARVELL 53 # define CONFIG_PHY_REALTEK 54 # define CONFIG_BOOTP_SERVERIP 55 # define CONFIG_BOOTP_BOOTPATH 56 # define CONFIG_BOOTP_GATEWAY 57 # define CONFIG_BOOTP_HOSTNAME 58 # define CONFIG_BOOTP_MAY_FAIL 59 #endif 60 61 /* SPI */ 62 #ifdef CONFIG_ZYNQ_SPI 63 # define CONFIG_CMD_SF 64 #endif 65 66 /* QSPI */ 67 #ifdef CONFIG_ZYNQ_QSPI 68 # define CONFIG_SF_DEFAULT_SPEED 30000000 69 # define CONFIG_SPI_FLASH_ISSI 70 # define CONFIG_CMD_SF 71 #endif 72 73 /* NOR */ 74 #ifndef CONFIG_SYS_NO_FLASH 75 # define CONFIG_SYS_FLASH_BASE 0xE2000000 76 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 77 # define CONFIG_SYS_MAX_FLASH_BANKS 1 78 # define CONFIG_SYS_MAX_FLASH_SECT 512 79 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 80 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 81 # define CONFIG_FLASH_SHOW_PROGRESS 10 82 # define CONFIG_SYS_FLASH_CFI 83 # undef CONFIG_SYS_FLASH_EMPTY_INFO 84 # define CONFIG_FLASH_CFI_DRIVER 85 # undef CONFIG_SYS_FLASH_PROTECTION 86 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 87 #endif 88 89 /* MMC */ 90 #if defined(CONFIG_ZYNQ_SDHCI) 91 # define CONFIG_MMC 92 # define CONFIG_GENERIC_MMC 93 # define CONFIG_SDHCI 94 # define CONFIG_CMD_MMC 95 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 96 #endif 97 98 #ifdef CONFIG_ZYNQ_USB 99 # define CONFIG_USB_EHCI 100 # define CONFIG_CMD_USB 101 # define CONFIG_USB_STORAGE 102 # define CONFIG_USB_EHCI_ZYNQ 103 # define CONFIG_USB_ULPI_VIEWPORT 104 # define CONFIG_USB_ULPI 105 # define CONFIG_EHCI_IS_TDI 106 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 107 108 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ 109 # define CONFIG_USB_GADGET 110 # define CONFIG_USB_GADGET_DUALSPEED 111 # define CONFIG_USB_GADGET_DOWNLOAD 112 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 113 # define DFU_DEFAULT_POLL_TIMEOUT 300 114 # define CONFIG_USB_FUNCTION_DFU 115 # define CONFIG_DFU_RAM 116 # define CONFIG_USB_GADGET_VBUS_DRAW 2 117 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD 118 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 119 # define CONFIG_G_DNL_MANUFACTURER "Xilinx" 120 # define CONFIG_USB_GADGET 121 # define CONFIG_USB_CABLE_CHECK 122 # define CONFIG_CMD_DFU 123 # define CONFIG_CMD_THOR_DOWNLOAD 124 # define CONFIG_USB_FUNCTION_THOR 125 # define DFU_ALT_INFO_RAM \ 126 "dfu_ram_info=" \ 127 "set dfu_alt_info " \ 128 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 129 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 130 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 131 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 132 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 133 134 # if defined(CONFIG_ZYNQ_SDHCI) 135 # define CONFIG_DFU_MMC 136 # define DFU_ALT_INFO_MMC \ 137 "dfu_mmc_info=" \ 138 "set dfu_alt_info " \ 139 "${kernel_image} fat 0 1\\\\;" \ 140 "${devicetree_image} fat 0 1\\\\;" \ 141 "${ramdisk_image} fat 0 1\0" \ 142 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 143 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 144 145 # define DFU_ALT_INFO \ 146 DFU_ALT_INFO_RAM \ 147 DFU_ALT_INFO_MMC 148 # else 149 # define DFU_ALT_INFO \ 150 DFU_ALT_INFO_RAM 151 # endif 152 #endif 153 154 #if !defined(DFU_ALT_INFO) 155 # define DFU_ALT_INFO 156 #endif 157 158 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 159 # define CONFIG_SUPPORT_VFAT 160 # define CONFIG_CMD_FAT 161 # define CONFIG_CMD_EXT2 162 # define CONFIG_FAT_WRITE 163 # define CONFIG_DOS_PARTITION 164 # define CONFIG_CMD_EXT4 165 # define CONFIG_CMD_EXT4_WRITE 166 # define CONFIG_CMD_FS_GENERIC 167 #endif 168 169 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 170 #define CONFIG_SYS_I2C_ZYNQ 171 #endif 172 173 /* I2C */ 174 #if defined(CONFIG_SYS_I2C_ZYNQ) 175 # define CONFIG_CMD_I2C 176 # define CONFIG_SYS_I2C 177 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 178 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 179 #endif 180 181 /* EEPROM */ 182 #ifdef CONFIG_ZYNQ_EEPROM 183 # define CONFIG_CMD_EEPROM 184 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 185 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 186 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 187 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 188 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 189 #endif 190 191 /* Total Size of Environment Sector */ 192 #define CONFIG_ENV_SIZE (128 << 10) 193 194 /* Allow to overwrite serial and ethaddr */ 195 #define CONFIG_ENV_OVERWRITE 196 197 /* Environment */ 198 #ifndef CONFIG_ENV_IS_NOWHERE 199 # ifndef CONFIG_SYS_NO_FLASH 200 /* Environment in NOR flash */ 201 # define CONFIG_ENV_IS_IN_FLASH 202 # elif defined(CONFIG_ZYNQ_QSPI) 203 /* Environment in Serial Flash */ 204 # define CONFIG_ENV_IS_IN_SPI_FLASH 205 # elif defined(CONFIG_SYS_NO_FLASH) 206 # define CONFIG_ENV_IS_NOWHERE 207 # endif 208 209 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 210 # define CONFIG_ENV_OFFSET 0xE0000 211 #endif 212 213 /* Default environment */ 214 #define CONFIG_EXTRA_ENV_SETTINGS \ 215 "fit_image=fit.itb\0" \ 216 "load_addr=0x2000000\0" \ 217 "fit_size=0x800000\0" \ 218 "flash_off=0x100000\0" \ 219 "nor_flash_off=0xE2100000\0" \ 220 "fdt_high=0x20000000\0" \ 221 "initrd_high=0x20000000\0" \ 222 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 223 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 224 "bootm ${load_addr}\0" \ 225 "sdboot=echo Copying FIT from SD to RAM... && " \ 226 "load mmc 0 ${load_addr} ${fit_image} && " \ 227 "bootm ${load_addr}\0" \ 228 "jtagboot=echo TFTPing FIT to RAM... && " \ 229 "tftpboot ${load_addr} ${fit_image} && " \ 230 "bootm ${load_addr}\0" \ 231 "usbboot=if usb start; then " \ 232 "echo Copying FIT from USB to RAM... && " \ 233 "load usb 0 ${load_addr} ${fit_image} && " \ 234 "bootm ${load_addr}; fi\0" \ 235 DFU_ALT_INFO 236 237 #define CONFIG_BOOTCOMMAND "run $modeboot" 238 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ 239 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 240 241 /* Miscellaneous configurable options */ 242 #define CONFIG_SYS_HUSH_PARSER 243 244 #define CONFIG_CMDLINE_EDITING 245 #define CONFIG_AUTO_COMPLETE 246 #define CONFIG_BOARD_LATE_INIT 247 #define CONFIG_DISPLAY_BOARDINFO 248 #define CONFIG_SYS_LONGHELP 249 #define CONFIG_CLOCKS 250 #define CONFIG_CMD_CLK 251 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 252 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 253 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 254 sizeof(CONFIG_SYS_PROMPT) + 16) 255 256 /* Physical Memory map */ 257 #define CONFIG_SYS_TEXT_BASE 0x4000000 258 259 #define CONFIG_NR_DRAM_BANKS 1 260 #define CONFIG_SYS_SDRAM_BASE 0 261 262 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 263 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 264 265 #define CONFIG_SYS_MALLOC_LEN 0x1400000 266 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE 267 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 268 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 269 CONFIG_SYS_INIT_RAM_SIZE - \ 270 GENERATED_GBL_DATA_SIZE) 271 272 /* Enable the PL to be downloaded */ 273 #define CONFIG_FPGA 274 #define CONFIG_FPGA_XILINX 275 #define CONFIG_FPGA_ZYNQPL 276 #define CONFIG_CMD_FPGA_LOADMK 277 #define CONFIG_CMD_FPGA_LOADP 278 #define CONFIG_CMD_FPGA_LOADBP 279 #define CONFIG_CMD_FPGA_LOADFS 280 281 /* Open Firmware flat tree */ 282 #define CONFIG_OF_LIBFDT 283 284 /* FIT support */ 285 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 286 287 /* FDT support */ 288 #define CONFIG_DISPLAY_BOARDINFO_LATE 289 290 /* Extend size of kernel image for uncompression */ 291 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 292 293 /* Boot FreeBSD/vxWorks from an ELF image */ 294 #define CONFIG_SYS_MMC_MAX_DEVICE 1 295 296 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 297 298 /* Commands */ 299 #define CONFIG_CMD_PING 300 #define CONFIG_CMD_DHCP 301 #define CONFIG_CMD_MII 302 #define CONFIG_CMD_TFTPPUT 303 304 /* SPL part */ 305 #define CONFIG_CMD_SPL 306 #define CONFIG_SPL_FRAMEWORK 307 #define CONFIG_SPL_LIBCOMMON_SUPPORT 308 #define CONFIG_SPL_LIBGENERIC_SUPPORT 309 #define CONFIG_SPL_SERIAL_SUPPORT 310 #define CONFIG_SPL_BOARD_INIT 311 #define CONFIG_SPL_RAM_DEVICE 312 313 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 314 315 /* MMC support */ 316 #ifdef CONFIG_ZYNQ_SDHCI 317 #define CONFIG_SPL_MMC_SUPPORT 318 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 319 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 320 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 321 #define CONFIG_SPL_LIBDISK_SUPPORT 322 #define CONFIG_SPL_FAT_SUPPORT 323 #ifdef CONFIG_OF_SEPARATE 324 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" 325 #else 326 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 327 #endif 328 #endif 329 330 /* Disable dcache for SPL just for sure */ 331 #ifdef CONFIG_SPL_BUILD 332 #define CONFIG_SYS_DCACHE_OFF 333 #undef CONFIG_FPGA 334 #endif 335 336 /* Address in RAM where the parameters must be copied by SPL. */ 337 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 338 339 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 340 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 341 342 /* Not using MMC raw mode - just for compilation purpose */ 343 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 344 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 345 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 346 347 /* qspi mode is working fine */ 348 #ifdef CONFIG_ZYNQ_QSPI 349 #define CONFIG_SPL_SPI_SUPPORT 350 #define CONFIG_SPL_SPI_LOAD 351 #define CONFIG_SPL_SPI_FLASH_SUPPORT 352 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 353 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 354 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 355 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 356 CONFIG_SYS_SPI_ARGS_SIZE) 357 #endif 358 359 /* for booting directly linux */ 360 #define CONFIG_SPL_OS_BOOT 361 362 /* SP location before relocation, must use scratch RAM */ 363 #define CONFIG_SPL_TEXT_BASE 0x0 364 365 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 366 #define CONFIG_SPL_MAX_SIZE 0x30000 367 368 /* The highest 64k OCM address */ 369 #define OCM_HIGH_ADDR 0xffff0000 370 371 /* On the top of OCM space */ 372 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 373 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 374 375 /* 376 * SPL stack position - and stack goes down 377 * 0xfffffe00 is used for putting wfi loop. 378 * Set it up as limit for now. 379 */ 380 #define CONFIG_SPL_STACK 0xfffffe00 381 382 /* BSS setup */ 383 #define CONFIG_SPL_BSS_START_ADDR 0x100000 384 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 385 386 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 387 388 389 #endif /* __CONFIG_ZYNQ_COMMON_H */ 390