1 /* 2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> 3 * (C) Copyright 2013 Xilinx, Inc. 4 * 5 * Common configuration options for all Zynq boards. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_ZYNQ_COMMON_H 11 #define __CONFIG_ZYNQ_COMMON_H 12 13 /* CPU clock */ 14 #ifndef CONFIG_CPU_FREQ_HZ 15 # define CONFIG_CPU_FREQ_HZ 800000000 16 #endif 17 18 /* Cache options */ 19 #define CONFIG_CMD_CACHE 20 #define CONFIG_SYS_CACHELINE_SIZE 32 21 22 #define CONFIG_SYS_L2CACHE_OFF 23 #ifndef CONFIG_SYS_L2CACHE_OFF 24 # define CONFIG_SYS_L2_PL310 25 # define CONFIG_SYS_PL310_BASE 0xf8f02000 26 #endif 27 28 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 29 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR 30 #define CONFIG_SYS_TIMER_COUNTS_DOWN 31 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) 32 33 /* Serial drivers */ 34 #define CONFIG_BAUDRATE 115200 35 /* The following table includes the supported baudrates */ 36 #define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 #define CONFIG_ARM_DCC 40 #define CONFIG_ZYNQ_SERIAL 41 42 #define CONFIG_ZYNQ_GPIO 43 44 /* Ethernet driver */ 45 #if defined(CONFIG_ZYNQ_GEM) 46 # define CONFIG_MII 47 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 48 # define CONFIG_PHY_MARVELL 49 # define CONFIG_PHY_REALTEK 50 # define CONFIG_BOOTP_SERVERIP 51 # define CONFIG_BOOTP_BOOTPATH 52 # define CONFIG_BOOTP_GATEWAY 53 # define CONFIG_BOOTP_HOSTNAME 54 # define CONFIG_BOOTP_MAY_FAIL 55 #endif 56 57 /* SPI */ 58 #ifdef CONFIG_ZYNQ_SPI 59 # define CONFIG_CMD_SF 60 #endif 61 62 /* QSPI */ 63 #ifdef CONFIG_ZYNQ_QSPI 64 # define CONFIG_SF_DEFAULT_SPEED 30000000 65 # define CONFIG_SPI_FLASH_ISSI 66 # define CONFIG_CMD_SF 67 #endif 68 69 /* NOR */ 70 #ifndef CONFIG_SYS_NO_FLASH 71 # define CONFIG_SYS_FLASH_BASE 0xE2000000 72 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) 73 # define CONFIG_SYS_MAX_FLASH_BANKS 1 74 # define CONFIG_SYS_MAX_FLASH_SECT 512 75 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 76 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 77 # define CONFIG_FLASH_SHOW_PROGRESS 10 78 # define CONFIG_SYS_FLASH_CFI 79 # undef CONFIG_SYS_FLASH_EMPTY_INFO 80 # define CONFIG_FLASH_CFI_DRIVER 81 # undef CONFIG_SYS_FLASH_PROTECTION 82 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 83 #endif 84 85 /* MMC */ 86 #if defined(CONFIG_ZYNQ_SDHCI) 87 # define CONFIG_MMC 88 # define CONFIG_GENERIC_MMC 89 # define CONFIG_SDHCI 90 # define CONFIG_CMD_MMC 91 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 92 #endif 93 94 #ifdef CONFIG_ZYNQ_USB 95 # define CONFIG_USB_EHCI 96 # define CONFIG_CMD_USB 97 # define CONFIG_USB_STORAGE 98 # define CONFIG_USB_EHCI_ZYNQ 99 # define CONFIG_EHCI_IS_TDI 100 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 101 102 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ 103 # define CONFIG_USB_GADGET_DUALSPEED 104 # define CONFIG_USB_GADGET_DOWNLOAD 105 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 106 # define DFU_DEFAULT_POLL_TIMEOUT 300 107 # define CONFIG_USB_FUNCTION_DFU 108 # define CONFIG_DFU_RAM 109 # define CONFIG_USB_GADGET_VBUS_DRAW 2 110 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD 111 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300 112 # define CONFIG_G_DNL_MANUFACTURER "Xilinx" 113 # define CONFIG_USB_CABLE_CHECK 114 # define CONFIG_CMD_DFU 115 # define CONFIG_CMD_THOR_DOWNLOAD 116 # define CONFIG_USB_FUNCTION_THOR 117 # define DFU_ALT_INFO_RAM \ 118 "dfu_ram_info=" \ 119 "set dfu_alt_info " \ 120 "${kernel_image} ram 0x3000000 0x500000\\\\;" \ 121 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ 122 "${ramdisk_image} ram 0x2000000 0x600000\0" \ 123 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ 124 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" 125 126 # if defined(CONFIG_ZYNQ_SDHCI) 127 # define CONFIG_DFU_MMC 128 # define DFU_ALT_INFO_MMC \ 129 "dfu_mmc_info=" \ 130 "set dfu_alt_info " \ 131 "${kernel_image} fat 0 1\\\\;" \ 132 "${devicetree_image} fat 0 1\\\\;" \ 133 "${ramdisk_image} fat 0 1\0" \ 134 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ 135 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" 136 137 # define DFU_ALT_INFO \ 138 DFU_ALT_INFO_RAM \ 139 DFU_ALT_INFO_MMC 140 # else 141 # define DFU_ALT_INFO \ 142 DFU_ALT_INFO_RAM 143 # endif 144 #endif 145 146 #if !defined(DFU_ALT_INFO) 147 # define DFU_ALT_INFO 148 #endif 149 150 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) 151 # define CONFIG_SUPPORT_VFAT 152 # define CONFIG_CMD_FAT 153 # define CONFIG_CMD_EXT2 154 # define CONFIG_FAT_WRITE 155 # define CONFIG_DOS_PARTITION 156 # define CONFIG_CMD_EXT4 157 # define CONFIG_CMD_EXT4_WRITE 158 # define CONFIG_CMD_FS_GENERIC 159 #endif 160 161 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) 162 #define CONFIG_SYS_I2C_ZYNQ 163 #endif 164 165 /* I2C */ 166 #if defined(CONFIG_SYS_I2C_ZYNQ) 167 # define CONFIG_CMD_I2C 168 # define CONFIG_SYS_I2C 169 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 170 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 171 #endif 172 173 /* EEPROM */ 174 #ifdef CONFIG_ZYNQ_EEPROM 175 # define CONFIG_CMD_EEPROM 176 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 177 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 178 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 179 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 180 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ 181 #endif 182 183 /* Total Size of Environment Sector */ 184 #define CONFIG_ENV_SIZE (128 << 10) 185 186 /* Allow to overwrite serial and ethaddr */ 187 #define CONFIG_ENV_OVERWRITE 188 189 /* Environment */ 190 #ifndef CONFIG_ENV_IS_NOWHERE 191 # ifndef CONFIG_SYS_NO_FLASH 192 /* Environment in NOR flash */ 193 # define CONFIG_ENV_IS_IN_FLASH 194 # elif defined(CONFIG_ZYNQ_QSPI) 195 /* Environment in Serial Flash */ 196 # define CONFIG_ENV_IS_IN_SPI_FLASH 197 # elif defined(CONFIG_SYS_NO_FLASH) 198 # define CONFIG_ENV_IS_NOWHERE 199 # endif 200 201 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 202 # define CONFIG_ENV_OFFSET 0xE0000 203 #endif 204 205 /* Default environment */ 206 #define CONFIG_EXTRA_ENV_SETTINGS \ 207 "fit_image=fit.itb\0" \ 208 "load_addr=0x2000000\0" \ 209 "fit_size=0x800000\0" \ 210 "flash_off=0x100000\0" \ 211 "nor_flash_off=0xE2100000\0" \ 212 "fdt_high=0x20000000\0" \ 213 "initrd_high=0x20000000\0" \ 214 "norboot=echo Copying FIT from NOR flash to RAM... && " \ 215 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ 216 "bootm ${load_addr}\0" \ 217 "sdboot=echo Copying FIT from SD to RAM... && " \ 218 "load mmc 0 ${load_addr} ${fit_image} && " \ 219 "bootm ${load_addr}\0" \ 220 "jtagboot=echo TFTPing FIT to RAM... && " \ 221 "tftpboot ${load_addr} ${fit_image} && " \ 222 "bootm ${load_addr}\0" \ 223 "usbboot=if usb start; then " \ 224 "echo Copying FIT from USB to RAM... && " \ 225 "load usb 0 ${load_addr} ${fit_image} && " \ 226 "bootm ${load_addr}; fi\0" \ 227 DFU_ALT_INFO 228 229 #define CONFIG_BOOTCOMMAND "run $modeboot" 230 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ 231 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ 232 233 /* Miscellaneous configurable options */ 234 #define CONFIG_SYS_HUSH_PARSER 235 236 #define CONFIG_CMDLINE_EDITING 237 #define CONFIG_AUTO_COMPLETE 238 #define CONFIG_BOARD_LATE_INIT 239 #define CONFIG_DISPLAY_BOARDINFO 240 #define CONFIG_SYS_LONGHELP 241 #define CONFIG_CLOCKS 242 #define CONFIG_CMD_CLK 243 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 244 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 245 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 246 sizeof(CONFIG_SYS_PROMPT) + 16) 247 248 /* Physical Memory map */ 249 #define CONFIG_SYS_TEXT_BASE 0x4000000 250 251 #define CONFIG_NR_DRAM_BANKS 1 252 #define CONFIG_SYS_SDRAM_BASE 0 253 254 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 255 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 256 257 #define CONFIG_SYS_MALLOC_LEN 0x1400000 258 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE 259 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 260 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 261 CONFIG_SYS_INIT_RAM_SIZE - \ 262 GENERATED_GBL_DATA_SIZE) 263 264 /* Enable the PL to be downloaded */ 265 #define CONFIG_FPGA 266 #define CONFIG_FPGA_XILINX 267 #define CONFIG_FPGA_ZYNQPL 268 #define CONFIG_CMD_FPGA_LOADMK 269 #define CONFIG_CMD_FPGA_LOADP 270 #define CONFIG_CMD_FPGA_LOADBP 271 #define CONFIG_CMD_FPGA_LOADFS 272 273 /* FIT support */ 274 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ 275 276 /* FDT support */ 277 #define CONFIG_DISPLAY_BOARDINFO_LATE 278 279 /* Extend size of kernel image for uncompression */ 280 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) 281 282 /* Boot FreeBSD/vxWorks from an ELF image */ 283 #define CONFIG_SYS_MMC_MAX_DEVICE 1 284 285 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" 286 287 /* Commands */ 288 #define CONFIG_CMD_PING 289 #define CONFIG_CMD_DHCP 290 #define CONFIG_CMD_MII 291 #define CONFIG_CMD_TFTPPUT 292 293 /* SPL part */ 294 #define CONFIG_CMD_SPL 295 #define CONFIG_SPL_FRAMEWORK 296 #define CONFIG_SPL_LIBCOMMON_SUPPORT 297 #define CONFIG_SPL_LIBGENERIC_SUPPORT 298 #define CONFIG_SPL_SERIAL_SUPPORT 299 #define CONFIG_SPL_BOARD_INIT 300 #define CONFIG_SPL_RAM_DEVICE 301 302 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" 303 304 /* MMC support */ 305 #ifdef CONFIG_ZYNQ_SDHCI 306 #define CONFIG_SPL_MMC_SUPPORT 307 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 308 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 309 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 310 #define CONFIG_SPL_LIBDISK_SUPPORT 311 #define CONFIG_SPL_FAT_SUPPORT 312 #ifdef CONFIG_OF_SEPARATE 313 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" 314 #else 315 # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 316 #endif 317 #endif 318 319 /* Disable dcache for SPL just for sure */ 320 #ifdef CONFIG_SPL_BUILD 321 #define CONFIG_SYS_DCACHE_OFF 322 #undef CONFIG_FPGA 323 #endif 324 325 /* Address in RAM where the parameters must be copied by SPL. */ 326 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 327 328 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" 329 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 330 331 /* Not using MMC raw mode - just for compilation purpose */ 332 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 333 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 334 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 335 336 /* qspi mode is working fine */ 337 #ifdef CONFIG_ZYNQ_QSPI 338 #define CONFIG_SPL_SPI_SUPPORT 339 #define CONFIG_SPL_SPI_LOAD 340 #define CONFIG_SPL_SPI_FLASH_SUPPORT 341 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 342 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 343 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 344 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ 345 CONFIG_SYS_SPI_ARGS_SIZE) 346 #endif 347 348 /* for booting directly linux */ 349 #define CONFIG_SPL_OS_BOOT 350 351 /* SP location before relocation, must use scratch RAM */ 352 #define CONFIG_SPL_TEXT_BASE 0x0 353 354 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ 355 #define CONFIG_SPL_MAX_SIZE 0x30000 356 357 /* The highest 64k OCM address */ 358 #define OCM_HIGH_ADDR 0xffff0000 359 360 /* On the top of OCM space */ 361 #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR 362 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 363 364 /* 365 * SPL stack position - and stack goes down 366 * 0xfffffe00 is used for putting wfi loop. 367 * Set it up as limit for now. 368 */ 369 #define CONFIG_SPL_STACK 0xfffffe00 370 371 /* BSS setup */ 372 #define CONFIG_SPL_BSS_START_ADDR 0x100000 373 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 374 375 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 376 377 378 #endif /* __CONFIG_ZYNQ_COMMON_H */ 379