xref: /openbmc/u-boot/include/configs/zmx25.h (revision 9d466f2f)
1 /*
2  * (c) 2011 Graf-Syteco, Matthias Weisser
3  * <weisserm@arcor.de>
4  *
5  * Configuation settings for the zmx25 board
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include <asm/arch/imx-regs.h>
14 
15 #define CONFIG_SYS_TIMER_RATE		32768
16 #define CONFIG_SYS_TIMER_COUNTER	\
17 	(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
18 
19 #define CONFIG_MACH_TYPE	MACH_TYPE_ZMX25
20 /*
21  * Environment settings
22  */
23 #define CONFIG_EXTRA_ENV_SETTINGS \
24 	"gs_fast_boot=setenv bootdelay 5\0" \
25 	"gs_slow_boot=setenv bootdelay 10\0" \
26 	"bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
27 		"fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
28 		"bootm 0x81000000; bootelf 0x81000000\0"
29 
30 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 
34 /*
35  * Hardware drivers
36  */
37 
38 /*
39  * Serial
40  */
41 #define CONFIG_MXC_UART
42 #define CONFIG_MXC_UART_BASE	UART2_BASE
43 
44 /*
45  * Ethernet
46  */
47 #define CONFIG_FEC_MXC
48 #define CONFIG_FEC_MXC_PHYADDR		0x00
49 #define CONFIG_MII
50 
51 /*
52  * BOOTP options
53  */
54 #define CONFIG_BOOTP_BOOTFILESIZE
55 
56 /*
57  * Command line configuration.
58  */
59 
60 /*
61  * Additional command
62  */
63 
64 /*
65  * USB
66  */
67 #ifdef CONFIG_CMD_USB
68 #define CONFIG_USB_EHCI_MXC
69 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
70 #define CONFIG_MXC_USB_PORT	1
71 #define CONFIG_MXC_USB_PORTSC	MXC_EHCI_MODE_SERIAL
72 #define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
73 #define CONFIG_EHCI_IS_TDI
74 #endif /* CONFIG_CMD_USB */
75 
76 /* SDRAM */
77 #define CONFIG_NR_DRAM_BANKS	1
78 #define PHYS_SDRAM		0x80000000	/* start address of LPDDRRAM */
79 #define PHYS_SDRAM_SIZE		0x04000000	/* 64 megs */
80 
81 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM
82 #define CONFIG_SYS_INIT_SP_ADDR	0x78020000	/* end of internal SRAM */
83 
84 /*
85  * FLASH and environment organization
86  */
87 #define CONFIG_SYS_FLASH_BASE		0xA0000000
88 #define CONFIG_SYS_MAX_FLASH_BANKS	1
89 #define CONFIG_SYS_MAX_FLASH_SECT	256
90 
91 #define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0x00040000)
92 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
93 #define CONFIG_ENV_SIZE			(128 * 1024)
94 
95 /*
96  * CFI FLASH driver setup
97  */
98 #define CONFIG_SYS_FLASH_CFI
99 #define CONFIG_FLASH_CFI_DRIVER
100 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* ~10x faster */
101 
102 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
103 
104 #define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM + (512*1024))
105 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM + PHYS_SDRAM_SIZE)
106 
107 #define CONFIG_PREBOOT  ""
108 
109 
110 /*
111  * Size of malloc() pool
112  */
113 #define CONFIG_SYS_MALLOC_LEN		(0x400000 - 0x8000)
114 
115 #endif	/* __CONFIG_H */
116