1 /* 2 * (c) 2011 Graf-Syteco, Matthias Weisser 3 * <weisserm@arcor.de> 4 * 5 * Configuation settings for the zmx25 board 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include <asm/arch/imx-regs.h> 14 15 #define CONFIG_MX25 16 #define CONFIG_SYS_TEXT_BASE 0xA0000000 17 18 #define CONFIG_SYS_TIMER_RATE 32768 19 #define CONFIG_SYS_TIMER_COUNTER \ 20 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) 21 22 #define CONFIG_MACH_TYPE MACH_TYPE_ZMX25 23 /* 24 * Environment settings 25 */ 26 #define CONFIG_EXTRA_ENV_SETTINGS \ 27 "gs_fast_boot=setenv bootdelay 5\0" \ 28 "gs_slow_boot=setenv bootdelay 10\0" \ 29 "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \ 30 "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \ 31 "bootm 0x81000000; bootelf 0x81000000\0" 32 33 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34 #define CONFIG_SETUP_MEMORY_TAGS 35 #define CONFIG_INITRD_TAG 36 #define CONFIG_BOARD_LATE_INIT 37 38 /* 39 * Compressions 40 */ 41 #define CONFIG_LZO 42 43 /* 44 * Hardware drivers 45 */ 46 47 /* 48 * GPIO 49 */ 50 #define CONFIG_MXC_GPIO 51 52 /* 53 * Serial 54 */ 55 #define CONFIG_MXC_UART 56 #define CONFIG_MXC_UART_BASE UART2_BASE 57 #define CONFIG_CONS_INDEX 1 /* use UART2 for console */ 58 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 59 60 /* 61 * Ethernet 62 */ 63 #define CONFIG_FEC_MXC 64 #define CONFIG_FEC_MXC_PHYADDR 0x00 65 #define CONFIG_MII 66 67 /* 68 * BOOTP options 69 */ 70 #define CONFIG_BOOTP_BOOTFILESIZE 71 #define CONFIG_BOOTP_BOOTPATH 72 #define CONFIG_BOOTP_GATEWAY 73 #define CONFIG_BOOTP_HOSTNAME 74 75 /* 76 * Command line configuration. 77 */ 78 79 /* 80 * Additional command 81 */ 82 83 /* 84 * USB 85 */ 86 #ifdef CONFIG_CMD_USB 87 #define CONFIG_USB_EHCI /* Enable EHCI USB support */ 88 #define CONFIG_USB_EHCI_MXC 89 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 90 #define CONFIG_MXC_USB_PORT 1 91 #define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL 92 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) 93 #define CONFIG_EHCI_IS_TDI 94 #define CONFIG_DOS_PARTITION 95 #define CONFIG_SUPPORT_VFAT 96 #endif /* CONFIG_CMD_USB */ 97 98 /* SDRAM */ 99 #define CONFIG_NR_DRAM_BANKS 1 100 #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ 101 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 102 103 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 104 #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */ 105 106 /* 107 * FLASH and environment organization 108 */ 109 #define CONFIG_SYS_FLASH_BASE 0xA0000000 110 #define CONFIG_SYS_MAX_FLASH_BANKS 1 111 #define CONFIG_SYS_MAX_FLASH_SECT 256 112 113 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) 114 #define CONFIG_ENV_IS_IN_FLASH 1 115 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 116 #define CONFIG_ENV_SIZE (128 * 1024) 117 118 /* 119 * CFI FLASH driver setup 120 */ 121 #define CONFIG_SYS_FLASH_CFI 122 #define CONFIG_FLASH_CFI_DRIVER 123 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */ 124 125 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE 126 127 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) 128 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) 129 130 #define CONFIG_SYS_CBSIZE 256 131 #define CONFIG_SYS_MAXARGS 16 132 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 133 sizeof(CONFIG_SYS_PROMPT) + 16) 134 #define CONFIG_SYS_LONGHELP 135 #define CONFIG_CMDLINE_EDITING 136 137 #define CONFIG_PREBOOT "" 138 139 140 /* 141 * Size of malloc() pool 142 */ 143 #define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) 144 145 #endif /* __CONFIG_H */ 146