1 /* 2 * Aeronix Zipit Z2 configuration file 3 * 4 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22 #ifndef __CONFIG_H 23 #define __CONFIG_H 24 25 /* 26 * High Level Board Configuration Options 27 */ 28 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ 29 #define CONFIG_ZIPITZ2 1 /* Zipit Z2 board */ 30 #define CONFIG_SYS_TEXT_BASE 0x0 31 32 #undef CONFIG_BOARD_LATE_INIT 33 #undef CONFIG_SKIP_LOWLEVEL_INIT 34 #define CONFIG_PREBOOT 35 36 /* 37 * Environment settings 38 */ 39 #define CONFIG_ENV_OVERWRITE 40 #define CONFIG_ENV_IS_IN_FLASH 1 41 #define CONFIG_ENV_ADDR 0x40000 42 #define CONFIG_ENV_SIZE 0x20000 43 44 /* we will never enable dcache, because we have to setup MMU first */ 45 #define CONFIG_SYS_DCACHE_OFF 46 47 #define CONFIG_SYS_MALLOC_LEN (128*1024) 48 #define CONFIG_ARCH_CPU_INIT 49 50 #define CONFIG_BOOTCOMMAND \ 51 "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\ 52 "then " \ 53 "source 0xa0000000; " \ 54 "else " \ 55 "bootm 0x60000; " \ 56 "fi; " 57 #define CONFIG_BOOTARGS \ 58 "console=tty0 console=ttyS2,115200 fbcon=rotate:3" 59 #define CONFIG_TIMESTAMP 60 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 61 #define CONFIG_CMDLINE_TAG 62 #define CONFIG_SETUP_MEMORY_TAGS 63 #define CONFIG_SYS_TEXT_BASE 0x0 64 #define CONFIG_LZMA /* LZMA compression support */ 65 66 /* 67 * Serial Console Configuration 68 * STUART - the lower serial port on Colibri board 69 */ 70 #define CONFIG_PXA_SERIAL 71 #define CONFIG_STUART 1 72 #define CONFIG_CONS_INDEX 2 73 #define CONFIG_BAUDRATE 115200 74 75 /* 76 * Bootloader Components Configuration 77 */ 78 #include <config_cmd_default.h> 79 80 #undef CONFIG_CMD_NET 81 #undef CONFIG_CMD_NFS 82 #define CONFIG_CMD_ENV 83 #undef CONFIG_CMD_IMLS 84 #define CONFIG_CMD_MMC 85 #define CONFIG_CMD_SPI 86 87 /* 88 * MMC Card Configuration 89 */ 90 #ifdef CONFIG_CMD_MMC 91 #define CONFIG_MMC 92 #define CONFIG_GENERIC_MMC 93 #define CONFIG_PXA_MMC_GENERIC 94 #define CONFIG_SYS_MMC_BASE 0xF0000000 95 #define CONFIG_CMD_FAT 96 #define CONFIG_CMD_EXT2 97 #define CONFIG_DOS_PARTITION 98 #endif 99 100 /* 101 * SPI and LCD 102 */ 103 #ifdef CONFIG_CMD_SPI 104 #define CONFIG_SOFT_SPI 105 #define CONFIG_LCD 106 #define CONFIG_LMS283GF05 107 #define CONFIG_VIDEO_LOGO 108 #define CONFIG_CMD_BMP 109 #define CONFIG_SPLASH_SCREEN 110 #define CONFIG_SPLASH_SCREEN_ALIGN 111 #define CONFIG_VIDEO_BMP_GZIP 112 #define CONFIG_VIDEO_BMP_RLE8 113 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 114 #undef SPI_INIT 115 116 #define SPI_DELAY udelay(10) 117 #define SPI_SDA(val) zipitz2_spi_sda(val) 118 #define SPI_SCL(val) zipitz2_spi_scl(val) 119 #define SPI_READ zipitz2_spi_read() 120 #ifndef __ASSEMBLY__ 121 void zipitz2_spi_sda(int); 122 void zipitz2_spi_scl(int); 123 unsigned char zipitz2_spi_read(void); 124 #endif 125 #endif 126 127 /* 128 * KGDB 129 */ 130 #ifdef CONFIG_CMD_KGDB 131 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 132 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 133 #endif 134 135 /* 136 * HUSH Shell Configuration 137 */ 138 #define CONFIG_SYS_HUSH_PARSER 1 139 140 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 141 #ifdef CONFIG_SYS_HUSH_PARSER 142 #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ 143 #else 144 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 145 #endif 146 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 147 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 148 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 149 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 150 #define CONFIG_SYS_DEVICE_NULLDEV 1 151 152 /* 153 * Clock Configuration 154 */ 155 #undef CONFIG_SYS_CLKS_IN_HZ 156 #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ 157 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ 158 159 /* 160 * SRAM Map 161 */ 162 #define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ 163 #define PHYS_SRAM_SIZE 0x00040000 /* 256k */ 164 165 /* 166 * DRAM Map 167 */ 168 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 169 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 170 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 171 172 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 173 #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */ 174 175 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 176 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 177 178 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE 179 180 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 181 #define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) 182 183 /* 184 * NOR FLASH 185 */ 186 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 187 #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ 188 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ 189 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 190 191 #define CONFIG_SYS_FLASH_CFI 192 #define CONFIG_FLASH_CFI_DRIVER 1 193 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 194 195 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 196 #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE 197 198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 199 #define CONFIG_SYS_MAX_FLASH_SECT 256 200 201 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 202 203 #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) 204 #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) 205 #define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) 206 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) 207 #define CONFIG_SYS_FLASH_PROTECTION 208 209 /* 210 * GPIO settings 211 */ 212 #define CONFIG_SYS_GAFR0_L_VAL 0x02000140 213 #define CONFIG_SYS_GAFR0_U_VAL 0x59188000 214 #define CONFIG_SYS_GAFR1_L_VAL 0x63900002 215 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950 216 #define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa 217 #define CONFIG_SYS_GAFR2_U_VAL 0x29000308 218 #define CONFIG_SYS_GAFR3_L_VAL 0x54000000 219 #define CONFIG_SYS_GAFR3_U_VAL 0x000000d5 220 #define CONFIG_SYS_GPCR0_VAL 0x00000000 221 #define CONFIG_SYS_GPCR1_VAL 0x00000020 222 #define CONFIG_SYS_GPCR2_VAL 0x00000000 223 #define CONFIG_SYS_GPCR3_VAL 0x00000000 224 #define CONFIG_SYS_GPDR0_VAL 0xdafcee00 225 #define CONFIG_SYS_GPDR1_VAL 0xffa3aaab 226 #define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff 227 #define CONFIG_SYS_GPDR3_VAL 0x001b1f8a 228 #define CONFIG_SYS_GPSR0_VAL 0x06080400 229 #define CONFIG_SYS_GPSR1_VAL 0x007f0000 230 #define CONFIG_SYS_GPSR2_VAL 0x032a0000 231 #define CONFIG_SYS_GPSR3_VAL 0x00000180 232 233 #define CONFIG_SYS_PSSR_VAL 0x30 234 235 /* 236 * Clock settings 237 */ 238 #define CONFIG_SYS_CKEN 0x00511220 239 #define CONFIG_SYS_CCCR 0x00000190 240 241 /* 242 * Memory settings 243 */ 244 #define CONFIG_SYS_MSC0_VAL 0x2ffc38f8 245 #define CONFIG_SYS_MSC1_VAL 0x0000ccd1 246 #define CONFIG_SYS_MSC2_VAL 0x0000b884 247 #define CONFIG_SYS_MDCNFG_VAL 0x08000ba9 248 #define CONFIG_SYS_MDREFR_VAL 0x2011a01e 249 #define CONFIG_SYS_MDMRS_VAL 0x00000000 250 #define CONFIG_SYS_FLYCNFG_VAL 0x00010001 251 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 252 253 /* 254 * PCMCIA and CF Interfaces 255 */ 256 #define CONFIG_SYS_MECR_VAL 0x00000001 257 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 258 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 259 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 260 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 261 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 262 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 263 264 #endif /* __CONFIG_H */ 265