1 /* 2 * Aeronix Zipit Z2 configuration file 3 * 4 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* 13 * High Level Board Configuration Options 14 */ 15 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ 16 #define CONFIG_SYS_TEXT_BASE 0x0 17 18 #undef CONFIG_BOARD_LATE_INIT 19 #undef CONFIG_SKIP_LOWLEVEL_INIT 20 #define CONFIG_PREBOOT 21 22 /* 23 * Environment settings 24 */ 25 #define CONFIG_ENV_OVERWRITE 26 #define CONFIG_ENV_IS_IN_FLASH 1 27 #define CONFIG_ENV_ADDR 0x40000 28 #define CONFIG_ENV_SIZE 0x10000 29 30 #define CONFIG_SYS_MALLOC_LEN (128*1024) 31 #define CONFIG_ARCH_CPU_INIT 32 33 #define CONFIG_BOOTCOMMAND \ 34 "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\ 35 "then " \ 36 "source 0xa0000000; " \ 37 "else " \ 38 "bootm 0x50000; " \ 39 "fi; " 40 #define CONFIG_BOOTARGS \ 41 "console=tty0 console=ttyS2,115200 fbcon=rotate:3" 42 #define CONFIG_TIMESTAMP 43 #define CONFIG_CMDLINE_TAG 44 #define CONFIG_SETUP_MEMORY_TAGS 45 #define CONFIG_SYS_TEXT_BASE 0x0 46 #define CONFIG_LZMA /* LZMA compression support */ 47 48 /* 49 * Serial Console Configuration 50 * STUART - the lower serial port on Colibri board 51 */ 52 #define CONFIG_STUART 1 53 #define CONFIG_CONS_INDEX 2 54 #define CONFIG_BAUDRATE 115200 55 56 /* 57 * Bootloader Components Configuration 58 */ 59 #define CONFIG_CMD_ENV 60 61 /* 62 * MMC Card Configuration 63 */ 64 #ifdef CONFIG_CMD_MMC 65 #define CONFIG_GENERIC_MMC 66 #define CONFIG_PXA_MMC_GENERIC 67 #define CONFIG_SYS_MMC_BASE 0xF0000000 68 #define CONFIG_DOS_PARTITION 69 #endif 70 71 /* 72 * SPI and LCD 73 */ 74 #ifdef CONFIG_CMD_SPI 75 #define CONFIG_SOFT_SPI 76 #define CONFIG_LCD_ROTATION 77 #define CONFIG_PXA_LCD 78 #define CONFIG_LMS283GF05 79 80 #define SPI_DELAY udelay(10) 81 #define SPI_SDA(val) zipitz2_spi_sda(val) 82 #define SPI_SCL(val) zipitz2_spi_scl(val) 83 #define SPI_READ zipitz2_spi_read() 84 #ifndef __ASSEMBLY__ 85 void zipitz2_spi_sda(int); 86 void zipitz2_spi_scl(int); 87 unsigned char zipitz2_spi_read(void); 88 #endif 89 #endif 90 91 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 92 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 93 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 94 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 95 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 96 #define CONFIG_SYS_DEVICE_NULLDEV 1 97 98 /* 99 * Clock Configuration 100 */ 101 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ 102 103 /* 104 * SRAM Map 105 */ 106 #define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ 107 #define PHYS_SRAM_SIZE 0x00040000 /* 256k */ 108 109 /* 110 * DRAM Map 111 */ 112 #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 113 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 114 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 115 116 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 117 #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */ 118 119 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 120 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 121 122 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE 123 124 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 125 #define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) 126 127 /* 128 * NOR FLASH 129 */ 130 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 131 #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ 132 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ 133 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 134 135 #define CONFIG_SYS_FLASH_CFI 136 #define CONFIG_FLASH_CFI_DRIVER 1 137 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 138 139 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 140 #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE 141 142 #define CONFIG_SYS_MAX_FLASH_BANKS 1 143 #define CONFIG_SYS_MAX_FLASH_SECT 256 144 145 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 146 147 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 148 #define CONFIG_SYS_FLASH_WRITE_TOUT 240000 149 #define CONFIG_SYS_FLASH_LOCK_TOUT 240000 150 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 151 #define CONFIG_SYS_FLASH_PROTECTION 152 153 /* 154 * GPIO settings 155 */ 156 #define CONFIG_SYS_GAFR0_L_VAL 0x02000140 157 #define CONFIG_SYS_GAFR0_U_VAL 0x59188000 158 #define CONFIG_SYS_GAFR1_L_VAL 0x63900002 159 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950 160 #define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa 161 #define CONFIG_SYS_GAFR2_U_VAL 0x29000308 162 #define CONFIG_SYS_GAFR3_L_VAL 0x54000000 163 #define CONFIG_SYS_GAFR3_U_VAL 0x000000d5 164 #define CONFIG_SYS_GPCR0_VAL 0x00000000 165 #define CONFIG_SYS_GPCR1_VAL 0x00000020 166 #define CONFIG_SYS_GPCR2_VAL 0x00000000 167 #define CONFIG_SYS_GPCR3_VAL 0x00000000 168 #define CONFIG_SYS_GPDR0_VAL 0xdafcee00 169 #define CONFIG_SYS_GPDR1_VAL 0xffa3aaab 170 #define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff 171 #define CONFIG_SYS_GPDR3_VAL 0x001b1f8a 172 #define CONFIG_SYS_GPSR0_VAL 0x06080400 173 #define CONFIG_SYS_GPSR1_VAL 0x007f0000 174 #define CONFIG_SYS_GPSR2_VAL 0x032a0000 175 #define CONFIG_SYS_GPSR3_VAL 0x00000180 176 177 #define CONFIG_SYS_PSSR_VAL 0x30 178 179 /* 180 * Clock settings 181 */ 182 #define CONFIG_SYS_CKEN 0x00511220 183 #define CONFIG_SYS_CCCR 0x00000190 184 185 /* 186 * Memory settings 187 */ 188 #define CONFIG_SYS_MSC0_VAL 0x2ffc38f8 189 #define CONFIG_SYS_MSC1_VAL 0x0000ccd1 190 #define CONFIG_SYS_MSC2_VAL 0x0000b884 191 #define CONFIG_SYS_MDCNFG_VAL 0x08000ba9 192 #define CONFIG_SYS_MDREFR_VAL 0x2011a01e 193 #define CONFIG_SYS_MDMRS_VAL 0x00000000 194 #define CONFIG_SYS_FLYCNFG_VAL 0x00010001 195 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 196 197 /* 198 * PCMCIA and CF Interfaces 199 */ 200 #define CONFIG_SYS_MECR_VAL 0x00000001 201 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 202 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 203 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 204 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 205 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 206 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 207 208 #include "pxa-common.h" 209 210 #endif /* __CONFIG_H */ 211