1f19eb154SVasily Khoruzhick /* 2f19eb154SVasily Khoruzhick * Aeronix Zipit Z2 configuration file 3f19eb154SVasily Khoruzhick * 4f19eb154SVasily Khoruzhick * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> 5f19eb154SVasily Khoruzhick * 6f19eb154SVasily Khoruzhick * SPDX-License-Identifier: GPL-2.0+ 7f19eb154SVasily Khoruzhick */ 8f19eb154SVasily Khoruzhick 9f19eb154SVasily Khoruzhick #ifndef __CONFIG_H 10f19eb154SVasily Khoruzhick #define __CONFIG_H 11f19eb154SVasily Khoruzhick 12f19eb154SVasily Khoruzhick /* 13f19eb154SVasily Khoruzhick * High Level Board Configuration Options 14f19eb154SVasily Khoruzhick */ 15f19eb154SVasily Khoruzhick #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ 16f19eb154SVasily Khoruzhick #define CONFIG_SYS_TEXT_BASE 0x0 17f19eb154SVasily Khoruzhick 18f19eb154SVasily Khoruzhick #undef CONFIG_BOARD_LATE_INIT 19f19eb154SVasily Khoruzhick #undef CONFIG_SKIP_LOWLEVEL_INIT 20f19eb154SVasily Khoruzhick #define CONFIG_PREBOOT 21f19eb154SVasily Khoruzhick 22f19eb154SVasily Khoruzhick /* 23f19eb154SVasily Khoruzhick * Environment settings 24f19eb154SVasily Khoruzhick */ 25f19eb154SVasily Khoruzhick #define CONFIG_ENV_OVERWRITE 26f19eb154SVasily Khoruzhick #define CONFIG_ENV_IS_IN_FLASH 1 27f19eb154SVasily Khoruzhick #define CONFIG_ENV_ADDR 0x40000 28f19eb154SVasily Khoruzhick #define CONFIG_ENV_SIZE 0x10000 29f19eb154SVasily Khoruzhick 30f19eb154SVasily Khoruzhick #define CONFIG_SYS_DCACHE_OFF 31f19eb154SVasily Khoruzhick 32f19eb154SVasily Khoruzhick #define CONFIG_SYS_MALLOC_LEN (128*1024) 33f19eb154SVasily Khoruzhick #define CONFIG_ARCH_CPU_INIT 34f19eb154SVasily Khoruzhick 35f19eb154SVasily Khoruzhick #define CONFIG_BOOTCOMMAND \ 36f19eb154SVasily Khoruzhick "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\ 37f19eb154SVasily Khoruzhick "then " \ 38f19eb154SVasily Khoruzhick "source 0xa0000000; " \ 39f19eb154SVasily Khoruzhick "else " \ 40f19eb154SVasily Khoruzhick "bootm 0x50000; " \ 41f19eb154SVasily Khoruzhick "fi; " 42f19eb154SVasily Khoruzhick #define CONFIG_BOOTARGS \ 43f19eb154SVasily Khoruzhick "console=tty0 console=ttyS2,115200 fbcon=rotate:3" 44f19eb154SVasily Khoruzhick #define CONFIG_TIMESTAMP 45f19eb154SVasily Khoruzhick #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 46f19eb154SVasily Khoruzhick #define CONFIG_CMDLINE_TAG 47f19eb154SVasily Khoruzhick #define CONFIG_SETUP_MEMORY_TAGS 48f19eb154SVasily Khoruzhick #define CONFIG_SYS_TEXT_BASE 0x0 49f19eb154SVasily Khoruzhick #define CONFIG_LZMA /* LZMA compression support */ 50f19eb154SVasily Khoruzhick 51f19eb154SVasily Khoruzhick /* 52f19eb154SVasily Khoruzhick * Serial Console Configuration 53f19eb154SVasily Khoruzhick * STUART - the lower serial port on Colibri board 54f19eb154SVasily Khoruzhick */ 55f19eb154SVasily Khoruzhick #define CONFIG_PXA_SERIAL 56f19eb154SVasily Khoruzhick #define CONFIG_STUART 1 57f19eb154SVasily Khoruzhick #define CONFIG_CONS_INDEX 2 58f19eb154SVasily Khoruzhick #define CONFIG_BAUDRATE 115200 59f19eb154SVasily Khoruzhick 60f19eb154SVasily Khoruzhick /* 61f19eb154SVasily Khoruzhick * Bootloader Components Configuration 62f19eb154SVasily Khoruzhick */ 63f19eb154SVasily Khoruzhick #define CONFIG_CMD_ENV 64f19eb154SVasily Khoruzhick #define CONFIG_CMD_MMC 65f19eb154SVasily Khoruzhick #define CONFIG_CMD_SPI 66f19eb154SVasily Khoruzhick 67f19eb154SVasily Khoruzhick /* 68f19eb154SVasily Khoruzhick * MMC Card Configuration 69f19eb154SVasily Khoruzhick */ 70f19eb154SVasily Khoruzhick #ifdef CONFIG_CMD_MMC 71f19eb154SVasily Khoruzhick #define CONFIG_MMC 72f19eb154SVasily Khoruzhick #define CONFIG_GENERIC_MMC 73f19eb154SVasily Khoruzhick #define CONFIG_PXA_MMC_GENERIC 74f19eb154SVasily Khoruzhick #define CONFIG_SYS_MMC_BASE 0xF0000000 75f19eb154SVasily Khoruzhick #define CONFIG_CMD_FAT 76f19eb154SVasily Khoruzhick #define CONFIG_CMD_EXT2 77f19eb154SVasily Khoruzhick #define CONFIG_DOS_PARTITION 78f19eb154SVasily Khoruzhick #endif 79f19eb154SVasily Khoruzhick 80f19eb154SVasily Khoruzhick /* 81f19eb154SVasily Khoruzhick * SPI and LCD 82f19eb154SVasily Khoruzhick */ 83f19eb154SVasily Khoruzhick #ifdef CONFIG_CMD_SPI 84f19eb154SVasily Khoruzhick #define CONFIG_SOFT_SPI 85f19eb154SVasily Khoruzhick #define CONFIG_LCD 86*59fa089bSVasily Khoruzhick #define CONFIG_LCD_ROTATION 87f19eb154SVasily Khoruzhick #define CONFIG_PXA_LCD 88f19eb154SVasily Khoruzhick #define CONFIG_LMS283GF05 89f19eb154SVasily Khoruzhick 90f19eb154SVasily Khoruzhick #define SPI_DELAY udelay(10) 91f19eb154SVasily Khoruzhick #define SPI_SDA(val) zipitz2_spi_sda(val) 92f19eb154SVasily Khoruzhick #define SPI_SCL(val) zipitz2_spi_scl(val) 93f19eb154SVasily Khoruzhick #define SPI_READ zipitz2_spi_read() 94f19eb154SVasily Khoruzhick #ifndef __ASSEMBLY__ 95f19eb154SVasily Khoruzhick void zipitz2_spi_sda(int); 96f19eb154SVasily Khoruzhick void zipitz2_spi_scl(int); 97f19eb154SVasily Khoruzhick unsigned char zipitz2_spi_read(void); 98f19eb154SVasily Khoruzhick #endif 99f19eb154SVasily Khoruzhick #endif 100f19eb154SVasily Khoruzhick 101f19eb154SVasily Khoruzhick /* 102f19eb154SVasily Khoruzhick * HUSH Shell Configuration 103f19eb154SVasily Khoruzhick */ 104f19eb154SVasily Khoruzhick #define CONFIG_SYS_HUSH_PARSER 1 105f19eb154SVasily Khoruzhick 106f19eb154SVasily Khoruzhick #define CONFIG_SYS_LONGHELP /* undef to save memory */ 107f19eb154SVasily Khoruzhick #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 108f19eb154SVasily Khoruzhick #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 109f19eb154SVasily Khoruzhick #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 110f19eb154SVasily Khoruzhick #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 111f19eb154SVasily Khoruzhick #define CONFIG_SYS_DEVICE_NULLDEV 1 112f19eb154SVasily Khoruzhick 113f19eb154SVasily Khoruzhick /* 114f19eb154SVasily Khoruzhick * Clock Configuration 115f19eb154SVasily Khoruzhick */ 116f19eb154SVasily Khoruzhick #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ 117f19eb154SVasily Khoruzhick 118f19eb154SVasily Khoruzhick /* 119f19eb154SVasily Khoruzhick * SRAM Map 120f19eb154SVasily Khoruzhick */ 121f19eb154SVasily Khoruzhick #define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ 122f19eb154SVasily Khoruzhick #define PHYS_SRAM_SIZE 0x00040000 /* 256k */ 123f19eb154SVasily Khoruzhick 124f19eb154SVasily Khoruzhick /* 125f19eb154SVasily Khoruzhick * DRAM Map 126f19eb154SVasily Khoruzhick */ 127f19eb154SVasily Khoruzhick #define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ 128f19eb154SVasily Khoruzhick #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 129f19eb154SVasily Khoruzhick #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 130f19eb154SVasily Khoruzhick 131f19eb154SVasily Khoruzhick #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 132f19eb154SVasily Khoruzhick #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */ 133f19eb154SVasily Khoruzhick 134f19eb154SVasily Khoruzhick #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 135f19eb154SVasily Khoruzhick #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 136f19eb154SVasily Khoruzhick 137f19eb154SVasily Khoruzhick #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE 138f19eb154SVasily Khoruzhick 139f19eb154SVasily Khoruzhick #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 140f19eb154SVasily Khoruzhick #define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) 141f19eb154SVasily Khoruzhick 142f19eb154SVasily Khoruzhick /* 143f19eb154SVasily Khoruzhick * NOR FLASH 144f19eb154SVasily Khoruzhick */ 145f19eb154SVasily Khoruzhick #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 146f19eb154SVasily Khoruzhick #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ 147f19eb154SVasily Khoruzhick #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ 148f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 149f19eb154SVasily Khoruzhick 150f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_CFI 151f19eb154SVasily Khoruzhick #define CONFIG_FLASH_CFI_DRIVER 1 152f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 153f19eb154SVasily Khoruzhick 154f19eb154SVasily Khoruzhick #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 155f19eb154SVasily Khoruzhick #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE 156f19eb154SVasily Khoruzhick 157f19eb154SVasily Khoruzhick #define CONFIG_SYS_MAX_FLASH_BANKS 1 158f19eb154SVasily Khoruzhick #define CONFIG_SYS_MAX_FLASH_SECT 256 159f19eb154SVasily Khoruzhick 160f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 161f19eb154SVasily Khoruzhick 162f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 163f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_WRITE_TOUT 240000 164f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_LOCK_TOUT 240000 165f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 166f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLASH_PROTECTION 167f19eb154SVasily Khoruzhick 168f19eb154SVasily Khoruzhick /* 169f19eb154SVasily Khoruzhick * GPIO settings 170f19eb154SVasily Khoruzhick */ 171f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR0_L_VAL 0x02000140 172f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR0_U_VAL 0x59188000 173f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR1_L_VAL 0x63900002 174f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950 175f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa 176f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR2_U_VAL 0x29000308 177f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR3_L_VAL 0x54000000 178f19eb154SVasily Khoruzhick #define CONFIG_SYS_GAFR3_U_VAL 0x000000d5 179f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPCR0_VAL 0x00000000 180f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPCR1_VAL 0x00000020 181f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPCR2_VAL 0x00000000 182f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPCR3_VAL 0x00000000 183f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPDR0_VAL 0xdafcee00 184f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPDR1_VAL 0xffa3aaab 185f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff 186f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPDR3_VAL 0x001b1f8a 187f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPSR0_VAL 0x06080400 188f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPSR1_VAL 0x007f0000 189f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPSR2_VAL 0x032a0000 190f19eb154SVasily Khoruzhick #define CONFIG_SYS_GPSR3_VAL 0x00000180 191f19eb154SVasily Khoruzhick 192f19eb154SVasily Khoruzhick #define CONFIG_SYS_PSSR_VAL 0x30 193f19eb154SVasily Khoruzhick 194f19eb154SVasily Khoruzhick /* 195f19eb154SVasily Khoruzhick * Clock settings 196f19eb154SVasily Khoruzhick */ 197f19eb154SVasily Khoruzhick #define CONFIG_SYS_CKEN 0x00511220 198f19eb154SVasily Khoruzhick #define CONFIG_SYS_CCCR 0x00000190 199f19eb154SVasily Khoruzhick 200f19eb154SVasily Khoruzhick /* 201f19eb154SVasily Khoruzhick * Memory settings 202f19eb154SVasily Khoruzhick */ 203f19eb154SVasily Khoruzhick #define CONFIG_SYS_MSC0_VAL 0x2ffc38f8 204f19eb154SVasily Khoruzhick #define CONFIG_SYS_MSC1_VAL 0x0000ccd1 205f19eb154SVasily Khoruzhick #define CONFIG_SYS_MSC2_VAL 0x0000b884 206f19eb154SVasily Khoruzhick #define CONFIG_SYS_MDCNFG_VAL 0x08000ba9 207f19eb154SVasily Khoruzhick #define CONFIG_SYS_MDREFR_VAL 0x2011a01e 208f19eb154SVasily Khoruzhick #define CONFIG_SYS_MDMRS_VAL 0x00000000 209f19eb154SVasily Khoruzhick #define CONFIG_SYS_FLYCNFG_VAL 0x00010001 210f19eb154SVasily Khoruzhick #define CONFIG_SYS_SXCNFG_VAL 0x40044004 211f19eb154SVasily Khoruzhick 212f19eb154SVasily Khoruzhick /* 213f19eb154SVasily Khoruzhick * PCMCIA and CF Interfaces 214f19eb154SVasily Khoruzhick */ 215f19eb154SVasily Khoruzhick #define CONFIG_SYS_MECR_VAL 0x00000001 216f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCMEM0_VAL 0x00014307 217f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCMEM1_VAL 0x00014307 218f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCATT0_VAL 0x0001c787 219f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCATT1_VAL 0x0001c787 220f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCIO0_VAL 0x0001430f 221f19eb154SVasily Khoruzhick #define CONFIG_SYS_MCIO1_VAL 0x0001430f 222f19eb154SVasily Khoruzhick 223f19eb154SVasily Khoruzhick #include "pxa-common.h" 224f19eb154SVasily Khoruzhick 225f19eb154SVasily Khoruzhick #endif /* __CONFIG_H */ 226