1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2a7f480d9SStefan Roese /* 3a7f480d9SStefan Roese * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> 4a7f480d9SStefan Roese * 5a7f480d9SStefan Roese * Configuration settings for the CCV xPress board 6a7f480d9SStefan Roese */ 7a7f480d9SStefan Roese #ifndef __XPRESS_CONFIG_H 8a7f480d9SStefan Roese #define __XPRESS_CONFIG_H 9a7f480d9SStefan Roese 10a7f480d9SStefan Roese #include "mx6_common.h" 11552a848eSStefano Babic #include <asm/mach-imx/gpio.h> 12a7f480d9SStefan Roese 13a7f480d9SStefan Roese /* SPL options */ 14a7f480d9SStefan Roese #include "imx6_spl.h" 15a7f480d9SStefan Roese 16a7f480d9SStefan Roese /* Size of malloc() pool */ 17a7f480d9SStefan Roese #define CONFIG_SYS_MALLOC_LEN (16 << 20) 18a7f480d9SStefan Roese 19a7f480d9SStefan Roese #define CONFIG_MXC_UART 20fe12386cSAnatolij Gustschin #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR 21a7f480d9SStefan Roese 22a7f480d9SStefan Roese /* MMC Configs */ 23a7f480d9SStefan Roese #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 24a7f480d9SStefan Roese #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 25a7f480d9SStefan Roese 26a7f480d9SStefan Roese /* I2C configs */ 27a7f480d9SStefan Roese #define CONFIG_SYS_I2C 28a7f480d9SStefan Roese #define CONFIG_SYS_I2C_MXC 29a7f480d9SStefan Roese #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 30a7f480d9SStefan Roese #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 31a7f480d9SStefan Roese #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ 32a7f480d9SStefan Roese #define CONFIG_SYS_I2C_SPEED 100000 33a7f480d9SStefan Roese 34a7f480d9SStefan Roese /* Miscellaneous configurable options */ 35a7f480d9SStefan Roese #define CONFIG_SYS_MEMTEST_START 0x80000000 36a7f480d9SStefan Roese #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) 37a7f480d9SStefan Roese 38a7f480d9SStefan Roese #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 39a7f480d9SStefan Roese #define CONFIG_SYS_HZ 1000 40a7f480d9SStefan Roese 41a7f480d9SStefan Roese /* Physical Memory Map */ 42a7f480d9SStefan Roese #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 43a7f480d9SStefan Roese #define PHYS_SDRAM_SIZE (128 << 20) 44a7f480d9SStefan Roese 45a7f480d9SStefan Roese #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 46a7f480d9SStefan Roese #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 47a7f480d9SStefan Roese #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 48a7f480d9SStefan Roese 49a7f480d9SStefan Roese #define CONFIG_SYS_INIT_SP_OFFSET \ 50a7f480d9SStefan Roese (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 51a7f480d9SStefan Roese #define CONFIG_SYS_INIT_SP_ADDR \ 52a7f480d9SStefan Roese (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 53a7f480d9SStefan Roese 54a7f480d9SStefan Roese /* Environment is in stored in the eMMC boot partition */ 55a7f480d9SStefan Roese #define CONFIG_ENV_SIZE (16 << 10) 56a7f480d9SStefan Roese #define CONFIG_ENV_OFFSET (512 << 10) 57a7f480d9SStefan Roese #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ 58a7f480d9SStefan Roese #define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */ 59a7f480d9SStefan Roese #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */ 60a7f480d9SStefan Roese 61a7f480d9SStefan Roese /* USB Configs */ 62a7f480d9SStefan Roese #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63a7f480d9SStefan Roese #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 64a7f480d9SStefan Roese #define CONFIG_MXC_USB_FLAGS 0 65a7f480d9SStefan Roese #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 66a7f480d9SStefan Roese 67a7f480d9SStefan Roese #define CONFIG_FEC_MXC 68a7f480d9SStefan Roese #define CONFIG_FEC_ENET_DEV 0 69a7f480d9SStefan Roese #define IMX_FEC_BASE ENET_BASE_ADDR 70a7f480d9SStefan Roese #define CONFIG_FEC_MXC_PHYADDR 0x0 71a7f480d9SStefan Roese #define CONFIG_FEC_XCV_TYPE RMII 72a7f480d9SStefan Roese #define CONFIG_ETHPRIME "FEC" 73a7f480d9SStefan Roese #define CONFIG_PHY_SMSC 74a7f480d9SStefan Roese 75a7f480d9SStefan Roese #define CONFIG_IMX_THERMAL 76a7f480d9SStefan Roese 77a7f480d9SStefan Roese #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 78a7f480d9SStefan Roese 79a7f480d9SStefan Roese #define CONFIG_UBOOT_SECTOR_START 0x2 80a7f480d9SStefan Roese #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe 81a7f480d9SStefan Roese 82a7f480d9SStefan Roese #define CONFIG_EXTRA_ENV_SETTINGS \ 83a7f480d9SStefan Roese "script=boot.scr\0" \ 84a7f480d9SStefan Roese "image=zImage\0" \ 85fe12386cSAnatolij Gustschin "console=ttymxc6\0" \ 86a7f480d9SStefan Roese "fdt_high=0xffffffff\0" \ 87a7f480d9SStefan Roese "initrd_high=0xffffffff\0" \ 88a7f480d9SStefan Roese "fdt_file=undefined\0" \ 89a7f480d9SStefan Roese "fdt_addr=0x83000000\0" \ 90a7f480d9SStefan Roese "boot_fdt=try\0" \ 91a7f480d9SStefan Roese "ip_dyn=yes\0" \ 92a7f480d9SStefan Roese "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 93a7f480d9SStefan Roese "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 94a7f480d9SStefan Roese "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 95a7f480d9SStefan Roese "mmcautodetect=yes\0" \ 96a7f480d9SStefan Roese "mmcargs=setenv bootargs console=${console},${baudrate} " \ 97a7f480d9SStefan Roese "root=${mmcroot}\0" \ 98a7f480d9SStefan Roese "loadbootscript=" \ 99a7f480d9SStefan Roese "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 100a7f480d9SStefan Roese "bootscript=echo Running bootscript from mmc ...; " \ 101a7f480d9SStefan Roese "source\0" \ 102a7f480d9SStefan Roese "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 103a7f480d9SStefan Roese "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 104a7f480d9SStefan Roese "mmcboot=echo Booting from mmc ...; " \ 105a7f480d9SStefan Roese "run mmcargs; " \ 106a7f480d9SStefan Roese "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 107a7f480d9SStefan Roese "if run loadfdt; then " \ 108a7f480d9SStefan Roese "bootz ${loadaddr} - ${fdt_addr}; " \ 109a7f480d9SStefan Roese "else " \ 110a7f480d9SStefan Roese "if test ${boot_fdt} = try; then " \ 111a7f480d9SStefan Roese "bootz; " \ 112a7f480d9SStefan Roese "else " \ 113a7f480d9SStefan Roese "echo WARN: Cannot load the DT; " \ 114a7f480d9SStefan Roese "fi; " \ 115a7f480d9SStefan Roese "fi; " \ 116a7f480d9SStefan Roese "else " \ 117a7f480d9SStefan Roese "bootz; " \ 118a7f480d9SStefan Roese "fi;\0" \ 119a7f480d9SStefan Roese "uboot=ccv/u-boot.imx\0" \ 120a7f480d9SStefan Roese "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \ 121a7f480d9SStefan Roese "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \ 122a7f480d9SStefan Roese "update_uboot=if tftp ${uboot}; then " \ 123a7f480d9SStefan Roese "if itest ${filesize} > 0; then " \ 124a7f480d9SStefan Roese "mmc dev 0 1;" \ 125a7f480d9SStefan Roese "setexpr blkc ${filesize} / 0x200;" \ 126a7f480d9SStefan Roese "setexpr blkc ${blkc} + 1;" \ 127a7f480d9SStefan Roese "if itest ${blkc} <= ${uboot_size}; then " \ 128a7f480d9SStefan Roese "mmc write ${loadaddr} ${uboot_start} " \ 129a7f480d9SStefan Roese "${blkc};" \ 130a7f480d9SStefan Roese "fi;" \ 131a7f480d9SStefan Roese "fi; fi;" \ 132a7f480d9SStefan Roese "setenv filesize; setenv blkc\0" \ 133a7f480d9SStefan Roese "update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0" 134a7f480d9SStefan Roese 135a7f480d9SStefan Roese #endif /* __XPRESS_CONFIG_H */ 136