1 /*
2  * Copyright (c) 2015 Google, Inc
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef _X86_CHROMEBOOK_H
8 #define _X86_CHROMEBOOK_H
9 
10 #define CONFIG_SYS_MONITOR_LEN			(1 << 20)
11 
12 #define CONFIG_BOARD_EARLY_INIT_F
13 #define CONFIG_MISC_INIT_R
14 
15 #define CONFIG_X86_MRC_ADDR			0xfffa0000
16 #define CONFIG_X86_REFCODE_ADDR			0xffea0000
17 #define CONFIG_X86_REFCODE_RUN_ADDR		0
18 
19 #define CONFIG_SCSI_DEV_LIST	\
20 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
21 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
22 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
23 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
24 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
25 	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
26 
27 #define CONFIG_PCI_MEM_BUS	0xe0000000
28 #define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
29 #define CONFIG_PCI_MEM_SIZE	0x10000000
30 
31 #define CONFIG_PCI_PREF_BUS	0xd0000000
32 #define CONFIG_PCI_PREF_PHYS	CONFIG_PCI_PREF_BUS
33 #define CONFIG_PCI_PREF_SIZE	0x10000000
34 
35 #define CONFIG_PCI_IO_BUS	0x1000
36 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
37 #define CONFIG_PCI_IO_SIZE	0xefff
38 
39 #define CONFIG_PCI_PNP
40 
41 #define CONFIG_BIOSEMU
42 #define VIDEO_IO_OFFSET				0
43 #define CONFIG_X86EMU_RAW_IO
44 
45 #define CONFIG_ARCH_EARLY_INIT_R
46 
47 #undef CONFIG_ENV_IS_NOWHERE
48 #undef CONFIG_ENV_SIZE
49 #define CONFIG_ENV_SIZE			0x1000
50 #define CONFIG_ENV_SECT_SIZE		0x1000
51 #define CONFIG_ENV_IS_IN_SPI_FLASH
52 #define CONFIG_ENV_OFFSET		0x003f8000
53 
54 #define CONFIG_SYS_WHITE_ON_BLACK
55 
56 #define CONFIG_STD_DEVICES_SETTINGS	"stdin=usbkbd,i8042-kbd,serial\0" \
57 					"stdout=vidconsole,serial\0" \
58 					"stderr=vidconsole,serial\0"
59 
60 #endif
61