1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Allied Telesis Labs 4 */ 5 6 #ifndef _CONFIG_X530_H 7 #define _CONFIG_X530_H 8 9 /* 10 * High Level Configuration Options (easy to change) 11 */ 12 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 16 17 /* 18 * NS16550 Configuration 19 */ 20 #define CONFIG_SYS_NS16550_SERIAL 21 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 22 #if !defined(CONFIG_DM_SERIAL) 23 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 24 #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE 25 #endif 26 27 /* 28 * Serial Port configuration 29 * The following definitions let you select what serial you want to use 30 * for your console driver. 31 */ 32 33 #define CONFIG_CONS_INDEX 1 /*Console on UART0 */ 34 35 /* 36 * Commands configuration 37 */ 38 #define CONFIG_CMD_PCI 39 40 /* NAND */ 41 #define CONFIG_SYS_NAND_ONFI_DETECTION 42 #define CONFIG_SYS_NAND_USE_FLASH_BBT 43 #define CONFIG_SYS_MAX_NAND_DEVICE 1 44 45 #define BBT_CUSTOM_SCAN 46 #define BBT_CUSTOM_SCAN_PAGE 0 47 #define BBT_CUSTOM_SCAN_POSITION 2048 48 49 /* SPI NOR flash default params, used by sf commands */ 50 51 #define MTDIDS_DEFAULT "nand0=nand" 52 #define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)" 53 #define MTDPARTS_MTDOOPS "errlog" 54 55 /* Partition support */ 56 57 /* Additional FS support/configuration */ 58 59 /* USB/EHCI configuration */ 60 #define CONFIG_EHCI_IS_TDI 61 62 /* Environment in SPI NOR flash */ 63 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 64 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 65 #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ 66 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 67 #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ 68 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET 69 70 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 71 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 72 73 /* PCIe support */ 74 #ifndef CONFIG_SPL_BUILD 75 #define CONFIG_PCI_SCAN_SHOW 76 #endif 77 78 /* NAND */ 79 #define CONFIG_SYS_NAND_USE_FLASH_BBT 80 #define CONFIG_SYS_NAND_ONFI_DETECTION 81 #define CONFIG_CMD_UBI 82 #define CONFIG_CMD_UBIFS 83 #define CONFIG_LZO 84 #define CONFIG_MTD_DEVICE 85 #define CONFIG_CMD_MTDPARTS 86 87 #define CONFIG_SYS_MALLOC_LEN (4 << 20) 88 89 #include <asm/arch/config.h> 90 91 /* 92 * Other required minimal configurations 93 */ 94 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 95 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 96 97 #define CONFIG_SYS_ALT_MEMTEST 98 99 /* Keep device tree and initrd in low memory so the kernel can access them */ 100 #define CONFIG_EXTRA_ENV_SETTINGS \ 101 "fdt_high=0x10000000\0" \ 102 "initrd_high=0x10000000\0" 103 104 #define CONFIG_SYS_LOAD_ADDR 0x1000000 105 #define CONFIG_UBI_PART user 106 #define CONFIG_UBIFS_VOLUME user 107 108 /* SPL */ 109 110 /* Defines for SPL */ 111 #define CONFIG_SPL_SIZE (140 << 10) 112 #define CONFIG_SPL_TEXT_BASE 0x40000030 113 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 114 115 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 116 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 117 118 #ifdef CONFIG_SPL_BUILD 119 #define CONFIG_SYS_MALLOC_SIMPLE 120 #endif 121 122 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 123 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 124 125 /* SPL related SPI defines */ 126 #define CONFIG_SPL_SPI_LOAD 127 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 128 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 129 130 #endif /* _CONFIG_X530_H */ 131