1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * WORK Microwave work_92105 board configuration file 4 * 5 * (C) Copyright 2014 DENX Software Engineering GmbH 6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 7 */ 8 9 #ifndef __CONFIG_WORK_92105_H__ 10 #define __CONFIG_WORK_92105_H__ 11 12 /* SoC and board defines */ 13 #include <linux/sizes.h> 14 #include <asm/arch/cpu.h> 15 16 /* 17 * Define work_92105 machine type by hand -- done only for compatibility 18 * with original board code 19 */ 20 #define CONFIG_MACH_TYPE 736 21 22 #define CONFIG_SYS_ICACHE_OFF 23 #define CONFIG_SYS_DCACHE_OFF 24 #if !defined(CONFIG_SPL_BUILD) 25 #define CONFIG_SKIP_LOWLEVEL_INIT 26 #endif 27 28 /* generate LPC32XX-specific SPL image */ 29 #define CONFIG_LPC32XX_SPL 30 31 /* 32 * Memory configurations 33 */ 34 #define CONFIG_NR_DRAM_BANKS 1 35 #define CONFIG_SYS_MALLOC_LEN SZ_1M 36 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE 37 #define CONFIG_SYS_SDRAM_SIZE SZ_128M 38 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) 39 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) 40 41 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) 42 43 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ 44 - GENERATED_GBL_DATA_SIZE) 45 46 /* 47 * Serial Driver 48 */ 49 #define CONFIG_SYS_LPC32XX_UART 5 /* UART5 - NS16550 */ 50 51 /* 52 * Ethernet Driver 53 */ 54 55 #define CONFIG_PHY_SMSC 56 #define CONFIG_LPC32XX_ETH 57 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 58 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ 59 60 /* 61 * I2C driver 62 */ 63 64 #define CONFIG_SYS_I2C_LPC32XX 65 #define CONFIG_SYS_I2C 66 #define CONFIG_SYS_I2C_SPEED 350000 67 68 /* 69 * I2C EEPROM 70 */ 71 72 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 73 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 74 75 /* 76 * I2C RTC 77 */ 78 79 #define CONFIG_RTC_DS1374 80 81 /* 82 * U-Boot General Configurations 83 */ 84 #define CONFIG_SYS_CBSIZE 1024 85 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 86 87 /* 88 * NAND chip timings for FIXME: which one? 89 */ 90 91 #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 92 #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 93 #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 94 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 95 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 96 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 97 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 98 99 /* 100 * NAND 101 */ 102 103 /* driver configuration */ 104 #define CONFIG_SYS_NAND_SELF_INIT 105 #define CONFIG_SYS_MAX_NAND_DEVICE 1 106 #define CONFIG_SYS_MAX_NAND_CHIPS 1 107 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE 108 #define CONFIG_NAND_LPC32XX_MLC 109 110 /* 111 * GPIO 112 */ 113 114 #define CONFIG_LPC32XX_GPIO 115 116 /* 117 * SSP/SPI/DISPLAY 118 */ 119 120 #define CONFIG_LPC32XX_SSP_TIMEOUT 100000 121 /* 122 * Environment 123 */ 124 125 #define CONFIG_ENV_SIZE 0x00020000 126 #define CONFIG_ENV_OFFSET 0x00100000 127 #define CONFIG_ENV_OFFSET_REDUND 0x00120000 128 #define CONFIG_ENV_ADDR 0x80000100 129 130 /* 131 * Boot Linux 132 */ 133 #define CONFIG_CMDLINE_TAG 134 #define CONFIG_SETUP_MEMORY_TAGS 135 #define CONFIG_INITRD_TAG 136 137 #define CONFIG_BOOTFILE "uImage" 138 #define CONFIG_LOADADDR 0x80008000 139 140 /* 141 * SPL 142 */ 143 144 /* SPL will be executed at offset 0 */ 145 #define CONFIG_SPL_TEXT_BASE 0x00000000 146 /* SPL will use SRAM as stack */ 147 #define CONFIG_SPL_STACK 0x0000FFF8 148 /* Use the framework and generic lib */ 149 /* SPL will use serial */ 150 /* SPL will load U-Boot from NAND offset 0x40000 */ 151 #define CONFIG_SPL_NAND_DRIVERS 152 #define CONFIG_SPL_NAND_BASE 153 #define CONFIG_SPL_NAND_BOOT 154 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 155 #define CONFIG_SPL_PAD_TO 0x20000 156 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ 157 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ 158 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 159 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 160 161 /* 162 * Include SoC specific configuration 163 */ 164 #include <asm/arch/config.h> 165 166 #endif /* __CONFIG_WORK_92105_H__*/ 167