xref: /openbmc/u-boot/include/configs/work_92105.h (revision 09d84117)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * WORK Microwave work_92105 board configuration file
4  *
5  * (C) Copyright 2014  DENX Software Engineering GmbH
6  * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7  */
8 
9 #ifndef __CONFIG_WORK_92105_H__
10 #define __CONFIG_WORK_92105_H__
11 
12 /* SoC and board defines */
13 #include <linux/sizes.h>
14 #include <asm/arch/cpu.h>
15 
16 /*
17  * Define work_92105 machine type by hand -- done only for compatibility
18  * with original board code
19  */
20 #define CONFIG_MACH_TYPE		736
21 
22 #define CONFIG_SYS_ICACHE_OFF
23 #define CONFIG_SYS_DCACHE_OFF
24 #if !defined(CONFIG_SPL_BUILD)
25 #define CONFIG_SKIP_LOWLEVEL_INIT
26 #endif
27 
28 /* generate LPC32XX-specific SPL image */
29 #define CONFIG_LPC32XX_SPL
30 
31 /*
32  * Memory configurations
33  */
34 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
35 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
36 #define CONFIG_SYS_SDRAM_SIZE		SZ_128M
37 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
38 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)
39 
40 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_32K)
41 
42 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_512K \
43 					 - GENERATED_GBL_DATA_SIZE)
44 
45 /*
46  * Serial Driver
47  */
48 #define CONFIG_SYS_LPC32XX_UART		5   /* UART5 - NS16550 */
49 
50 /*
51  * Ethernet Driver
52  */
53 
54 #define CONFIG_PHY_SMSC
55 #define CONFIG_LPC32XX_ETH
56 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
57 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
58 
59 /*
60  * I2C driver
61  */
62 
63 #define CONFIG_SYS_I2C_LPC32XX
64 #define CONFIG_SYS_I2C
65 #define CONFIG_SYS_I2C_SPEED 350000
66 
67 /*
68  * I2C EEPROM
69  */
70 
71 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x56
72 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
73 
74 /*
75  * I2C RTC
76  */
77 
78 #define CONFIG_RTC_DS1374
79 
80 /*
81  * U-Boot General Configurations
82  */
83 #define CONFIG_SYS_CBSIZE		1024
84 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
85 
86 /*
87  * NAND chip timings for FIXME: which one?
88  */
89 
90 #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY  333333333
91 #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY   10000000
92 #define CONFIG_LPC32XX_NAND_MLC_NAND_TA      18181818
93 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH      31250000
94 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW       45454545
95 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH      40000000
96 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW       83333333
97 
98 /*
99  * NAND
100  */
101 
102 /* driver configuration */
103 #define CONFIG_SYS_NAND_SELF_INIT
104 #define CONFIG_SYS_MAX_NAND_DEVICE 1
105 #define CONFIG_SYS_MAX_NAND_CHIPS 1
106 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
107 #define CONFIG_NAND_LPC32XX_MLC
108 
109 /*
110  * GPIO
111  */
112 
113 #define CONFIG_LPC32XX_GPIO
114 
115 /*
116  * SSP/SPI/DISPLAY
117  */
118 
119 #define CONFIG_LPC32XX_SSP_TIMEOUT 100000
120 /*
121  * Environment
122  */
123 
124 #define CONFIG_ENV_SIZE			0x00020000
125 #define CONFIG_ENV_OFFSET		0x00100000
126 #define CONFIG_ENV_OFFSET_REDUND	0x00120000
127 #define CONFIG_ENV_ADDR			0x80000100
128 
129 /*
130  * Boot Linux
131  */
132 #define CONFIG_CMDLINE_TAG
133 #define CONFIG_SETUP_MEMORY_TAGS
134 #define CONFIG_INITRD_TAG
135 
136 #define CONFIG_BOOTFILE			"uImage"
137 #define CONFIG_LOADADDR			0x80008000
138 
139 /*
140  * SPL
141  */
142 
143 /* SPL will be executed at offset 0 */
144 #define CONFIG_SPL_TEXT_BASE 0x00000000
145 /* SPL will use SRAM as stack */
146 #define CONFIG_SPL_STACK     0x0000FFF8
147 /* Use the framework and generic lib */
148 /* SPL will use serial */
149 /* SPL will load U-Boot from NAND offset 0x40000 */
150 #define CONFIG_SPL_NAND_DRIVERS
151 #define CONFIG_SPL_NAND_BASE
152 #define CONFIG_SPL_NAND_BOOT
153 #define CONFIG_SYS_NAND_U_BOOT_OFFS  0x00040000
154 #define CONFIG_SPL_PAD_TO 0x20000
155 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
156 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */
157 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
158 #define CONFIG_SYS_NAND_U_BOOT_DST   CONFIG_SYS_TEXT_BASE
159 
160 /*
161  * Include SoC specific configuration
162  */
163 #include <asm/arch/config.h>
164 
165 #endif  /* __CONFIG_WORK_92105_H__*/
166