1 /* 2 * WORK Microwave work_92105 board configuration file 3 * 4 * (C) Copyright 2014 DENX Software Engineering GmbH 5 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_WORK_92105_H__ 11 #define __CONFIG_WORK_92105_H__ 12 13 /* SoC and board defines */ 14 #include <linux/sizes.h> 15 #include <asm/arch/cpu.h> 16 17 /* 18 * Define work_92105 machine type by hand -- done only for compatibility 19 * with original board code 20 */ 21 #define CONFIG_MACH_TYPE 736 22 23 #define CONFIG_SYS_ICACHE_OFF 24 #define CONFIG_SYS_DCACHE_OFF 25 #if !defined(CONFIG_SPL_BUILD) 26 #define CONFIG_SKIP_LOWLEVEL_INIT 27 #endif 28 29 /* generate LPC32XX-specific SPL image */ 30 #define CONFIG_LPC32XX_SPL 31 32 /* 33 * Memory configurations 34 */ 35 #define CONFIG_NR_DRAM_BANKS 1 36 #define CONFIG_SYS_MALLOC_LEN SZ_1M 37 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE 38 #define CONFIG_SYS_SDRAM_SIZE SZ_128M 39 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) 40 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) 41 42 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) 43 44 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ 45 - GENERATED_GBL_DATA_SIZE) 46 47 /* 48 * Serial Driver 49 */ 50 #define CONFIG_SYS_LPC32XX_UART 5 /* UART5 - NS16550 */ 51 52 /* 53 * Ethernet Driver 54 */ 55 56 #define CONFIG_PHY_SMSC 57 #define CONFIG_LPC32XX_ETH 58 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 59 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ 60 61 /* 62 * I2C driver 63 */ 64 65 #define CONFIG_SYS_I2C_LPC32XX 66 #define CONFIG_SYS_I2C 67 #define CONFIG_SYS_I2C_SPEED 350000 68 69 /* 70 * I2C EEPROM 71 */ 72 73 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 74 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 75 76 /* 77 * I2C RTC 78 */ 79 80 #define CONFIG_RTC_DS1374 81 82 /* 83 * U-Boot General Configurations 84 */ 85 #define CONFIG_SYS_CBSIZE 1024 86 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 87 88 /* 89 * NAND chip timings for FIXME: which one? 90 */ 91 92 #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 93 #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 94 #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 95 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 96 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 97 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 98 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 99 100 /* 101 * NAND 102 */ 103 104 /* driver configuration */ 105 #define CONFIG_SYS_NAND_SELF_INIT 106 #define CONFIG_SYS_MAX_NAND_DEVICE 1 107 #define CONFIG_SYS_MAX_NAND_CHIPS 1 108 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE 109 #define CONFIG_NAND_LPC32XX_MLC 110 111 /* 112 * GPIO 113 */ 114 115 #define CONFIG_LPC32XX_GPIO 116 117 /* 118 * SSP/SPI/DISPLAY 119 */ 120 121 #define CONFIG_LPC32XX_SSP_TIMEOUT 100000 122 /* 123 * Environment 124 */ 125 126 #define CONFIG_ENV_SIZE 0x00020000 127 #define CONFIG_ENV_OFFSET 0x00100000 128 #define CONFIG_ENV_OFFSET_REDUND 0x00120000 129 #define CONFIG_ENV_ADDR 0x80000100 130 131 /* 132 * Boot Linux 133 */ 134 #define CONFIG_CMDLINE_TAG 135 #define CONFIG_SETUP_MEMORY_TAGS 136 #define CONFIG_INITRD_TAG 137 138 #define CONFIG_BOOTFILE "uImage" 139 #define CONFIG_LOADADDR 0x80008000 140 141 /* 142 * SPL 143 */ 144 145 /* SPL will be executed at offset 0 */ 146 #define CONFIG_SPL_TEXT_BASE 0x00000000 147 /* SPL will use SRAM as stack */ 148 #define CONFIG_SPL_STACK 0x0000FFF8 149 /* Use the framework and generic lib */ 150 /* SPL will use serial */ 151 /* SPL will load U-Boot from NAND offset 0x40000 */ 152 #define CONFIG_SPL_NAND_DRIVERS 153 #define CONFIG_SPL_NAND_BASE 154 #define CONFIG_SPL_NAND_BOOT 155 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 156 #define CONFIG_SPL_PAD_TO 0x20000 157 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ 158 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ 159 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 160 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 161 162 /* 163 * Include SoC specific configuration 164 */ 165 #include <asm/arch/config.h> 166 167 #endif /* __CONFIG_WORK_92105_H__*/ 168