1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Configuration for the woodburn board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __WOODBURN_COMMON_CONFIG_H 12 #define __WOODBURN_COMMON_CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX35 18 #define CONFIG_MX35_HCLK_FREQ 24000000 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_SYS_DCACHE_OFF 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 24 25 /* This is required to setup the ESDC controller */ 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 #define CONFIG_REVISION_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 32 /* 33 * Size of malloc() pool 34 */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 36 37 /* 38 * Hardware drivers 39 */ 40 #define CONFIG_SYS_I2C 41 #define CONFIG_SYS_I2C_MXC 42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 45 #define CONFIG_SYS_SPD_BUS_NUM 0 46 #define CONFIG_MXC_SPI 47 #define CONFIG_MXC_GPIO 48 49 /* PMIC Controller */ 50 #define CONFIG_POWER 51 #define CONFIG_POWER_I2C 52 #define CONFIG_POWER_FSL 53 #define CONFIG_POWER_FSL_MC13892 54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 55 #define CONFIG_RTC_MC13XXX 56 57 /* mmc driver */ 58 #define CONFIG_FSL_ESDHC 59 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 60 #define CONFIG_SYS_FSL_ESDHC_NUM 1 61 62 /* 63 * UART (console) 64 */ 65 #define CONFIG_MXC_UART 66 #define CONFIG_MXC_UART_BASE UART1_BASE 67 68 /* allow to overwrite serial and ethaddr */ 69 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_CONS_INDEX 1 71 72 /* 73 * Command definition 74 */ 75 #define CONFIG_BOOTP_SUBNETMASK 76 #define CONFIG_BOOTP_GATEWAY 77 #define CONFIG_BOOTP_DNS 78 79 #define CONFIG_CMD_NAND 80 81 #define CONFIG_MXC_GPIO 82 83 #define CONFIG_NET_RETRY_COUNT 100 84 85 86 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 87 88 /* 89 * Ethernet on SOC (FEC) 90 */ 91 #define CONFIG_FEC_MXC 92 #define IMX_FEC_BASE FEC_BASE_ADDR 93 #define CONFIG_PHYLIB 94 #define CONFIG_PHY_MICREL 95 #define CONFIG_FEC_MXC_PHYADDR 0x1 96 97 #define CONFIG_MII 98 #define CONFIG_DISCOVER_PHY 99 100 #define CONFIG_ARP_TIMEOUT 200UL 101 102 /* 103 * Miscellaneous configurable options 104 */ 105 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 106 #define CONFIG_CMDLINE_EDITING 107 108 #define CONFIG_AUTO_COMPLETE 109 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 110 /* Print Buffer Size */ 111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 112 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 113 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 114 115 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 116 #define CONFIG_SYS_MEMTEST_END 0x10000 117 118 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 119 120 /* 121 * Physical Memory Map 122 */ 123 #define CONFIG_NR_DRAM_BANKS 1 124 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 125 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 126 127 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 128 129 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \ 130 IRAM_BASE_ADDR - \ 131 GENERATED_GBL_DATA_SIZE) 132 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \ 133 CONFIG_SYS_GBL_DATA_OFFSET) 134 135 /* 136 * MTD Command for mtdparts 137 */ 138 #define CONFIG_MTD_DEVICE 139 #define CONFIG_FLASH_CFI_MTD 140 #define CONFIG_MTD_PARTITIONS 141 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 142 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 143 "32m(rootfb)," \ 144 "64m(pcache)," \ 145 "64m(app1)," \ 146 "10m(app2),-(spool);" \ 147 "physmap-flash.0:512k(u-boot),64k(env1)," \ 148 "64k(env2),3776k(kernel1),3776k(kernel2)" 149 150 /* 151 * FLASH and environment organization 152 */ 153 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 154 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 155 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 156 /* Monitor at beginning of flash */ 157 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 158 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 159 160 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 161 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 162 163 /* Address and size of Redundant Environment Sector */ 164 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 165 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 166 167 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 168 CONFIG_SYS_MONITOR_LEN) 169 170 /* 171 * CFI FLASH driver setup 172 */ 173 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 174 #define CONFIG_FLASH_CFI_DRIVER 175 176 /* A non-standard buffered write algorithm */ 177 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 178 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 179 180 /* 181 * NAND FLASH driver setup 182 */ 183 #define CONFIG_NAND_MXC 184 #define CONFIG_NAND_MXC_V1_1 185 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 186 #define CONFIG_SYS_MAX_NAND_DEVICE 1 187 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 188 #define CONFIG_MXC_NAND_HWECC 189 #define CONFIG_SYS_NAND_LARGEPAGE 190 191 #if 0 192 #define CONFIG_MTD_DEBUG 193 #define CONFIG_MTD_DEBUG_VERBOSE 7 194 #endif 195 #define CONFIG_SYS_NAND_ONFI_DETECTION 196 197 /* 198 * Default environment and default scripts 199 * to update uboot and load kernel 200 */ 201 202 #define CONFIG_HOSTNAME woodburn 203 #define CONFIG_EXTRA_ENV_SETTINGS \ 204 "netdev=eth0\0" \ 205 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 206 "nfsroot=${serverip}:${rootpath}\0" \ 207 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 208 "addip_sta=setenv bootargs ${bootargs} " \ 209 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 210 ":${hostname}:${netdev}:off panic=1\0" \ 211 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 212 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 213 "else run addip_sta;fi\0" \ 214 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 215 "addtty=setenv bootargs ${bootargs}" \ 216 " console=ttymxc0,${baudrate}\0" \ 217 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 218 "loadaddr=80800000\0" \ 219 "kernel_addr_r=80800000\0" \ 220 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 221 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 222 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 223 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 224 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 225 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 226 "bootm ${kernel_addr}\0" \ 227 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 228 "run nfsargs addip addtty addmtd addmisc;" \ 229 "bootm ${kernel_addr_r}\0" \ 230 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 231 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 232 "net_self=if run net_self_load;then " \ 233 "run ramargs addip addtty addmtd addmisc;" \ 234 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 235 "else echo Images not loades;fi\0" \ 236 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 237 "load=tftp ${loadaddr} ${u-boot}\0" \ 238 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 239 "update=protect off ${uboot_addr} +80000;" \ 240 "erase ${uboot_addr} +80000;" \ 241 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 242 "upd=if run load;then echo Updating u-boot;if run update;" \ 243 "then echo U-Boot updated;" \ 244 "else echo Error updating u-boot !;" \ 245 "echo Board without bootloader !!;" \ 246 "fi;" \ 247 "else echo U-Boot not downloaded..exiting;fi\0" \ 248 "bootcmd=run net_nfs\0" 249 250 #endif /* __CONFIG_H */ 251