1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Configuration for the woodburn board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __WOODBURN_COMMON_CONFIG_H 12 #define __WOODBURN_COMMON_CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX35 18 #define CONFIG_MX35_HCLK_FREQ 24000000 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_SYS_DCACHE_OFF 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 24 25 /* This is required to setup the ESDC controller */ 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 #define CONFIG_REVISION_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 32 /* 33 * Size of malloc() pool 34 */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 36 37 /* 38 * Hardware drivers 39 */ 40 #define CONFIG_SYS_I2C 41 #define CONFIG_SYS_I2C_MXC 42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 45 #define CONFIG_SYS_SPD_BUS_NUM 0 46 #define CONFIG_MXC_SPI 47 #define CONFIG_MXC_GPIO 48 49 /* PMIC Controller */ 50 #define CONFIG_POWER 51 #define CONFIG_POWER_I2C 52 #define CONFIG_POWER_FSL 53 #define CONFIG_POWER_FSL_MC13892 54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 55 #define CONFIG_RTC_MC13XXX 56 57 /* mmc driver */ 58 #define CONFIG_FSL_ESDHC 59 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 60 #define CONFIG_SYS_FSL_ESDHC_NUM 1 61 62 /* 63 * UART (console) 64 */ 65 #define CONFIG_MXC_UART 66 #define CONFIG_MXC_UART_BASE UART1_BASE 67 68 /* allow to overwrite serial and ethaddr */ 69 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_CONS_INDEX 1 71 72 /* 73 * Command definition 74 */ 75 #define CONFIG_BOOTP_SUBNETMASK 76 #define CONFIG_BOOTP_GATEWAY 77 #define CONFIG_BOOTP_DNS 78 79 #define CONFIG_MXC_GPIO 80 81 #define CONFIG_NET_RETRY_COUNT 100 82 83 84 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 85 86 /* 87 * Ethernet on SOC (FEC) 88 */ 89 #define CONFIG_FEC_MXC 90 #define IMX_FEC_BASE FEC_BASE_ADDR 91 #define CONFIG_FEC_MXC_PHYADDR 0x1 92 93 #define CONFIG_MII 94 #define CONFIG_DISCOVER_PHY 95 96 #define CONFIG_ARP_TIMEOUT 200UL 97 98 /* 99 * Miscellaneous configurable options 100 */ 101 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 102 #define CONFIG_CMDLINE_EDITING 103 104 #define CONFIG_AUTO_COMPLETE 105 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 106 /* Print Buffer Size */ 107 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 108 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 109 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 110 111 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 112 #define CONFIG_SYS_MEMTEST_END 0x10000 113 114 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 115 116 /* 117 * Physical Memory Map 118 */ 119 #define CONFIG_NR_DRAM_BANKS 1 120 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 121 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 122 123 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 124 125 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \ 126 IRAM_BASE_ADDR - \ 127 GENERATED_GBL_DATA_SIZE) 128 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \ 129 CONFIG_SYS_GBL_DATA_OFFSET) 130 131 /* 132 * MTD Command for mtdparts 133 */ 134 #define CONFIG_MTD_DEVICE 135 #define CONFIG_FLASH_CFI_MTD 136 #define CONFIG_MTD_PARTITIONS 137 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 138 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 139 "32m(rootfb)," \ 140 "64m(pcache)," \ 141 "64m(app1)," \ 142 "10m(app2),-(spool);" \ 143 "physmap-flash.0:512k(u-boot),64k(env1)," \ 144 "64k(env2),3776k(kernel1),3776k(kernel2)" 145 146 /* 147 * FLASH and environment organization 148 */ 149 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 150 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 151 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 152 /* Monitor at beginning of flash */ 153 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 154 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 155 156 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 157 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 158 159 /* Address and size of Redundant Environment Sector */ 160 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 161 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 162 163 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 164 CONFIG_SYS_MONITOR_LEN) 165 166 /* 167 * CFI FLASH driver setup 168 */ 169 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 170 #define CONFIG_FLASH_CFI_DRIVER 171 172 /* A non-standard buffered write algorithm */ 173 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 174 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 175 176 /* 177 * NAND FLASH driver setup 178 */ 179 #define CONFIG_NAND_MXC 180 #define CONFIG_NAND_MXC_V1_1 181 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 182 #define CONFIG_SYS_MAX_NAND_DEVICE 1 183 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 184 #define CONFIG_MXC_NAND_HWECC 185 #define CONFIG_SYS_NAND_LARGEPAGE 186 187 #if 0 188 #define CONFIG_MTD_DEBUG 189 #define CONFIG_MTD_DEBUG_VERBOSE 7 190 #endif 191 #define CONFIG_SYS_NAND_ONFI_DETECTION 192 193 /* 194 * Default environment and default scripts 195 * to update uboot and load kernel 196 */ 197 198 #define CONFIG_HOSTNAME woodburn 199 #define CONFIG_EXTRA_ENV_SETTINGS \ 200 "netdev=eth0\0" \ 201 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 202 "nfsroot=${serverip}:${rootpath}\0" \ 203 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 204 "addip_sta=setenv bootargs ${bootargs} " \ 205 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 206 ":${hostname}:${netdev}:off panic=1\0" \ 207 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 208 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 209 "else run addip_sta;fi\0" \ 210 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 211 "addtty=setenv bootargs ${bootargs}" \ 212 " console=ttymxc0,${baudrate}\0" \ 213 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 214 "loadaddr=80800000\0" \ 215 "kernel_addr_r=80800000\0" \ 216 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 217 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 218 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 219 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 220 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 221 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 222 "bootm ${kernel_addr}\0" \ 223 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 224 "run nfsargs addip addtty addmtd addmisc;" \ 225 "bootm ${kernel_addr_r}\0" \ 226 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 227 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 228 "net_self=if run net_self_load;then " \ 229 "run ramargs addip addtty addmtd addmisc;" \ 230 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 231 "else echo Images not loades;fi\0" \ 232 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 233 "load=tftp ${loadaddr} ${u-boot}\0" \ 234 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 235 "update=protect off ${uboot_addr} +80000;" \ 236 "erase ${uboot_addr} +80000;" \ 237 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 238 "upd=if run load;then echo Updating u-boot;if run update;" \ 239 "then echo U-Boot updated;" \ 240 "else echo Error updating u-boot !;" \ 241 "echo Board without bootloader !!;" \ 242 "fi;" \ 243 "else echo U-Boot not downloaded..exiting;fi\0" \ 244 "bootcmd=run net_nfs\0" 245 246 #endif /* __CONFIG_H */ 247