1 /*
2  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Configuration for the woodburn board.
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __WOODBURN_COMMON_CONFIG_H
12 #define __WOODBURN_COMMON_CONFIG_H
13 
14 #include <asm/arch/imx-regs.h>
15 
16  /* High Level Configuration Options */
17 #define CONFIG_MX35
18 #define CONFIG_MX35_HCLK_FREQ	24000000
19 #define CONFIG_SYS_FSL_CLK
20 
21 #define CONFIG_SYS_DCACHE_OFF
22 #define CONFIG_SYS_CACHELINE_SIZE	32
23 
24 #define CONFIG_DISPLAY_CPUINFO
25 
26 /* Only in case the value is not present in mach-types.h */
27 #ifndef MACH_TYPE_FLEA3
28 #define MACH_TYPE_FLEA3                3668
29 #endif
30 
31 #define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3
32 
33 /* This is required to setup the ESDC controller */
34 
35 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
36 #define CONFIG_REVISION_TAG
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39 
40 /*
41  * Size of malloc() pool
42  */
43 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
44 
45 /*
46  * Hardware drivers
47  */
48 #define CONFIG_SYS_I2C
49 #define CONFIG_SYS_I2C_MXC
50 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
51 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
52 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
53 #define CONFIG_SYS_SPD_BUS_NUM		0
54 #define CONFIG_MXC_SPI
55 #define CONFIG_MXC_GPIO
56 
57 /* PMIC Controller */
58 #define CONFIG_POWER
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_FSL
61 #define CONFIG_POWER_FSL_MC13892
62 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
63 #define CONFIG_RTC_MC13XXX
64 
65 
66 /* mmc driver */
67 #define CONFIG_MMC
68 #define CONFIG_GENERIC_MMC
69 #define CONFIG_FSL_ESDHC
70 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
71 #define CONFIG_SYS_FSL_ESDHC_NUM	1
72 
73 /*
74  * UART (console)
75  */
76 #define CONFIG_MXC_UART
77 #define CONFIG_MXC_UART_BASE	UART1_BASE
78 
79 /* allow to overwrite serial and ethaddr */
80 #define CONFIG_ENV_OVERWRITE
81 #define CONFIG_CONS_INDEX	1
82 #define CONFIG_BAUDRATE		115200
83 
84 /*
85  * Command definition
86  */
87 #define CONFIG_CMD_PING
88 #define CONFIG_CMD_DATE
89 #define CONFIG_CMD_DHCP
90 #define CONFIG_BOOTP_SUBNETMASK
91 #define CONFIG_BOOTP_GATEWAY
92 #define CONFIG_BOOTP_DNS
93 
94 #define CONFIG_CMD_NAND
95 #define CONFIG_CMD_CACHE
96 
97 #define CONFIG_CMD_I2C
98 #define CONFIG_CMD_SPI
99 #define CONFIG_CMD_MII
100 
101 #define CONFIG_CMD_MMC
102 #define CONFIG_DOS_PARTITION
103 #define CONFIG_EFI_PARTITION
104 #define CONFIG_CMD_EXT2
105 #define CONFIG_CMD_FAT
106 
107 #define CONFIG_MXC_GPIO
108 
109 #define CONFIG_NET_RETRY_COUNT	100
110 
111 #define CONFIG_BOOTDELAY	3
112 
113 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
114 
115 
116 /*
117  * Ethernet on SOC (FEC)
118  */
119 #define CONFIG_FEC_MXC
120 #define IMX_FEC_BASE	FEC_BASE_ADDR
121 #define CONFIG_PHYLIB
122 #define CONFIG_PHY_MICREL
123 #define CONFIG_FEC_MXC_PHYADDR	0x1
124 
125 #define CONFIG_MII
126 #define CONFIG_DISCOVER_PHY
127 
128 #define CONFIG_ARP_TIMEOUT	200UL
129 
130 /*
131  * Miscellaneous configurable options
132  */
133 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
134 #define CONFIG_CMDLINE_EDITING
135 #define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
136 
137 #define CONFIG_AUTO_COMPLETE
138 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
139 /* Print Buffer Size */
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
141 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
143 
144 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
145 #define CONFIG_SYS_MEMTEST_END		0x10000
146 
147 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
148 
149 /*
150  * Stack sizes
151  *
152  * The stack sizes are set up in start.S using the settings below
153  */
154 #define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
155 
156 /*
157  * Physical Memory Map
158  */
159 #define CONFIG_NR_DRAM_BANKS	1
160 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
161 #define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
162 
163 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
164 
165 #define CONFIG_SYS_GBL_DATA_OFFSET	(LOW_LEVEL_SRAM_STACK - \
166 						IRAM_BASE_ADDR - \
167 						GENERATED_GBL_DATA_SIZE)
168 #define CONFIG_SYS_INIT_SP_ADDR		(IRAM_BASE_ADDR + \
169 					CONFIG_SYS_GBL_DATA_OFFSET)
170 
171 /*
172  * MTD Command for mtdparts
173  */
174 #define CONFIG_CMD_MTDPARTS
175 #define CONFIG_MTD_DEVICE
176 #define CONFIG_FLASH_CFI_MTD
177 #define CONFIG_MTD_PARTITIONS
178 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
179 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
180 				"32m(rootfb)," \
181 				"64m(pcache)," \
182 				"64m(app1)," \
183 				"10m(app2),-(spool);" \
184 				"physmap-flash.0:512k(u-boot),64k(env1)," \
185 				"64k(env2),3776k(kernel1),3776k(kernel2)"
186 
187 /*
188  * FLASH and environment organization
189  */
190 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
191 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
192 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
193 /* Monitor at beginning of flash */
194 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
195 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
196 
197 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
198 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
199 
200 /* Address and size of Redundant Environment Sector	*/
201 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
202 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
203 
204 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
205 				CONFIG_SYS_MONITOR_LEN)
206 
207 #define CONFIG_ENV_IS_IN_FLASH
208 
209 /*
210  * CFI FLASH driver setup
211  */
212 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
213 #define CONFIG_FLASH_CFI_DRIVER
214 
215 /* A non-standard buffered write algorithm */
216 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
217 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
218 
219 /*
220  * NAND FLASH driver setup
221  */
222 #define CONFIG_NAND_MXC
223 #define CONFIG_NAND_MXC_V1_1
224 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
225 #define CONFIG_SYS_MAX_NAND_DEVICE	1
226 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
227 #define CONFIG_MXC_NAND_HWECC
228 #define CONFIG_SYS_NAND_LARGEPAGE
229 
230 #if 0
231 #define CONFIG_MTD_DEBUG
232 #define CONFIG_MTD_DEBUG_VERBOSE	7
233 #endif
234 #define CONFIG_SYS_NAND_ONFI_DETECTION
235 
236 /*
237  * Default environment and default scripts
238  * to update uboot and load kernel
239  */
240 
241 #define CONFIG_HOSTNAME woodburn
242 #define	CONFIG_EXTRA_ENV_SETTINGS					\
243 	"netdev=eth0\0"							\
244 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
245 		"nfsroot=${serverip}:${rootpath}\0"			\
246 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
247 	"addip_sta=setenv bootargs ${bootargs} "			\
248 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
249 		":${hostname}:${netdev}:off panic=1\0"			\
250 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
251 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
252 		"else run addip_sta;fi\0"	\
253 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
254 	"addtty=setenv bootargs ${bootargs}"				\
255 		" console=ttymxc0,${baudrate}\0"			\
256 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
257 	"loadaddr=80800000\0"						\
258 	"kernel_addr_r=80800000\0"					\
259 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
260 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
261 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
262 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
263 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
264 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
265 		"bootm ${kernel_addr}\0"				\
266 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
267 		"run nfsargs addip addtty addmtd addmisc;"		\
268 		"bootm ${kernel_addr_r}\0"				\
269 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
270 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
271 	"net_self=if run net_self_load;then "				\
272 		"run ramargs addip addtty addmtd addmisc;"		\
273 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
274 		"else echo Images not loades;fi\0"			\
275 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
276 	"load=tftp ${loadaddr} ${u-boot}\0"				\
277 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
278 	"update=protect off ${uboot_addr} +80000;"			\
279 		"erase ${uboot_addr} +80000;"				\
280 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
281 	"upd=if run load;then echo Updating u-boot;if run update;"	\
282 		"then echo U-Boot updated;"				\
283 			"else echo Error updating u-boot !;"		\
284 			"echo Board without bootloader !!;"		\
285 		"fi;"							\
286 		"else echo U-Boot not downloaded..exiting;fi\0"		\
287 	"bootcmd=run net_nfs\0"
288 
289 #endif				/* __CONFIG_H */
290