1 /*
2  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Configuration for the woodburn board.
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __WOODBURN_COMMON_CONFIG_H
12 #define __WOODBURN_COMMON_CONFIG_H
13 
14 #include <asm/arch/imx-regs.h>
15 
16  /* High Level Configuration Options */
17 #define CONFIG_MX35
18 #define CONFIG_MX35_HCLK_FREQ	24000000
19 #define CONFIG_SYS_FSL_CLK
20 
21 #define CONFIG_SYS_DCACHE_OFF
22 
23 #define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3
24 
25 /* This is required to setup the ESDC controller */
26 
27 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
28 #define CONFIG_REVISION_TAG
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG
31 
32 /*
33  * Size of malloc() pool
34  */
35 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
36 
37 /*
38  * Hardware drivers
39  */
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
43 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
44 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
45 #define CONFIG_SYS_SPD_BUS_NUM		0
46 #define CONFIG_MXC_SPI
47 #define CONFIG_MXC_GPIO
48 
49 /* PMIC Controller */
50 #define CONFIG_POWER
51 #define CONFIG_POWER_I2C
52 #define CONFIG_POWER_FSL
53 #define CONFIG_POWER_FSL_MC13892
54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
55 #define CONFIG_RTC_MC13XXX
56 
57 /* mmc driver */
58 #define CONFIG_FSL_ESDHC
59 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
60 #define CONFIG_SYS_FSL_ESDHC_NUM	1
61 
62 /*
63  * UART (console)
64  */
65 #define CONFIG_MXC_UART
66 #define CONFIG_MXC_UART_BASE	UART1_BASE
67 
68 /* allow to overwrite serial and ethaddr */
69 #define CONFIG_ENV_OVERWRITE
70 #define CONFIG_CONS_INDEX	1
71 
72 /*
73  * Command definition
74  */
75 #define CONFIG_BOOTP_SUBNETMASK
76 #define CONFIG_BOOTP_GATEWAY
77 #define CONFIG_BOOTP_DNS
78 
79 #define CONFIG_MXC_GPIO
80 
81 #define CONFIG_NET_RETRY_COUNT	100
82 
83 
84 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
85 
86 /*
87  * Ethernet on SOC (FEC)
88  */
89 #define CONFIG_FEC_MXC
90 #define IMX_FEC_BASE	FEC_BASE_ADDR
91 #define CONFIG_PHYLIB
92 #define CONFIG_PHY_MICREL
93 #define CONFIG_FEC_MXC_PHYADDR	0x1
94 
95 #define CONFIG_MII
96 #define CONFIG_DISCOVER_PHY
97 
98 #define CONFIG_ARP_TIMEOUT	200UL
99 
100 /*
101  * Miscellaneous configurable options
102  */
103 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
104 #define CONFIG_CMDLINE_EDITING
105 
106 #define CONFIG_AUTO_COMPLETE
107 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
108 /* Print Buffer Size */
109 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
110 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
111 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
112 
113 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
114 #define CONFIG_SYS_MEMTEST_END		0x10000
115 
116 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
117 
118 /*
119  * Physical Memory Map
120  */
121 #define CONFIG_NR_DRAM_BANKS	1
122 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
123 #define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
124 
125 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
126 
127 #define CONFIG_SYS_GBL_DATA_OFFSET	(LOW_LEVEL_SRAM_STACK - \
128 						IRAM_BASE_ADDR - \
129 						GENERATED_GBL_DATA_SIZE)
130 #define CONFIG_SYS_INIT_SP_ADDR		(IRAM_BASE_ADDR + \
131 					CONFIG_SYS_GBL_DATA_OFFSET)
132 
133 /*
134  * MTD Command for mtdparts
135  */
136 #define CONFIG_MTD_DEVICE
137 #define CONFIG_FLASH_CFI_MTD
138 #define CONFIG_MTD_PARTITIONS
139 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
140 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
141 				"32m(rootfb)," \
142 				"64m(pcache)," \
143 				"64m(app1)," \
144 				"10m(app2),-(spool);" \
145 				"physmap-flash.0:512k(u-boot),64k(env1)," \
146 				"64k(env2),3776k(kernel1),3776k(kernel2)"
147 
148 /*
149  * FLASH and environment organization
150  */
151 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
152 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
153 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
154 /* Monitor at beginning of flash */
155 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
156 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
157 
158 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
159 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
160 
161 /* Address and size of Redundant Environment Sector	*/
162 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
163 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
164 
165 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
166 				CONFIG_SYS_MONITOR_LEN)
167 
168 /*
169  * CFI FLASH driver setup
170  */
171 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
172 #define CONFIG_FLASH_CFI_DRIVER
173 
174 /* A non-standard buffered write algorithm */
175 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
176 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
177 
178 /*
179  * NAND FLASH driver setup
180  */
181 #define CONFIG_NAND_MXC
182 #define CONFIG_NAND_MXC_V1_1
183 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
184 #define CONFIG_SYS_MAX_NAND_DEVICE	1
185 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
186 #define CONFIG_MXC_NAND_HWECC
187 #define CONFIG_SYS_NAND_LARGEPAGE
188 
189 #if 0
190 #define CONFIG_MTD_DEBUG
191 #define CONFIG_MTD_DEBUG_VERBOSE	7
192 #endif
193 #define CONFIG_SYS_NAND_ONFI_DETECTION
194 
195 /*
196  * Default environment and default scripts
197  * to update uboot and load kernel
198  */
199 
200 #define CONFIG_HOSTNAME woodburn
201 #define	CONFIG_EXTRA_ENV_SETTINGS					\
202 	"netdev=eth0\0"							\
203 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
204 		"nfsroot=${serverip}:${rootpath}\0"			\
205 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
206 	"addip_sta=setenv bootargs ${bootargs} "			\
207 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
208 		":${hostname}:${netdev}:off panic=1\0"			\
209 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
210 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
211 		"else run addip_sta;fi\0"	\
212 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
213 	"addtty=setenv bootargs ${bootargs}"				\
214 		" console=ttymxc0,${baudrate}\0"			\
215 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
216 	"loadaddr=80800000\0"						\
217 	"kernel_addr_r=80800000\0"					\
218 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
219 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
220 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
221 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
222 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
223 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
224 		"bootm ${kernel_addr}\0"				\
225 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
226 		"run nfsargs addip addtty addmtd addmisc;"		\
227 		"bootm ${kernel_addr_r}\0"				\
228 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
229 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
230 	"net_self=if run net_self_load;then "				\
231 		"run ramargs addip addtty addmtd addmisc;"		\
232 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
233 		"else echo Images not loades;fi\0"			\
234 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
235 	"load=tftp ${loadaddr} ${u-boot}\0"				\
236 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
237 	"update=protect off ${uboot_addr} +80000;"			\
238 		"erase ${uboot_addr} +80000;"				\
239 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
240 	"upd=if run load;then echo Updating u-boot;if run update;"	\
241 		"then echo U-Boot updated;"				\
242 			"else echo Error updating u-boot !;"		\
243 			"echo Board without bootloader !!;"		\
244 		"fi;"							\
245 		"else echo U-Boot not downloaded..exiting;fi\0"		\
246 	"bootcmd=run net_nfs\0"
247 
248 #endif				/* __CONFIG_H */
249