1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Configuration for the woodburn board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __WOODBURN_COMMON_CONFIG_H 12 #define __WOODBURN_COMMON_CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX35 18 #define CONFIG_MX35_HCLK_FREQ 24000000 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_SYS_DCACHE_OFF 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 24 25 /* This is required to setup the ESDC controller */ 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 #define CONFIG_REVISION_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 32 /* 33 * Size of malloc() pool 34 */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 36 37 /* 38 * Hardware drivers 39 */ 40 #define CONFIG_SYS_I2C 41 #define CONFIG_SYS_I2C_MXC 42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 45 #define CONFIG_SYS_SPD_BUS_NUM 0 46 47 /* PMIC Controller */ 48 #define CONFIG_POWER 49 #define CONFIG_POWER_I2C 50 #define CONFIG_POWER_FSL 51 #define CONFIG_POWER_FSL_MC13892 52 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 53 #define CONFIG_RTC_MC13XXX 54 55 /* mmc driver */ 56 #define CONFIG_FSL_ESDHC 57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 58 #define CONFIG_SYS_FSL_ESDHC_NUM 1 59 60 /* 61 * UART (console) 62 */ 63 #define CONFIG_MXC_UART 64 #define CONFIG_MXC_UART_BASE UART1_BASE 65 66 /* allow to overwrite serial and ethaddr */ 67 #define CONFIG_ENV_OVERWRITE 68 #define CONFIG_CONS_INDEX 1 69 70 /* 71 * Command definition 72 */ 73 #define CONFIG_BOOTP_SUBNETMASK 74 #define CONFIG_BOOTP_GATEWAY 75 #define CONFIG_BOOTP_DNS 76 77 #define CONFIG_NET_RETRY_COUNT 100 78 79 80 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 81 82 /* 83 * Ethernet on SOC (FEC) 84 */ 85 #define CONFIG_FEC_MXC 86 #define IMX_FEC_BASE FEC_BASE_ADDR 87 #define CONFIG_FEC_MXC_PHYADDR 0x1 88 89 #define CONFIG_MII 90 #define CONFIG_DISCOVER_PHY 91 92 #define CONFIG_ARP_TIMEOUT 200UL 93 94 /* 95 * Miscellaneous configurable options 96 */ 97 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 98 #define CONFIG_CMDLINE_EDITING 99 100 #define CONFIG_AUTO_COMPLETE 101 102 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 103 #define CONFIG_SYS_MEMTEST_END 0x10000 104 105 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 106 107 /* 108 * Physical Memory Map 109 */ 110 #define CONFIG_NR_DRAM_BANKS 1 111 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 112 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 113 114 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 115 116 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \ 117 IRAM_BASE_ADDR - \ 118 GENERATED_GBL_DATA_SIZE) 119 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \ 120 CONFIG_SYS_GBL_DATA_OFFSET) 121 122 /* 123 * MTD Command for mtdparts 124 */ 125 #define CONFIG_MTD_DEVICE 126 #define CONFIG_FLASH_CFI_MTD 127 #define CONFIG_MTD_PARTITIONS 128 129 /* 130 * FLASH and environment organization 131 */ 132 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 133 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 134 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 135 /* Monitor at beginning of flash */ 136 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 137 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 138 139 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 140 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 141 142 /* Address and size of Redundant Environment Sector */ 143 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 144 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 145 146 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 147 CONFIG_SYS_MONITOR_LEN) 148 149 /* 150 * CFI FLASH driver setup 151 */ 152 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 153 #define CONFIG_FLASH_CFI_DRIVER 154 155 /* A non-standard buffered write algorithm */ 156 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 157 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 158 159 /* 160 * NAND FLASH driver setup 161 */ 162 #define CONFIG_NAND_MXC_V1_1 163 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 164 #define CONFIG_SYS_MAX_NAND_DEVICE 1 165 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 166 #define CONFIG_MXC_NAND_HWECC 167 #define CONFIG_SYS_NAND_LARGEPAGE 168 169 #define CONFIG_SYS_NAND_ONFI_DETECTION 170 171 /* 172 * Default environment and default scripts 173 * to update uboot and load kernel 174 */ 175 176 #define CONFIG_HOSTNAME woodburn 177 #define CONFIG_EXTRA_ENV_SETTINGS \ 178 "netdev=eth0\0" \ 179 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 180 "nfsroot=${serverip}:${rootpath}\0" \ 181 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 182 "addip_sta=setenv bootargs ${bootargs} " \ 183 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 184 ":${hostname}:${netdev}:off panic=1\0" \ 185 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 186 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 187 "else run addip_sta;fi\0" \ 188 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 189 "addtty=setenv bootargs ${bootargs}" \ 190 " console=ttymxc0,${baudrate}\0" \ 191 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 192 "loadaddr=80800000\0" \ 193 "kernel_addr_r=80800000\0" \ 194 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 195 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 196 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 197 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 198 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 199 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 200 "bootm ${kernel_addr}\0" \ 201 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 202 "run nfsargs addip addtty addmtd addmisc;" \ 203 "bootm ${kernel_addr_r}\0" \ 204 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 205 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 206 "net_self=if run net_self_load;then " \ 207 "run ramargs addip addtty addmtd addmisc;" \ 208 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 209 "else echo Images not loades;fi\0" \ 210 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 211 "load=tftp ${loadaddr} ${u-boot}\0" \ 212 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 213 "update=protect off ${uboot_addr} +80000;" \ 214 "erase ${uboot_addr} +80000;" \ 215 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 216 "upd=if run load;then echo Updating u-boot;if run update;" \ 217 "then echo U-Boot updated;" \ 218 "else echo Error updating u-boot !;" \ 219 "echo Board without bootloader !!;" \ 220 "fi;" \ 221 "else echo U-Boot not downloaded..exiting;fi\0" \ 222 "bootcmd=run net_nfs\0" 223 224 #endif /* __CONFIG_H */ 225