1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Configuration for the woodburn board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __WOODBURN_COMMON_CONFIG_H 12 #define __WOODBURN_COMMON_CONFIG_H 13 14 #include <asm/arch/imx-regs.h> 15 16 /* High Level Configuration Options */ 17 #define CONFIG_MX35 18 #define CONFIG_MX35_HCLK_FREQ 24000000 19 #define CONFIG_SYS_FSL_CLK 20 21 #define CONFIG_SYS_DCACHE_OFF 22 23 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 24 25 /* This is required to setup the ESDC controller */ 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 #define CONFIG_REVISION_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 32 /* 33 * Size of malloc() pool 34 */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 36 37 /* 38 * Hardware drivers 39 */ 40 #define CONFIG_SYS_I2C 41 #define CONFIG_SYS_I2C_MXC 42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 45 #define CONFIG_SYS_SPD_BUS_NUM 0 46 #define CONFIG_MXC_SPI 47 #define CONFIG_MXC_GPIO 48 49 /* PMIC Controller */ 50 #define CONFIG_POWER 51 #define CONFIG_POWER_I2C 52 #define CONFIG_POWER_FSL 53 #define CONFIG_POWER_FSL_MC13892 54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 55 #define CONFIG_RTC_MC13XXX 56 57 /* mmc driver */ 58 #define CONFIG_FSL_ESDHC 59 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 60 #define CONFIG_SYS_FSL_ESDHC_NUM 1 61 62 /* 63 * UART (console) 64 */ 65 #define CONFIG_MXC_UART 66 #define CONFIG_MXC_UART_BASE UART1_BASE 67 68 /* allow to overwrite serial and ethaddr */ 69 #define CONFIG_ENV_OVERWRITE 70 #define CONFIG_CONS_INDEX 1 71 72 /* 73 * Command definition 74 */ 75 #define CONFIG_CMD_DATE 76 #define CONFIG_BOOTP_SUBNETMASK 77 #define CONFIG_BOOTP_GATEWAY 78 #define CONFIG_BOOTP_DNS 79 80 #define CONFIG_CMD_NAND 81 82 #define CONFIG_MXC_GPIO 83 84 #define CONFIG_NET_RETRY_COUNT 100 85 86 87 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 88 89 /* 90 * Ethernet on SOC (FEC) 91 */ 92 #define CONFIG_FEC_MXC 93 #define IMX_FEC_BASE FEC_BASE_ADDR 94 #define CONFIG_PHYLIB 95 #define CONFIG_PHY_MICREL 96 #define CONFIG_FEC_MXC_PHYADDR 0x1 97 98 #define CONFIG_MII 99 #define CONFIG_DISCOVER_PHY 100 101 #define CONFIG_ARP_TIMEOUT 200UL 102 103 /* 104 * Miscellaneous configurable options 105 */ 106 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 107 #define CONFIG_CMDLINE_EDITING 108 109 #define CONFIG_AUTO_COMPLETE 110 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 111 /* Print Buffer Size */ 112 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 113 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 115 116 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 117 #define CONFIG_SYS_MEMTEST_END 0x10000 118 119 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 120 121 /* 122 * Physical Memory Map 123 */ 124 #define CONFIG_NR_DRAM_BANKS 1 125 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 126 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) 127 128 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 129 130 #define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \ 131 IRAM_BASE_ADDR - \ 132 GENERATED_GBL_DATA_SIZE) 133 #define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \ 134 CONFIG_SYS_GBL_DATA_OFFSET) 135 136 /* 137 * MTD Command for mtdparts 138 */ 139 #define CONFIG_CMD_MTDPARTS 140 #define CONFIG_MTD_DEVICE 141 #define CONFIG_FLASH_CFI_MTD 142 #define CONFIG_MTD_PARTITIONS 143 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 144 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 145 "32m(rootfb)," \ 146 "64m(pcache)," \ 147 "64m(app1)," \ 148 "10m(app2),-(spool);" \ 149 "physmap-flash.0:512k(u-boot),64k(env1)," \ 150 "64k(env2),3776k(kernel1),3776k(kernel2)" 151 152 /* 153 * FLASH and environment organization 154 */ 155 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 156 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 157 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 158 /* Monitor at beginning of flash */ 159 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 160 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 161 162 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 163 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 164 165 /* Address and size of Redundant Environment Sector */ 166 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 167 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 168 169 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 170 CONFIG_SYS_MONITOR_LEN) 171 172 #define CONFIG_ENV_IS_IN_FLASH 173 174 /* 175 * CFI FLASH driver setup 176 */ 177 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 178 #define CONFIG_FLASH_CFI_DRIVER 179 180 /* A non-standard buffered write algorithm */ 181 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 182 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 183 184 /* 185 * NAND FLASH driver setup 186 */ 187 #define CONFIG_NAND_MXC 188 #define CONFIG_NAND_MXC_V1_1 189 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 190 #define CONFIG_SYS_MAX_NAND_DEVICE 1 191 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 192 #define CONFIG_MXC_NAND_HWECC 193 #define CONFIG_SYS_NAND_LARGEPAGE 194 195 #if 0 196 #define CONFIG_MTD_DEBUG 197 #define CONFIG_MTD_DEBUG_VERBOSE 7 198 #endif 199 #define CONFIG_SYS_NAND_ONFI_DETECTION 200 201 /* 202 * Default environment and default scripts 203 * to update uboot and load kernel 204 */ 205 206 #define CONFIG_HOSTNAME woodburn 207 #define CONFIG_EXTRA_ENV_SETTINGS \ 208 "netdev=eth0\0" \ 209 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 210 "nfsroot=${serverip}:${rootpath}\0" \ 211 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 212 "addip_sta=setenv bootargs ${bootargs} " \ 213 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 214 ":${hostname}:${netdev}:off panic=1\0" \ 215 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 216 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 217 "else run addip_sta;fi\0" \ 218 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 219 "addtty=setenv bootargs ${bootargs}" \ 220 " console=ttymxc0,${baudrate}\0" \ 221 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 222 "loadaddr=80800000\0" \ 223 "kernel_addr_r=80800000\0" \ 224 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 225 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 226 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 227 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 228 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 229 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 230 "bootm ${kernel_addr}\0" \ 231 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 232 "run nfsargs addip addtty addmtd addmisc;" \ 233 "bootm ${kernel_addr_r}\0" \ 234 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 235 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 236 "net_self=if run net_self_load;then " \ 237 "run ramargs addip addtty addmtd addmisc;" \ 238 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 239 "else echo Images not loades;fi\0" \ 240 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 241 "load=tftp ${loadaddr} ${u-boot}\0" \ 242 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 243 "update=protect off ${uboot_addr} +80000;" \ 244 "erase ${uboot_addr} +80000;" \ 245 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 246 "upd=if run load;then echo Updating u-boot;if run update;" \ 247 "then echo U-Boot updated;" \ 248 "else echo Error updating u-boot !;" \ 249 "echo Board without bootloader !!;" \ 250 "fi;" \ 251 "else echo U-Boot not downloaded..exiting;fi\0" \ 252 "bootcmd=run net_nfs\0" 253 254 #endif /* __CONFIG_H */ 255