1 /* 2 * Copyright (C) 2016 NXP Semiconductors 3 * 4 * Configuration settings for the i.MX7S Warp board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __WARP7_CONFIG_H 10 #define __WARP7_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define PHYS_SDRAM_SIZE SZ_512M 15 16 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 17 18 /* Size of malloc() pool */ 19 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 20 21 /* MMC Config*/ 22 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR 23 #define CONFIG_SUPPORT_EMMC_BOOT 24 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE 25 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 26 27 #define CONFIG_DFU_ENV_SETTINGS \ 28 "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 29 30 #define CONFIG_EXTRA_ENV_SETTINGS \ 31 CONFIG_DFU_ENV_SETTINGS \ 32 "script=boot.scr\0" \ 33 "image=zImage\0" \ 34 "console=ttymxc0\0" \ 35 "ethact=usb_ether\0" \ 36 "fdt_high=0xffffffff\0" \ 37 "initrd_high=0xffffffff\0" \ 38 "fdt_file=imx7s-warp.dtb\0" \ 39 "fdt_addr=0x83000000\0" \ 40 "boot_fdt=try\0" \ 41 "ip_dyn=yes\0" \ 42 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 43 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 44 "finduuid=part uuid mmc 0:2 uuid\0" \ 45 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 46 "root=PARTUUID=${uuid} rootwait rw\0" \ 47 "loadbootscript=" \ 48 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 49 "bootscript=echo Running bootscript from mmc ...; " \ 50 "source\0" \ 51 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 52 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 53 "mmcboot=echo Booting from mmc ...; " \ 54 "run finduuid; " \ 55 "run mmcargs; " \ 56 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 57 "if run loadfdt; then " \ 58 "bootz ${loadaddr} - ${fdt_addr}; " \ 59 "else " \ 60 "if test ${boot_fdt} = try; then " \ 61 "bootz; " \ 62 "else " \ 63 "echo WARN: Cannot load the DT; " \ 64 "fi; " \ 65 "fi; " \ 66 "else " \ 67 "bootz; " \ 68 "fi;\0" \ 69 70 #define CONFIG_BOOTCOMMAND \ 71 "mmc dev ${mmcdev};" \ 72 "mmc dev ${mmcdev}; if mmc rescan; then " \ 73 "if run loadbootscript; then " \ 74 "run bootscript; " \ 75 "else " \ 76 "if run loadimage; then " \ 77 "run mmcboot; " \ 78 "fi; " \ 79 "fi; " \ 80 "fi" 81 82 #define CONFIG_SYS_MEMTEST_START 0x80000000 83 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 84 85 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 86 #define CONFIG_SYS_HZ 1000 87 88 /* Physical Memory Map */ 89 #define CONFIG_NR_DRAM_BANKS 1 90 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 91 92 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 93 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 94 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 95 96 #define CONFIG_SYS_INIT_SP_OFFSET \ 97 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 98 #define CONFIG_SYS_INIT_SP_ADDR \ 99 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 100 101 /* I2C configs */ 102 #define CONFIG_SYS_I2C 103 #define CONFIG_SYS_I2C_MXC 104 #define CONFIG_SYS_I2C_MXC_I2C1 105 #define CONFIG_SYS_I2C_SPEED 100000 106 107 /* PMIC */ 108 #define CONFIG_POWER 109 #define CONFIG_POWER_I2C 110 #define CONFIG_POWER_PFUZE3000 111 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 112 113 /* environment organization */ 114 #define CONFIG_ENV_SIZE SZ_8K 115 116 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 117 #define CONFIG_SYS_FSL_USDHC_NUM 1 118 119 #define CONFIG_SYS_MMC_ENV_DEV 0 120 #define CONFIG_SYS_MMC_ENV_PART 0 121 122 /* USB Configs */ 123 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 124 125 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 126 #define CONFIG_MXC_USB_FLAGS 0 127 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ 128 129 #define CONFIG_IMX_THERMAL 130 131 #define CONFIG_USBD_HS 132 133 #define CONFIG_USB_FUNCTION_MASS_STORAGE 134 135 /* USB Device Firmware Update support */ 136 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 137 #define DFU_DEFAULT_POLL_TIMEOUT 300 138 139 #define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01" 140 141 #endif 142