xref: /openbmc/u-boot/include/configs/warp7.h (revision 8ee59472)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016 NXP Semiconductors
4  *
5  * Configuration settings for the i.MX7S Warp board.
6  */
7 
8 #ifndef __WARP7_CONFIG_H
9 #define __WARP7_CONFIG_H
10 
11 #include "mx7_common.h"
12 #include <imximage.h>
13 
14 #define PHYS_SDRAM_SIZE			SZ_512M
15 
16 #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
17 
18 /* Size of malloc() pool */
19 #define CONFIG_SYS_MALLOC_LEN		(35 * SZ_1M)
20 
21 /* MMC Config*/
22 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
23 #define CONFIG_SUPPORT_EMMC_BOOT
24 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
25 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
26 
27 /* Switch on SERIAL_TAG */
28 #define CONFIG_SERIAL_TAG
29 
30 #define CONFIG_DFU_ENV_SETTINGS \
31 	"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
32 
33 #define CONFIG_EXTRA_ENV_SETTINGS \
34 	CONFIG_DFU_ENV_SETTINGS \
35 	"script=boot.scr\0" \
36 	"script_signed=boot.scr.imx-signed\0" \
37 	"image=zImage\0" \
38 	"console=ttymxc0\0" \
39 	"ethact=usb_ether\0" \
40 	"fdt_high=0xffffffff\0" \
41 	"initrd_high=0xffffffff\0" \
42 	"fdt_file=imx7s-warp.dtb\0" \
43 	"fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \
44 	"optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \
45 	"boot_fdt=try\0" \
46 	"ip_dyn=yes\0" \
47 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
48 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
49 	"rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \
50 	"finduuid=part uuid mmc 0:${rootpart} uuid\0" \
51 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
52 		"root=PARTUUID=${uuid} rootwait rw\0" \
53 	"ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\
54 	"warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \
55 	"do_bootscript_hab=" \
56 		"if test ${hab_enabled} -eq 1; then " \
57 			"setexpr hab_ivt_addr ${loadaddr} - ${ivt_offset}; " \
58 			"setenv script ${script_signed}; " \
59 			"load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \
60 			"run warp7_auth_or_fail; " \
61 			"run bootscript; "\
62 		"fi;\0" \
63 	"loadbootscript=" \
64 		"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
65 	"bootscript=echo Running bootscript from mmc ...; " \
66 		"source\0" \
67 	"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
68 	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
69 	"mmcboot=echo Booting from mmc ...; " \
70 		"run finduuid; " \
71 		"run mmcargs; " \
72 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
73 			"if run loadfdt; then " \
74 				"bootz ${loadaddr} - ${fdt_addr}; " \
75 			"else " \
76 				"if test ${boot_fdt} = try; then " \
77 					"bootz; " \
78 				"else " \
79 					"echo WARN: Cannot load the DT; " \
80 				"fi; " \
81 			"fi; " \
82 		"else " \
83 			"bootz; " \
84 		"fi;\0" \
85 
86 #define CONFIG_BOOTCOMMAND \
87 	   "mmc dev ${mmcdev};" \
88 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
89 		   "run do_bootscript_hab;" \
90 		   "if run loadbootscript; then " \
91 			   "run bootscript; " \
92 		   "else " \
93 			   "if run loadimage; then " \
94 				   "run mmcboot; " \
95 			   "fi; " \
96 		   "fi; " \
97 	   "fi"
98 
99 #define CONFIG_SYS_MEMTEST_START	0x80000000
100 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
101 
102 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
103 #define CONFIG_SYS_HZ			1000
104 
105 /* Physical Memory Map */
106 #define CONFIG_NR_DRAM_BANKS		1
107 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
108 
109 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
110 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
111 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
112 
113 #define CONFIG_SYS_INIT_SP_OFFSET \
114 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
115 #define CONFIG_SYS_INIT_SP_ADDR \
116 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
117 
118 /* I2C configs */
119 #define CONFIG_SYS_I2C
120 #define CONFIG_SYS_I2C_MXC
121 #define CONFIG_SYS_I2C_MXC_I2C1
122 #define CONFIG_SYS_I2C_SPEED		100000
123 
124 /* PMIC */
125 #define CONFIG_POWER
126 #define CONFIG_POWER_I2C
127 #define CONFIG_POWER_PFUZE3000
128 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
129 
130 /* environment organization */
131 #define CONFIG_ENV_SIZE			SZ_8K
132 
133 #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
134 #define CONFIG_SYS_FSL_USDHC_NUM	1
135 
136 #define CONFIG_SYS_MMC_ENV_DEV		0
137 #define CONFIG_SYS_MMC_ENV_PART		0
138 
139 /* USB Configs */
140 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
141 
142 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
143 #define CONFIG_MXC_USB_FLAGS		0
144 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
145 
146 #define CONFIG_IMX_THERMAL
147 
148 #define CONFIG_USBD_HS
149 
150 /* USB Device Firmware Update support */
151 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_16M
152 #define DFU_DEFAULT_POLL_TIMEOUT	300
153 
154 #define CONFIG_USBNET_DEV_ADDR		"de:ad:be:af:00:01"
155 
156 /* Environment variable name to represent HAB enable state */
157 #define HAB_ENABLED_ENVNAME		"hab_enabled"
158 
159 #endif
160