1 /* 2 * Copyright (C) 2016 NXP Semiconductors 3 * 4 * Configuration settings for the i.MX7S Warp board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __WARP7_CONFIG_H 10 #define __WARP7_CONFIG_H 11 12 #include "mx7_common.h" 13 14 #define PHYS_SDRAM_SIZE SZ_512M 15 16 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 17 18 /* Size of malloc() pool */ 19 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 20 21 #define CONFIG_BOARD_EARLY_INIT_F 22 23 /* MMC Config*/ 24 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR 25 #define CONFIG_SUPPORT_EMMC_BOOT 26 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE 27 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 28 29 #define CONFIG_PARTITION_UUIDS 30 #define CONFIG_CMD_PART 31 32 #define CONFIG_DFU_ENV_SETTINGS \ 33 "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 34 35 #define CONFIG_EXTRA_ENV_SETTINGS \ 36 CONFIG_DFU_ENV_SETTINGS \ 37 "script=boot.scr\0" \ 38 "image=zImage\0" \ 39 "console=ttymxc0\0" \ 40 "ethact=usb_ether\0" \ 41 "fdt_high=0xffffffff\0" \ 42 "initrd_high=0xffffffff\0" \ 43 "fdt_file=imx7s-warp.dtb\0" \ 44 "fdt_addr=0x83000000\0" \ 45 "boot_fdt=try\0" \ 46 "ip_dyn=yes\0" \ 47 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 48 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 49 "finduuid=part uuid mmc 0:2 uuid\0" \ 50 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 51 "root=PARTUUID=${uuid} rootwait rw\0" \ 52 "loadbootscript=" \ 53 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 54 "bootscript=echo Running bootscript from mmc ...; " \ 55 "source\0" \ 56 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 57 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 58 "mmcboot=echo Booting from mmc ...; " \ 59 "run finduuid; " \ 60 "run mmcargs; " \ 61 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 62 "if run loadfdt; then " \ 63 "bootz ${loadaddr} - ${fdt_addr}; " \ 64 "else " \ 65 "if test ${boot_fdt} = try; then " \ 66 "bootz; " \ 67 "else " \ 68 "echo WARN: Cannot load the DT; " \ 69 "fi; " \ 70 "fi; " \ 71 "else " \ 72 "bootz; " \ 73 "fi;\0" \ 74 75 #define CONFIG_BOOTCOMMAND \ 76 "mmc dev ${mmcdev};" \ 77 "mmc dev ${mmcdev}; if mmc rescan; then " \ 78 "if run loadbootscript; then " \ 79 "run bootscript; " \ 80 "else " \ 81 "if run loadimage; then " \ 82 "run mmcboot; " \ 83 "fi; " \ 84 "fi; " \ 85 "fi" 86 87 #define CONFIG_SYS_MEMTEST_START 0x80000000 88 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 89 90 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 91 #define CONFIG_SYS_HZ 1000 92 93 #define CONFIG_STACKSIZE SZ_128K 94 95 /* Physical Memory Map */ 96 #define CONFIG_NR_DRAM_BANKS 1 97 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 98 99 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 100 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 101 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 102 103 #define CONFIG_SYS_INIT_SP_OFFSET \ 104 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 105 #define CONFIG_SYS_INIT_SP_ADDR \ 106 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 107 108 /* I2C configs */ 109 #define CONFIG_SYS_I2C 110 #define CONFIG_SYS_I2C_MXC 111 #define CONFIG_SYS_I2C_MXC_I2C1 112 #define CONFIG_SYS_I2C_SPEED 100000 113 114 /* PMIC */ 115 #define CONFIG_POWER 116 #define CONFIG_POWER_I2C 117 #define CONFIG_POWER_PFUZE3000 118 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 119 120 /* FLASH and environment organization */ 121 #define CONFIG_SYS_NO_FLASH 122 #define CONFIG_ENV_SIZE SZ_8K 123 #define CONFIG_ENV_IS_IN_MMC 124 125 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 126 #define CONFIG_SYS_FSL_USDHC_NUM 1 127 128 #define CONFIG_SYS_MMC_ENV_DEV 0 129 #define CONFIG_SYS_MMC_ENV_PART 0 130 131 /* USB Configs */ 132 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 133 134 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 135 #define CONFIG_MXC_USB_FLAGS 0 136 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ 137 138 #define CONFIG_IMX_THERMAL 139 140 #define CONFIG_USBD_HS 141 142 #define CONFIG_USB_FUNCTION_MASS_STORAGE 143 144 /* USB Device Firmware Update support */ 145 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 146 #define DFU_DEFAULT_POLL_TIMEOUT 300 147 148 #define CONFIG_USB_ETHER 149 #define CONFIG_USB_ETH_CDC 150 #define CONFIG_USB_ETH_RNDIS 151 #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" 152 #define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01" 153 154 #endif 155